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- Continue to re-factor code to prepare for eMMC CMDQ and blkmq support - Introduce queue semantics to prepare for eMMC CMDQ and blkmq support - Add helper functions to manage temporary enable/disable of eMMC CMDQ - Improve wait-busy detection for SDIO MMC host: - cavium: Add driver to support Cavium controllers - cavium: Extend Cavium driver to support Octeon SOCs and ThunderX SOCs - bcm2835: Add new driver for Broadcom BCM2835 controller - sdhci-xenon: Add driver to support Marvell Xenon SDHCI controller - sdhci-tegra: Add support for the Tegra186 variant - sdhci-of-esdhc: Support for UHS-I SD cards - sdhci-of-esdhc: Support for eMMC HS200 cards - sdhci-cadence: Add eMMC HS400 enhanced strobe support - sdhci-esdhc-imx: Reset tuning circuit when needed - sdhci-pci: Modernize and clean-up some PM related code - sdhci-pci: Avoid re-tuning at runtime PM for some Intel devices - sdhci-pci|acpi: Use aggressive PM for some Intel BYT controllers - sdhci: Re-factoring and modernizations - sdhci: Optimize delay loops - sdhci: Improve register dump print format - sdhci: Add support for the Command Queue Engine - meson-gx: Various improvements and clean-ups - meson-gx: Add support for CMD23 - meson-gx: Basic tuning support to avoid CRC errors - s3cmci: Enable probing via DT - mediatek: Improve tuning support for eMMC HS200 and HS400 mode - tmio: Improve DMA support - tmio: Use correct response for CMD12 - dw_mmc: Minor improvements and clean-ups -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJZCF8JAAoJEP4mhCVzWIwpjikP/iLwYZOP+aNl1wvHXJ7/UtOB bonqPPRLfW6mJkiphZyjnf3ZldS8DoUYp1Jh8gVsWoOPZhFuzAyFTGRJA5t0sEtH WzV0X72qzfDESekP1KGZZPQSfqfo/UnIEwa7U0Rlw8jlpvVsbXimqw54e+hCE0n8 bhZjQihxOkXofCMnS4CxFJwbSCNEkdw6cMgNk72P8KAQllbOA3UbOurAbRUT0I6S 3H3+8uKh0fZp3BYGV5y8DxzqIRaCz3ed8TTuGFc3YU8sNGEF67AwcbBzfDaegNsR qNPU12gccOU5IY8gbG/MMoEpSXodEj0RCW2uDqt+QT289eh3SpPLlS2en/iZj4t6 F1xnMEg48GpYJbiB4YImfK49c3RQXAtcdwf/v8SUcE4FUktuOsyQIozMglYIsUd1 fGZ3yr0caRBnwAkbj5GXaG3/VXzMExKYalf990kUuxhHHGuRQLLg0SHkfWNhJNA1 mw0XHXTrC9GO32PPfylgkdGOOCnlP36sbBPhGQqJUH6yeiy1wO4xoCVSO8iVI5J9 8W9BGgSYJRlPaItmH2syQEO9dSRMS5BLy7oICTBn+LsszXwMbuNn6cFBkhF1Xxwy 2MHU+b6EMn4V4qrp0c8gVfMraXkL9H7BwL9aCv1UTuti7d/7NM7G1wNW9qGala3Y 9cU8nzC1A521kfmDNPPO =p+Hb -----END PGP SIGNATURE----- Merge tag 'mmc-v4.12' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc Pull MMC updates from Ulf Hansson: "MMC core: - Continue to re-factor code to prepare for eMMC CMDQ and blkmq support - Introduce queue semantics to prepare for eMMC CMDQ and blkmq support - Add helper functions to manage temporary enable/disable of eMMC CMDQ - Improve wait-busy detection for SDIO MMC host: - cavium: Add driver to support Cavium controllers - cavium: Extend Cavium driver to support Octeon and ThunderX SOCs - bcm2835: Add new driver for Broadcom BCM2835 controller - sdhci-xenon: Add driver to support Marvell Xenon SDHCI controller - sdhci-tegra: Add support for the Tegra186 variant - sdhci-of-esdhc: Support for UHS-I SD cards - sdhci-of-esdhc: Support for eMMC HS200 cards - sdhci-cadence: Add eMMC HS400 enhanced strobe support - sdhci-esdhc-imx: Reset tuning circuit when needed - sdhci-pci: Modernize and clean-up some PM related code - sdhci-pci: Avoid re-tuning at runtime PM for some Intel devices - sdhci-pci|acpi: Use aggressive PM for some Intel BYT controllers - sdhci: Re-factoring and modernizations - sdhci: Optimize delay loops - sdhci: Improve register dump print format - sdhci: Add support for the Command Queue Engine - meson-gx: Various improvements and clean-ups - meson-gx: Add support for CMD23 - meson-gx: Basic tuning support to avoid CRC errors - s3cmci: Enable probing via DT - mediatek: Improve tuning support for eMMC HS200 and HS400 mode - tmio: Improve DMA support - tmio: Use correct response for CMD12 - dw_mmc: Minor improvements and clean-ups" * tag 'mmc-v4.12' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc: (148 commits) mmc: sdhci-of-esdhc: limit SD clock for ls1012a/ls1046a mmc: sdhci-of-esdhc: poll ESDHC_CLOCK_STABLE bit with udelay mmc: sdhci-xenon: Fix default value of LOGIC_TIMING_ADJUST for eMMC5.0 PHY mmc: sdhci-xenon: Fix the work flow in xenon_remove(). MIPS: Octeon: cavium_octeon_defconfig: Enable Octeon MMC mmc: sdhci-xenon: Remove redundant dev_err call in get_dt_pad_ctrl_data() mmc: cavium: Use module_pci_driver to simplify the code mmc: cavium: Add MMC support for Octeon SOCs. mmc: cavium: Fix detection of block or byte addressing. mmc: core: Export API to allow hosts to get the card address mmc: sdio: Fix sdio wait busy implement limitation mmc: sdhci-esdhc-imx: reset tuning circuit when power on mmc card clk: apn806: fix spelling mistake: "mising" -> "missing" mmc: sdhci-of-esdhc: add delay between tuning cycles mmc: sdhci: Control the delay between tuning commands mmc: sdhci-of-esdhc: add tuning support mmc: sdhci-of-esdhc: add support for signal voltage switch mmc: sdhci-of-esdhc: add peripheral clock support mmc: sdhci-pci: Allow for 3 bytes from Intel DSM mmc: cavium: Fix a shift wrapping bug ...
78 lines
2.9 KiB
Plaintext
78 lines
2.9 KiB
Plaintext
SD and MMC Block Device Attributes
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==================================
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These attributes are defined for the block devices associated with the
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SD or MMC device.
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The following attributes are read/write.
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force_ro Enforce read-only access even if write protect switch is off.
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SD and MMC Device Attributes
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============================
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All attributes are read-only.
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cid Card Identification Register
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csd Card Specific Data Register
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scr SD Card Configuration Register (SD only)
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date Manufacturing Date (from CID Register)
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fwrev Firmware/Product Revision (from CID Register) (SD and MMCv1 only)
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hwrev Hardware/Product Revision (from CID Register) (SD and MMCv1 only)
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manfid Manufacturer ID (from CID Register)
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name Product Name (from CID Register)
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oemid OEM/Application ID (from CID Register)
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prv Product Revision (from CID Register) (SD and MMCv4 only)
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serial Product Serial Number (from CID Register)
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erase_size Erase group size
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preferred_erase_size Preferred erase size
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raw_rpmb_size_mult RPMB partition size
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rel_sectors Reliable write sector count
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ocr Operation Conditions Register
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dsr Driver Stage Register
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cmdq_en Command Queue enabled: 1 => enabled, 0 => not enabled
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Note on Erase Size and Preferred Erase Size:
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"erase_size" is the minimum size, in bytes, of an erase
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operation. For MMC, "erase_size" is the erase group size
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reported by the card. Note that "erase_size" does not apply
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to trim or secure trim operations where the minimum size is
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always one 512 byte sector. For SD, "erase_size" is 512
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if the card is block-addressed, 0 otherwise.
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SD/MMC cards can erase an arbitrarily large area up to and
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including the whole card. When erasing a large area it may
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be desirable to do it in smaller chunks for three reasons:
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1. A single erase command will make all other I/O on
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the card wait. This is not a problem if the whole card
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is being erased, but erasing one partition will make
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I/O for another partition on the same card wait for the
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duration of the erase - which could be a several
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minutes.
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2. To be able to inform the user of erase progress.
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3. The erase timeout becomes too large to be very
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useful. Because the erase timeout contains a margin
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which is multiplied by the size of the erase area,
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the value can end up being several minutes for large
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areas.
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"erase_size" is not the most efficient unit to erase
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(especially for SD where it is just one sector),
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hence "preferred_erase_size" provides a good chunk
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size for erasing large areas.
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For MMC, "preferred_erase_size" is the high-capacity
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erase size if a card specifies one, otherwise it is
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based on the capacity of the card.
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For SD, "preferred_erase_size" is the allocation unit
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size specified by the card.
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"preferred_erase_size" is in bytes.
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Note on raw_rpmb_size_mult:
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"raw_rpmb_size_mult" is a multiple of 128kB block.
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RPMB size in byte is calculated by using the following equation:
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RPMB partition size = 128kB x raw_rpmb_size_mult
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