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662dca54ca
Add a linked list for keeping multiple PHY instances with different types so that we can have separate USB2 and USB3 PHYs on one single board. _get_phy_ has been changed so that the controller gets the transceiver by type. _remove_phy_ has been added to let the phy be removed from the phy list. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
1170 lines
27 KiB
C
1170 lines
27 KiB
C
/*
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* Copyright (C) 2007,2008 Freescale semiconductor, Inc.
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*
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* Author: Li Yang <LeoLi@freescale.com>
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* Jerry Huang <Chang-Ming.Huang@freescale.com>
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*
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* Initialization based on code from Shlomi Gridish.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/delay.h>
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#include <linux/slab.h>
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#include <linux/proc_fs.h>
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#include <linux/errno.h>
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#include <linux/init.h>
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#include <linux/interrupt.h>
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#include <linux/io.h>
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#include <linux/timer.h>
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#include <linux/usb.h>
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#include <linux/device.h>
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#include <linux/usb/ch9.h>
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#include <linux/usb/gadget.h>
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#include <linux/workqueue.h>
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#include <linux/time.h>
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#include <linux/fsl_devices.h>
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#include <linux/platform_device.h>
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#include <linux/uaccess.h>
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#include <asm/unaligned.h>
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#include "fsl_otg.h"
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#define DRIVER_VERSION "Rev. 1.55"
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#define DRIVER_AUTHOR "Jerry Huang/Li Yang"
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#define DRIVER_DESC "Freescale USB OTG Transceiver Driver"
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#define DRIVER_INFO DRIVER_DESC " " DRIVER_VERSION
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static const char driver_name[] = "fsl-usb2-otg";
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const pm_message_t otg_suspend_state = {
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.event = 1,
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};
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#define HA_DATA_PULSE
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static struct usb_dr_mmap *usb_dr_regs;
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static struct fsl_otg *fsl_otg_dev;
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static int srp_wait_done;
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/* FSM timers */
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struct fsl_otg_timer *a_wait_vrise_tmr, *a_wait_bcon_tmr, *a_aidl_bdis_tmr,
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*b_ase0_brst_tmr, *b_se0_srp_tmr;
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/* Driver specific timers */
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struct fsl_otg_timer *b_data_pulse_tmr, *b_vbus_pulse_tmr, *b_srp_fail_tmr,
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*b_srp_wait_tmr, *a_wait_enum_tmr;
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static struct list_head active_timers;
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static struct fsl_otg_config fsl_otg_initdata = {
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.otg_port = 1,
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};
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#ifdef CONFIG_PPC32
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static u32 _fsl_readl_be(const unsigned __iomem *p)
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{
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return in_be32(p);
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}
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static u32 _fsl_readl_le(const unsigned __iomem *p)
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{
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return in_le32(p);
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}
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static void _fsl_writel_be(u32 v, unsigned __iomem *p)
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{
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out_be32(p, v);
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}
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static void _fsl_writel_le(u32 v, unsigned __iomem *p)
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{
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out_le32(p, v);
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}
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static u32 (*_fsl_readl)(const unsigned __iomem *p);
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static void (*_fsl_writel)(u32 v, unsigned __iomem *p);
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#define fsl_readl(p) (*_fsl_readl)((p))
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#define fsl_writel(v, p) (*_fsl_writel)((v), (p))
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#else
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#define fsl_readl(addr) readl(addr)
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#define fsl_writel(val, addr) writel(val, addr)
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#endif /* CONFIG_PPC32 */
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/* Routines to access transceiver ULPI registers */
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u8 view_ulpi(u8 addr)
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{
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u32 temp;
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temp = 0x40000000 | (addr << 16);
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fsl_writel(temp, &usb_dr_regs->ulpiview);
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udelay(1000);
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while (temp & 0x40)
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temp = fsl_readl(&usb_dr_regs->ulpiview);
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return (le32_to_cpu(temp) & 0x0000ff00) >> 8;
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}
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int write_ulpi(u8 addr, u8 data)
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{
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u32 temp;
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temp = 0x60000000 | (addr << 16) | data;
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fsl_writel(temp, &usb_dr_regs->ulpiview);
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return 0;
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}
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/* -------------------------------------------------------------*/
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/* Operations that will be called from OTG Finite State Machine */
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/* Charge vbus for vbus pulsing in SRP */
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void fsl_otg_chrg_vbus(int on)
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{
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u32 tmp;
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tmp = fsl_readl(&usb_dr_regs->otgsc) & ~OTGSC_INTSTS_MASK;
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if (on)
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/* stop discharging, start charging */
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tmp = (tmp & ~OTGSC_CTRL_VBUS_DISCHARGE) |
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OTGSC_CTRL_VBUS_CHARGE;
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else
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/* stop charging */
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tmp &= ~OTGSC_CTRL_VBUS_CHARGE;
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fsl_writel(tmp, &usb_dr_regs->otgsc);
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}
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/* Discharge vbus through a resistor to ground */
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void fsl_otg_dischrg_vbus(int on)
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{
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u32 tmp;
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tmp = fsl_readl(&usb_dr_regs->otgsc) & ~OTGSC_INTSTS_MASK;
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if (on)
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/* stop charging, start discharging */
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tmp = (tmp & ~OTGSC_CTRL_VBUS_CHARGE) |
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OTGSC_CTRL_VBUS_DISCHARGE;
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else
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/* stop discharging */
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tmp &= ~OTGSC_CTRL_VBUS_DISCHARGE;
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fsl_writel(tmp, &usb_dr_regs->otgsc);
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}
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/* A-device driver vbus, controlled through PP bit in PORTSC */
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void fsl_otg_drv_vbus(int on)
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{
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u32 tmp;
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if (on) {
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tmp = fsl_readl(&usb_dr_regs->portsc) & ~PORTSC_W1C_BITS;
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fsl_writel(tmp | PORTSC_PORT_POWER, &usb_dr_regs->portsc);
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} else {
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tmp = fsl_readl(&usb_dr_regs->portsc) &
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~PORTSC_W1C_BITS & ~PORTSC_PORT_POWER;
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fsl_writel(tmp, &usb_dr_regs->portsc);
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}
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}
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/*
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* Pull-up D+, signalling connect by periperal. Also used in
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* data-line pulsing in SRP
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*/
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void fsl_otg_loc_conn(int on)
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{
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u32 tmp;
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tmp = fsl_readl(&usb_dr_regs->otgsc) & ~OTGSC_INTSTS_MASK;
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if (on)
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tmp |= OTGSC_CTRL_DATA_PULSING;
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else
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tmp &= ~OTGSC_CTRL_DATA_PULSING;
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fsl_writel(tmp, &usb_dr_regs->otgsc);
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}
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/*
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* Generate SOF by host. This is controlled through suspend/resume the
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* port. In host mode, controller will automatically send SOF.
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* Suspend will block the data on the port.
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*/
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void fsl_otg_loc_sof(int on)
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{
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u32 tmp;
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tmp = fsl_readl(&fsl_otg_dev->dr_mem_map->portsc) & ~PORTSC_W1C_BITS;
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if (on)
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tmp |= PORTSC_PORT_FORCE_RESUME;
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else
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tmp |= PORTSC_PORT_SUSPEND;
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fsl_writel(tmp, &fsl_otg_dev->dr_mem_map->portsc);
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}
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/* Start SRP pulsing by data-line pulsing, followed with v-bus pulsing. */
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void fsl_otg_start_pulse(void)
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{
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u32 tmp;
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srp_wait_done = 0;
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#ifdef HA_DATA_PULSE
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tmp = fsl_readl(&usb_dr_regs->otgsc) & ~OTGSC_INTSTS_MASK;
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tmp |= OTGSC_HA_DATA_PULSE;
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fsl_writel(tmp, &usb_dr_regs->otgsc);
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#else
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fsl_otg_loc_conn(1);
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#endif
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fsl_otg_add_timer(b_data_pulse_tmr);
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}
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void b_data_pulse_end(unsigned long foo)
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{
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#ifdef HA_DATA_PULSE
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#else
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fsl_otg_loc_conn(0);
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#endif
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/* Do VBUS pulse after data pulse */
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fsl_otg_pulse_vbus();
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}
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void fsl_otg_pulse_vbus(void)
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{
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srp_wait_done = 0;
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fsl_otg_chrg_vbus(1);
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/* start the timer to end vbus charge */
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fsl_otg_add_timer(b_vbus_pulse_tmr);
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}
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void b_vbus_pulse_end(unsigned long foo)
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{
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fsl_otg_chrg_vbus(0);
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/*
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* As USB3300 using the same a_sess_vld and b_sess_vld voltage
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* we need to discharge the bus for a while to distinguish
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* residual voltage of vbus pulsing and A device pull up
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*/
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fsl_otg_dischrg_vbus(1);
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fsl_otg_add_timer(b_srp_wait_tmr);
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}
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void b_srp_end(unsigned long foo)
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{
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fsl_otg_dischrg_vbus(0);
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srp_wait_done = 1;
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if ((fsl_otg_dev->phy.state == OTG_STATE_B_SRP_INIT) &&
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fsl_otg_dev->fsm.b_sess_vld)
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fsl_otg_dev->fsm.b_srp_done = 1;
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}
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/*
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* Workaround for a_host suspending too fast. When a_bus_req=0,
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* a_host will start by SRP. It needs to set b_hnp_enable before
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* actually suspending to start HNP
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*/
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void a_wait_enum(unsigned long foo)
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{
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VDBG("a_wait_enum timeout\n");
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if (!fsl_otg_dev->phy.otg->host->b_hnp_enable)
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fsl_otg_add_timer(a_wait_enum_tmr);
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else
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otg_statemachine(&fsl_otg_dev->fsm);
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}
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/* The timeout callback function to set time out bit */
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void set_tmout(unsigned long indicator)
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{
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*(int *)indicator = 1;
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}
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/* Initialize timers */
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int fsl_otg_init_timers(struct otg_fsm *fsm)
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{
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/* FSM used timers */
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a_wait_vrise_tmr = otg_timer_initializer(&set_tmout, TA_WAIT_VRISE,
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(unsigned long)&fsm->a_wait_vrise_tmout);
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if (!a_wait_vrise_tmr)
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return -ENOMEM;
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a_wait_bcon_tmr = otg_timer_initializer(&set_tmout, TA_WAIT_BCON,
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(unsigned long)&fsm->a_wait_bcon_tmout);
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if (!a_wait_bcon_tmr)
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return -ENOMEM;
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a_aidl_bdis_tmr = otg_timer_initializer(&set_tmout, TA_AIDL_BDIS,
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(unsigned long)&fsm->a_aidl_bdis_tmout);
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if (!a_aidl_bdis_tmr)
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return -ENOMEM;
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b_ase0_brst_tmr = otg_timer_initializer(&set_tmout, TB_ASE0_BRST,
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(unsigned long)&fsm->b_ase0_brst_tmout);
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if (!b_ase0_brst_tmr)
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return -ENOMEM;
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b_se0_srp_tmr = otg_timer_initializer(&set_tmout, TB_SE0_SRP,
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(unsigned long)&fsm->b_se0_srp);
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if (!b_se0_srp_tmr)
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return -ENOMEM;
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b_srp_fail_tmr = otg_timer_initializer(&set_tmout, TB_SRP_FAIL,
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(unsigned long)&fsm->b_srp_done);
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if (!b_srp_fail_tmr)
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return -ENOMEM;
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a_wait_enum_tmr = otg_timer_initializer(&a_wait_enum, 10,
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(unsigned long)&fsm);
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if (!a_wait_enum_tmr)
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return -ENOMEM;
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/* device driver used timers */
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b_srp_wait_tmr = otg_timer_initializer(&b_srp_end, TB_SRP_WAIT, 0);
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if (!b_srp_wait_tmr)
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return -ENOMEM;
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b_data_pulse_tmr = otg_timer_initializer(&b_data_pulse_end,
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TB_DATA_PLS, 0);
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if (!b_data_pulse_tmr)
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return -ENOMEM;
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b_vbus_pulse_tmr = otg_timer_initializer(&b_vbus_pulse_end,
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TB_VBUS_PLS, 0);
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if (!b_vbus_pulse_tmr)
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return -ENOMEM;
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return 0;
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}
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/* Uninitialize timers */
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void fsl_otg_uninit_timers(void)
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{
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/* FSM used timers */
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if (a_wait_vrise_tmr != NULL)
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kfree(a_wait_vrise_tmr);
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if (a_wait_bcon_tmr != NULL)
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kfree(a_wait_bcon_tmr);
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if (a_aidl_bdis_tmr != NULL)
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kfree(a_aidl_bdis_tmr);
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if (b_ase0_brst_tmr != NULL)
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kfree(b_ase0_brst_tmr);
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if (b_se0_srp_tmr != NULL)
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kfree(b_se0_srp_tmr);
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if (b_srp_fail_tmr != NULL)
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kfree(b_srp_fail_tmr);
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if (a_wait_enum_tmr != NULL)
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kfree(a_wait_enum_tmr);
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/* device driver used timers */
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if (b_srp_wait_tmr != NULL)
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kfree(b_srp_wait_tmr);
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if (b_data_pulse_tmr != NULL)
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kfree(b_data_pulse_tmr);
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if (b_vbus_pulse_tmr != NULL)
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kfree(b_vbus_pulse_tmr);
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}
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/* Add timer to timer list */
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void fsl_otg_add_timer(void *gtimer)
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{
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struct fsl_otg_timer *timer = gtimer;
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struct fsl_otg_timer *tmp_timer;
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/*
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* Check if the timer is already in the active list,
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* if so update timer count
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*/
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list_for_each_entry(tmp_timer, &active_timers, list)
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if (tmp_timer == timer) {
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timer->count = timer->expires;
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return;
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}
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timer->count = timer->expires;
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list_add_tail(&timer->list, &active_timers);
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}
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/* Remove timer from the timer list; clear timeout status */
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void fsl_otg_del_timer(void *gtimer)
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{
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struct fsl_otg_timer *timer = gtimer;
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struct fsl_otg_timer *tmp_timer, *del_tmp;
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list_for_each_entry_safe(tmp_timer, del_tmp, &active_timers, list)
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if (tmp_timer == timer)
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list_del(&timer->list);
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}
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/*
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* Reduce timer count by 1, and find timeout conditions.
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* Called by fsl_otg 1ms timer interrupt
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*/
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int fsl_otg_tick_timer(void)
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{
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struct fsl_otg_timer *tmp_timer, *del_tmp;
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int expired = 0;
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list_for_each_entry_safe(tmp_timer, del_tmp, &active_timers, list) {
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tmp_timer->count--;
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/* check if timer expires */
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if (!tmp_timer->count) {
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list_del(&tmp_timer->list);
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tmp_timer->function(tmp_timer->data);
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expired = 1;
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}
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}
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return expired;
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}
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/* Reset controller, not reset the bus */
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void otg_reset_controller(void)
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{
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u32 command;
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command = fsl_readl(&usb_dr_regs->usbcmd);
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command |= (1 << 1);
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fsl_writel(command, &usb_dr_regs->usbcmd);
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while (fsl_readl(&usb_dr_regs->usbcmd) & (1 << 1))
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;
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}
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/* Call suspend/resume routines in host driver */
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int fsl_otg_start_host(struct otg_fsm *fsm, int on)
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{
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struct usb_otg *otg = fsm->otg;
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struct device *dev;
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struct fsl_otg *otg_dev = container_of(otg->phy, struct fsl_otg, phy);
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u32 retval = 0;
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if (!otg->host)
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return -ENODEV;
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dev = otg->host->controller;
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/*
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* Update a_vbus_vld state as a_vbus_vld int is disabled
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* in device mode
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*/
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fsm->a_vbus_vld =
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!!(fsl_readl(&usb_dr_regs->otgsc) & OTGSC_STS_A_VBUS_VALID);
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if (on) {
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/* start fsl usb host controller */
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if (otg_dev->host_working)
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goto end;
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else {
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otg_reset_controller();
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VDBG("host on......\n");
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if (dev->driver->pm && dev->driver->pm->resume) {
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retval = dev->driver->pm->resume(dev);
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if (fsm->id) {
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/* default-b */
|
|
fsl_otg_drv_vbus(1);
|
|
/*
|
|
* Workaround: b_host can't driver
|
|
* vbus, but PP in PORTSC needs to
|
|
* be 1 for host to work.
|
|
* So we set drv_vbus bit in
|
|
* transceiver to 0 thru ULPI.
|
|
*/
|
|
write_ulpi(0x0c, 0x20);
|
|
}
|
|
}
|
|
|
|
otg_dev->host_working = 1;
|
|
}
|
|
} else {
|
|
/* stop fsl usb host controller */
|
|
if (!otg_dev->host_working)
|
|
goto end;
|
|
else {
|
|
VDBG("host off......\n");
|
|
if (dev && dev->driver) {
|
|
if (dev->driver->pm && dev->driver->pm->suspend)
|
|
retval = dev->driver->pm->suspend(dev);
|
|
if (fsm->id)
|
|
/* default-b */
|
|
fsl_otg_drv_vbus(0);
|
|
}
|
|
otg_dev->host_working = 0;
|
|
}
|
|
}
|
|
end:
|
|
return retval;
|
|
}
|
|
|
|
/*
|
|
* Call suspend and resume function in udc driver
|
|
* to stop and start udc driver.
|
|
*/
|
|
int fsl_otg_start_gadget(struct otg_fsm *fsm, int on)
|
|
{
|
|
struct usb_otg *otg = fsm->otg;
|
|
struct device *dev;
|
|
|
|
if (!otg->gadget || !otg->gadget->dev.parent)
|
|
return -ENODEV;
|
|
|
|
VDBG("gadget %s\n", on ? "on" : "off");
|
|
dev = otg->gadget->dev.parent;
|
|
|
|
if (on) {
|
|
if (dev->driver->resume)
|
|
dev->driver->resume(dev);
|
|
} else {
|
|
if (dev->driver->suspend)
|
|
dev->driver->suspend(dev, otg_suspend_state);
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
/*
|
|
* Called by initialization code of host driver. Register host controller
|
|
* to the OTG. Suspend host for OTG role detection.
|
|
*/
|
|
static int fsl_otg_set_host(struct usb_otg *otg, struct usb_bus *host)
|
|
{
|
|
struct fsl_otg *otg_dev = container_of(otg->phy, struct fsl_otg, phy);
|
|
|
|
if (!otg || otg_dev != fsl_otg_dev)
|
|
return -ENODEV;
|
|
|
|
otg->host = host;
|
|
|
|
otg_dev->fsm.a_bus_drop = 0;
|
|
otg_dev->fsm.a_bus_req = 1;
|
|
|
|
if (host) {
|
|
VDBG("host off......\n");
|
|
|
|
otg->host->otg_port = fsl_otg_initdata.otg_port;
|
|
otg->host->is_b_host = otg_dev->fsm.id;
|
|
/*
|
|
* must leave time for khubd to finish its thing
|
|
* before yanking the host driver out from under it,
|
|
* so suspend the host after a short delay.
|
|
*/
|
|
otg_dev->host_working = 1;
|
|
schedule_delayed_work(&otg_dev->otg_event, 100);
|
|
return 0;
|
|
} else {
|
|
/* host driver going away */
|
|
if (!(fsl_readl(&otg_dev->dr_mem_map->otgsc) &
|
|
OTGSC_STS_USB_ID)) {
|
|
/* Mini-A cable connected */
|
|
struct otg_fsm *fsm = &otg_dev->fsm;
|
|
|
|
otg->phy->state = OTG_STATE_UNDEFINED;
|
|
fsm->protocol = PROTO_UNDEF;
|
|
}
|
|
}
|
|
|
|
otg_dev->host_working = 0;
|
|
|
|
otg_statemachine(&otg_dev->fsm);
|
|
|
|
return 0;
|
|
}
|
|
|
|
/* Called by initialization code of udc. Register udc to OTG. */
|
|
static int fsl_otg_set_peripheral(struct usb_otg *otg,
|
|
struct usb_gadget *gadget)
|
|
{
|
|
struct fsl_otg *otg_dev = container_of(otg->phy, struct fsl_otg, phy);
|
|
|
|
VDBG("otg_dev 0x%x\n", (int)otg_dev);
|
|
VDBG("fsl_otg_dev 0x%x\n", (int)fsl_otg_dev);
|
|
|
|
if (!otg || otg_dev != fsl_otg_dev)
|
|
return -ENODEV;
|
|
|
|
if (!gadget) {
|
|
if (!otg->default_a)
|
|
otg->gadget->ops->vbus_draw(otg->gadget, 0);
|
|
usb_gadget_vbus_disconnect(otg->gadget);
|
|
otg->gadget = 0;
|
|
otg_dev->fsm.b_bus_req = 0;
|
|
otg_statemachine(&otg_dev->fsm);
|
|
return 0;
|
|
}
|
|
|
|
otg->gadget = gadget;
|
|
otg->gadget->is_a_peripheral = !otg_dev->fsm.id;
|
|
|
|
otg_dev->fsm.b_bus_req = 1;
|
|
|
|
/* start the gadget right away if the ID pin says Mini-B */
|
|
DBG("ID pin=%d\n", otg_dev->fsm.id);
|
|
if (otg_dev->fsm.id == 1) {
|
|
fsl_otg_start_host(&otg_dev->fsm, 0);
|
|
otg_drv_vbus(&otg_dev->fsm, 0);
|
|
fsl_otg_start_gadget(&otg_dev->fsm, 1);
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
/* Set OTG port power, only for B-device */
|
|
static int fsl_otg_set_power(struct usb_phy *phy, unsigned mA)
|
|
{
|
|
if (!fsl_otg_dev)
|
|
return -ENODEV;
|
|
if (phy->state == OTG_STATE_B_PERIPHERAL)
|
|
pr_info("FSL OTG: Draw %d mA\n", mA);
|
|
|
|
return 0;
|
|
}
|
|
|
|
/*
|
|
* Delayed pin detect interrupt processing.
|
|
*
|
|
* When the Mini-A cable is disconnected from the board,
|
|
* the pin-detect interrupt happens before the disconnect
|
|
* interrupts for the connected device(s). In order to
|
|
* process the disconnect interrupt(s) prior to switching
|
|
* roles, the pin-detect interrupts are delayed, and handled
|
|
* by this routine.
|
|
*/
|
|
static void fsl_otg_event(struct work_struct *work)
|
|
{
|
|
struct fsl_otg *og = container_of(work, struct fsl_otg, otg_event.work);
|
|
struct otg_fsm *fsm = &og->fsm;
|
|
|
|
if (fsm->id) { /* switch to gadget */
|
|
fsl_otg_start_host(fsm, 0);
|
|
otg_drv_vbus(fsm, 0);
|
|
fsl_otg_start_gadget(fsm, 1);
|
|
}
|
|
}
|
|
|
|
/* B-device start SRP */
|
|
static int fsl_otg_start_srp(struct usb_otg *otg)
|
|
{
|
|
struct fsl_otg *otg_dev = container_of(otg->phy, struct fsl_otg, phy);
|
|
|
|
if (!otg || otg_dev != fsl_otg_dev
|
|
|| otg->phy->state != OTG_STATE_B_IDLE)
|
|
return -ENODEV;
|
|
|
|
otg_dev->fsm.b_bus_req = 1;
|
|
otg_statemachine(&otg_dev->fsm);
|
|
|
|
return 0;
|
|
}
|
|
|
|
/* A_host suspend will call this function to start hnp */
|
|
static int fsl_otg_start_hnp(struct usb_otg *otg)
|
|
{
|
|
struct fsl_otg *otg_dev = container_of(otg->phy, struct fsl_otg, phy);
|
|
|
|
if (!otg || otg_dev != fsl_otg_dev)
|
|
return -ENODEV;
|
|
|
|
DBG("start_hnp...n");
|
|
|
|
/* clear a_bus_req to enter a_suspend state */
|
|
otg_dev->fsm.a_bus_req = 0;
|
|
otg_statemachine(&otg_dev->fsm);
|
|
|
|
return 0;
|
|
}
|
|
|
|
/*
|
|
* Interrupt handler. OTG/host/peripheral share the same int line.
|
|
* OTG driver clears OTGSC interrupts and leaves USB interrupts
|
|
* intact. It needs to have knowledge of some USB interrupts
|
|
* such as port change.
|
|
*/
|
|
irqreturn_t fsl_otg_isr(int irq, void *dev_id)
|
|
{
|
|
struct otg_fsm *fsm = &((struct fsl_otg *)dev_id)->fsm;
|
|
struct usb_otg *otg = ((struct fsl_otg *)dev_id)->phy.otg;
|
|
u32 otg_int_src, otg_sc;
|
|
|
|
otg_sc = fsl_readl(&usb_dr_regs->otgsc);
|
|
otg_int_src = otg_sc & OTGSC_INTSTS_MASK & (otg_sc >> 8);
|
|
|
|
/* Only clear otg interrupts */
|
|
fsl_writel(otg_sc, &usb_dr_regs->otgsc);
|
|
|
|
/*FIXME: ID change not generate when init to 0 */
|
|
fsm->id = (otg_sc & OTGSC_STS_USB_ID) ? 1 : 0;
|
|
otg->default_a = (fsm->id == 0);
|
|
|
|
/* process OTG interrupts */
|
|
if (otg_int_src) {
|
|
if (otg_int_src & OTGSC_INTSTS_USB_ID) {
|
|
fsm->id = (otg_sc & OTGSC_STS_USB_ID) ? 1 : 0;
|
|
otg->default_a = (fsm->id == 0);
|
|
/* clear conn information */
|
|
if (fsm->id)
|
|
fsm->b_conn = 0;
|
|
else
|
|
fsm->a_conn = 0;
|
|
|
|
if (otg->host)
|
|
otg->host->is_b_host = fsm->id;
|
|
if (otg->gadget)
|
|
otg->gadget->is_a_peripheral = !fsm->id;
|
|
VDBG("ID int (ID is %d)\n", fsm->id);
|
|
|
|
if (fsm->id) { /* switch to gadget */
|
|
schedule_delayed_work(
|
|
&((struct fsl_otg *)dev_id)->otg_event,
|
|
100);
|
|
} else { /* switch to host */
|
|
cancel_delayed_work(&
|
|
((struct fsl_otg *)dev_id)->
|
|
otg_event);
|
|
fsl_otg_start_gadget(fsm, 0);
|
|
otg_drv_vbus(fsm, 1);
|
|
fsl_otg_start_host(fsm, 1);
|
|
}
|
|
return IRQ_HANDLED;
|
|
}
|
|
}
|
|
return IRQ_NONE;
|
|
}
|
|
|
|
static struct otg_fsm_ops fsl_otg_ops = {
|
|
.chrg_vbus = fsl_otg_chrg_vbus,
|
|
.drv_vbus = fsl_otg_drv_vbus,
|
|
.loc_conn = fsl_otg_loc_conn,
|
|
.loc_sof = fsl_otg_loc_sof,
|
|
.start_pulse = fsl_otg_start_pulse,
|
|
|
|
.add_timer = fsl_otg_add_timer,
|
|
.del_timer = fsl_otg_del_timer,
|
|
|
|
.start_host = fsl_otg_start_host,
|
|
.start_gadget = fsl_otg_start_gadget,
|
|
};
|
|
|
|
/* Initialize the global variable fsl_otg_dev and request IRQ for OTG */
|
|
static int fsl_otg_conf(struct platform_device *pdev)
|
|
{
|
|
struct fsl_otg *fsl_otg_tc;
|
|
int status;
|
|
|
|
if (fsl_otg_dev)
|
|
return 0;
|
|
|
|
/* allocate space to fsl otg device */
|
|
fsl_otg_tc = kzalloc(sizeof(struct fsl_otg), GFP_KERNEL);
|
|
if (!fsl_otg_tc)
|
|
return -ENOMEM;
|
|
|
|
fsl_otg_tc->phy.otg = kzalloc(sizeof(struct usb_otg), GFP_KERNEL);
|
|
if (!fsl_otg_tc->phy.otg) {
|
|
kfree(fsl_otg_tc);
|
|
return -ENOMEM;
|
|
}
|
|
|
|
INIT_DELAYED_WORK(&fsl_otg_tc->otg_event, fsl_otg_event);
|
|
|
|
INIT_LIST_HEAD(&active_timers);
|
|
status = fsl_otg_init_timers(&fsl_otg_tc->fsm);
|
|
if (status) {
|
|
pr_info("Couldn't init OTG timers\n");
|
|
goto err;
|
|
}
|
|
spin_lock_init(&fsl_otg_tc->fsm.lock);
|
|
|
|
/* Set OTG state machine operations */
|
|
fsl_otg_tc->fsm.ops = &fsl_otg_ops;
|
|
|
|
/* initialize the otg structure */
|
|
fsl_otg_tc->phy.label = DRIVER_DESC;
|
|
fsl_otg_tc->phy.set_power = fsl_otg_set_power;
|
|
|
|
fsl_otg_tc->phy.otg->phy = &fsl_otg_tc->phy;
|
|
fsl_otg_tc->phy.otg->set_host = fsl_otg_set_host;
|
|
fsl_otg_tc->phy.otg->set_peripheral = fsl_otg_set_peripheral;
|
|
fsl_otg_tc->phy.otg->start_hnp = fsl_otg_start_hnp;
|
|
fsl_otg_tc->phy.otg->start_srp = fsl_otg_start_srp;
|
|
|
|
fsl_otg_dev = fsl_otg_tc;
|
|
|
|
/* Store the otg transceiver */
|
|
status = usb_add_phy(&fsl_otg_tc->phy, USB_PHY_TYPE_USB2);
|
|
if (status) {
|
|
pr_warn(FSL_OTG_NAME ": unable to register OTG transceiver.\n");
|
|
goto err;
|
|
}
|
|
|
|
return 0;
|
|
err:
|
|
fsl_otg_uninit_timers();
|
|
kfree(fsl_otg_tc->phy.otg);
|
|
kfree(fsl_otg_tc);
|
|
return status;
|
|
}
|
|
|
|
/* OTG Initialization */
|
|
int usb_otg_start(struct platform_device *pdev)
|
|
{
|
|
struct fsl_otg *p_otg;
|
|
struct usb_phy *otg_trans = usb_get_phy(USB_PHY_TYPE_USB2);
|
|
struct otg_fsm *fsm;
|
|
int status;
|
|
struct resource *res;
|
|
u32 temp;
|
|
struct fsl_usb2_platform_data *pdata = pdev->dev.platform_data;
|
|
|
|
p_otg = container_of(otg_trans, struct fsl_otg, phy);
|
|
fsm = &p_otg->fsm;
|
|
|
|
/* Initialize the state machine structure with default values */
|
|
SET_OTG_STATE(otg_trans, OTG_STATE_UNDEFINED);
|
|
fsm->otg = p_otg->phy.otg;
|
|
|
|
/* We don't require predefined MEM/IRQ resource index */
|
|
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
|
if (!res)
|
|
return -ENXIO;
|
|
|
|
/* We don't request_mem_region here to enable resource sharing
|
|
* with host/device */
|
|
|
|
usb_dr_regs = ioremap(res->start, sizeof(struct usb_dr_mmap));
|
|
p_otg->dr_mem_map = (struct usb_dr_mmap *)usb_dr_regs;
|
|
pdata->regs = (void *)usb_dr_regs;
|
|
|
|
if (pdata->init && pdata->init(pdev) != 0)
|
|
return -EINVAL;
|
|
|
|
if (pdata->big_endian_mmio) {
|
|
_fsl_readl = _fsl_readl_be;
|
|
_fsl_writel = _fsl_writel_be;
|
|
} else {
|
|
_fsl_readl = _fsl_readl_le;
|
|
_fsl_writel = _fsl_writel_le;
|
|
}
|
|
|
|
/* request irq */
|
|
p_otg->irq = platform_get_irq(pdev, 0);
|
|
status = request_irq(p_otg->irq, fsl_otg_isr,
|
|
IRQF_SHARED, driver_name, p_otg);
|
|
if (status) {
|
|
dev_dbg(p_otg->phy.dev, "can't get IRQ %d, error %d\n",
|
|
p_otg->irq, status);
|
|
iounmap(p_otg->dr_mem_map);
|
|
kfree(p_otg->phy.otg);
|
|
kfree(p_otg);
|
|
return status;
|
|
}
|
|
|
|
/* stop the controller */
|
|
temp = fsl_readl(&p_otg->dr_mem_map->usbcmd);
|
|
temp &= ~USB_CMD_RUN_STOP;
|
|
fsl_writel(temp, &p_otg->dr_mem_map->usbcmd);
|
|
|
|
/* reset the controller */
|
|
temp = fsl_readl(&p_otg->dr_mem_map->usbcmd);
|
|
temp |= USB_CMD_CTRL_RESET;
|
|
fsl_writel(temp, &p_otg->dr_mem_map->usbcmd);
|
|
|
|
/* wait reset completed */
|
|
while (fsl_readl(&p_otg->dr_mem_map->usbcmd) & USB_CMD_CTRL_RESET)
|
|
;
|
|
|
|
/* configure the VBUSHS as IDLE(both host and device) */
|
|
temp = USB_MODE_STREAM_DISABLE | (pdata->es ? USB_MODE_ES : 0);
|
|
fsl_writel(temp, &p_otg->dr_mem_map->usbmode);
|
|
|
|
/* configure PHY interface */
|
|
temp = fsl_readl(&p_otg->dr_mem_map->portsc);
|
|
temp &= ~(PORTSC_PHY_TYPE_SEL | PORTSC_PTW);
|
|
switch (pdata->phy_mode) {
|
|
case FSL_USB2_PHY_ULPI:
|
|
temp |= PORTSC_PTS_ULPI;
|
|
break;
|
|
case FSL_USB2_PHY_UTMI_WIDE:
|
|
temp |= PORTSC_PTW_16BIT;
|
|
/* fall through */
|
|
case FSL_USB2_PHY_UTMI:
|
|
temp |= PORTSC_PTS_UTMI;
|
|
/* fall through */
|
|
default:
|
|
break;
|
|
}
|
|
fsl_writel(temp, &p_otg->dr_mem_map->portsc);
|
|
|
|
if (pdata->have_sysif_regs) {
|
|
/* configure control enable IO output, big endian register */
|
|
temp = __raw_readl(&p_otg->dr_mem_map->control);
|
|
temp |= USB_CTRL_IOENB;
|
|
__raw_writel(temp, &p_otg->dr_mem_map->control);
|
|
}
|
|
|
|
/* disable all interrupt and clear all OTGSC status */
|
|
temp = fsl_readl(&p_otg->dr_mem_map->otgsc);
|
|
temp &= ~OTGSC_INTERRUPT_ENABLE_BITS_MASK;
|
|
temp |= OTGSC_INTERRUPT_STATUS_BITS_MASK | OTGSC_CTRL_VBUS_DISCHARGE;
|
|
fsl_writel(temp, &p_otg->dr_mem_map->otgsc);
|
|
|
|
/*
|
|
* The identification (id) input is FALSE when a Mini-A plug is inserted
|
|
* in the devices Mini-AB receptacle. Otherwise, this input is TRUE.
|
|
* Also: record initial state of ID pin
|
|
*/
|
|
if (fsl_readl(&p_otg->dr_mem_map->otgsc) & OTGSC_STS_USB_ID) {
|
|
p_otg->phy.state = OTG_STATE_UNDEFINED;
|
|
p_otg->fsm.id = 1;
|
|
} else {
|
|
p_otg->phy.state = OTG_STATE_A_IDLE;
|
|
p_otg->fsm.id = 0;
|
|
}
|
|
|
|
DBG("initial ID pin=%d\n", p_otg->fsm.id);
|
|
|
|
/* enable OTG ID pin interrupt */
|
|
temp = fsl_readl(&p_otg->dr_mem_map->otgsc);
|
|
temp |= OTGSC_INTR_USB_ID_EN;
|
|
temp &= ~(OTGSC_CTRL_VBUS_DISCHARGE | OTGSC_INTR_1MS_TIMER_EN);
|
|
fsl_writel(temp, &p_otg->dr_mem_map->otgsc);
|
|
|
|
return 0;
|
|
}
|
|
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/*
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* state file in sysfs
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*/
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static int show_fsl_usb2_otg_state(struct device *dev,
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struct device_attribute *attr, char *buf)
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{
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struct otg_fsm *fsm = &fsl_otg_dev->fsm;
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char *next = buf;
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unsigned size = PAGE_SIZE;
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unsigned long flags;
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int t;
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spin_lock_irqsave(&fsm->lock, flags);
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/* basic driver infomation */
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t = scnprintf(next, size,
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DRIVER_DESC "\n" "fsl_usb2_otg version: %s\n\n",
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DRIVER_VERSION);
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size -= t;
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next += t;
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/* Registers */
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t = scnprintf(next, size,
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"OTGSC: 0x%08x\n"
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"PORTSC: 0x%08x\n"
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"USBMODE: 0x%08x\n"
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"USBCMD: 0x%08x\n"
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"USBSTS: 0x%08x\n"
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"USBINTR: 0x%08x\n",
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fsl_readl(&usb_dr_regs->otgsc),
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fsl_readl(&usb_dr_regs->portsc),
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fsl_readl(&usb_dr_regs->usbmode),
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fsl_readl(&usb_dr_regs->usbcmd),
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fsl_readl(&usb_dr_regs->usbsts),
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fsl_readl(&usb_dr_regs->usbintr));
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size -= t;
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next += t;
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/* State */
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t = scnprintf(next, size,
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"OTG state: %s\n\n",
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otg_state_string(fsl_otg_dev->phy.state));
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size -= t;
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next += t;
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/* State Machine Variables */
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t = scnprintf(next, size,
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"a_bus_req: %d\n"
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"b_bus_req: %d\n"
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"a_bus_resume: %d\n"
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"a_bus_suspend: %d\n"
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"a_conn: %d\n"
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"a_sess_vld: %d\n"
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"a_srp_det: %d\n"
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"a_vbus_vld: %d\n"
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"b_bus_resume: %d\n"
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"b_bus_suspend: %d\n"
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"b_conn: %d\n"
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"b_se0_srp: %d\n"
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"b_sess_end: %d\n"
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"b_sess_vld: %d\n"
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"id: %d\n",
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fsm->a_bus_req,
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fsm->b_bus_req,
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fsm->a_bus_resume,
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fsm->a_bus_suspend,
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fsm->a_conn,
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fsm->a_sess_vld,
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fsm->a_srp_det,
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fsm->a_vbus_vld,
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fsm->b_bus_resume,
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fsm->b_bus_suspend,
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fsm->b_conn,
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fsm->b_se0_srp,
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fsm->b_sess_end,
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fsm->b_sess_vld,
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fsm->id);
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size -= t;
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next += t;
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spin_unlock_irqrestore(&fsm->lock, flags);
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return PAGE_SIZE - size;
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}
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static DEVICE_ATTR(fsl_usb2_otg_state, S_IRUGO, show_fsl_usb2_otg_state, NULL);
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/* Char driver interface to control some OTG input */
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/*
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* Handle some ioctl command, such as get otg
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* status and set host suspend
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*/
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static long fsl_otg_ioctl(struct file *file, unsigned int cmd,
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unsigned long arg)
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{
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u32 retval = 0;
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switch (cmd) {
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case GET_OTG_STATUS:
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retval = fsl_otg_dev->host_working;
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break;
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case SET_A_SUSPEND_REQ:
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fsl_otg_dev->fsm.a_suspend_req = arg;
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break;
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case SET_A_BUS_DROP:
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fsl_otg_dev->fsm.a_bus_drop = arg;
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break;
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case SET_A_BUS_REQ:
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fsl_otg_dev->fsm.a_bus_req = arg;
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break;
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case SET_B_BUS_REQ:
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fsl_otg_dev->fsm.b_bus_req = arg;
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break;
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default:
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break;
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}
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otg_statemachine(&fsl_otg_dev->fsm);
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return retval;
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}
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static int fsl_otg_open(struct inode *inode, struct file *file)
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{
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return 0;
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}
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static int fsl_otg_release(struct inode *inode, struct file *file)
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{
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return 0;
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}
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static const struct file_operations otg_fops = {
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.owner = THIS_MODULE,
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.llseek = NULL,
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.read = NULL,
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.write = NULL,
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.unlocked_ioctl = fsl_otg_ioctl,
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.open = fsl_otg_open,
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.release = fsl_otg_release,
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};
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static int __devinit fsl_otg_probe(struct platform_device *pdev)
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{
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int ret;
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if (!pdev->dev.platform_data)
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return -ENODEV;
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/* configure the OTG */
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ret = fsl_otg_conf(pdev);
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if (ret) {
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dev_err(&pdev->dev, "Couldn't configure OTG module\n");
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return ret;
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}
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/* start OTG */
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ret = usb_otg_start(pdev);
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if (ret) {
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dev_err(&pdev->dev, "Can't init FSL OTG device\n");
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return ret;
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}
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ret = register_chrdev(FSL_OTG_MAJOR, FSL_OTG_NAME, &otg_fops);
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if (ret) {
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dev_err(&pdev->dev, "unable to register FSL OTG device\n");
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return ret;
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}
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ret = device_create_file(&pdev->dev, &dev_attr_fsl_usb2_otg_state);
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if (ret)
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dev_warn(&pdev->dev, "Can't register sysfs attribute\n");
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return ret;
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}
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static int __devexit fsl_otg_remove(struct platform_device *pdev)
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{
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struct fsl_usb2_platform_data *pdata = pdev->dev.platform_data;
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usb_remove_phy(&fsl_otg_dev->phy);
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free_irq(fsl_otg_dev->irq, fsl_otg_dev);
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iounmap((void *)usb_dr_regs);
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fsl_otg_uninit_timers();
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kfree(fsl_otg_dev->phy.otg);
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kfree(fsl_otg_dev);
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device_remove_file(&pdev->dev, &dev_attr_fsl_usb2_otg_state);
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unregister_chrdev(FSL_OTG_MAJOR, FSL_OTG_NAME);
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if (pdata->exit)
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pdata->exit(pdev);
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return 0;
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}
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|
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struct platform_driver fsl_otg_driver = {
|
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.probe = fsl_otg_probe,
|
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.remove = __devexit_p(fsl_otg_remove),
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.driver = {
|
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.name = driver_name,
|
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.owner = THIS_MODULE,
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},
|
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};
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module_platform_driver(fsl_otg_driver);
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MODULE_DESCRIPTION(DRIVER_INFO);
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MODULE_AUTHOR(DRIVER_AUTHOR);
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MODULE_LICENSE("GPL");
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