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linux/drivers/fpga
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Ira Weiny 73b0140bf0 mm/gup: change GUP fast to use flags rather than a write 'bool' 
To facilitate additional options to get_user_pages_fast() change the
singular write parameter to be gup_flags.

This patch does not change any functionality.  New functionality will
follow in subsequent patches.

Some of the get_user_pages_fast() call sites were unchanged because they
already passed FOLL_WRITE or 0 for the write parameter.

NOTE: It was suggested to change the ordering of the get_user_pages_fast()
arguments to ensure that callers were converted.  This breaks the current
GUP call site convention of having the returned pages be the final
parameter.  So the suggestion was rejected.

Link: http://lkml.kernel.org/r/20190328084422.29911-4-ira.weiny@intel.com
Link: http://lkml.kernel.org/r/20190317183438.2057-4-ira.weiny@intel.com
Signed-off-by: Ira Weiny <ira.weiny@intel.com>
Reviewed-by: Mike Marshall <hubcap@omnibond.com>
Cc: Aneesh Kumar K.V <aneesh.kumar@linux.ibm.com>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Dan Williams <dan.j.williams@intel.com>
Cc: "David S. Miller" <davem@davemloft.net>
Cc: Heiko Carstens <heiko.carstens@de.ibm.com>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: James Hogan <jhogan@kernel.org>
Cc: Jason Gunthorpe <jgg@ziepe.ca>
Cc: John Hubbard <jhubbard@nvidia.com>
Cc: "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com>
Cc: Martin Schwidefsky <schwidefsky@de.ibm.com>
Cc: Michal Hocko <mhocko@kernel.org>
Cc: Paul Mackerras <paulus@samba.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: Rich Felker <dalias@libc.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Yoshinori Sato <ysato@users.sourceforge.jp>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2019-05-14 09:47:46 -07:00
..
altera-cvp.c fpga: altera-cvp: fix probing for multiple FPGAs on the bus 2018-11-26 20:12:05 +01:00
altera-fpga2sdram.c fpga: bridge: add devm_fpga_bridge_create 2018-10-16 11:13:50 +02:00
altera-freeze-bridge.c fpga: bridge: add devm_fpga_bridge_create 2018-10-16 11:13:50 +02:00
altera-hps2fpga.c fpga: bridge: add devm_fpga_bridge_create 2018-10-16 11:13:50 +02:00
altera-pr-ip-core-plat.c fpga: use SPDX 2018-05-25 18:23:56 +02:00
altera-pr-ip-core.c fpga: mgr: add devm_fpga_mgr_create 2018-10-16 11:13:50 +02:00
altera-ps-spi.c fpga: mgr: altera-ps-spi: make array dummy static, shrinks object size 2019-01-31 16:22:51 +01:00
dfl-afu-dma-region.c mm/gup: change GUP fast to use flags rather than a write 'bool' 2019-05-14 09:47:46 -07:00
dfl-afu-main.c fpga: dfl: afu: add DFL_FPGA_PORT_DMA_MAP/UNMAP ioctls support 2018-07-15 13:55:47 +02:00
dfl-afu-region.c fpga: dfl: afu: add afu sub feature support 2018-07-15 13:55:47 +02:00
dfl-afu.h fpga: dfl: afu: add DFL_FPGA_PORT_DMA_MAP/UNMAP ioctls support 2018-07-15 13:55:47 +02:00
dfl-fme-br.c fpga: bridge: add devm_fpga_bridge_create 2018-10-16 11:13:50 +02:00
dfl-fme-main.c fpga: dfl: fme: add partial reconfiguration sub feature support 2018-07-15 13:55:46 +02:00
dfl-fme-mgr.c fpga: mgr: add devm_fpga_mgr_create 2018-10-16 11:13:50 +02:00
dfl-fme-pr.c Remove 'type' argument from access_ok() function 2019-01-03 18:57:57 -08:00
dfl-fme-pr.h fpga: dfl: fme: add partial reconfiguration sub feature support 2018-07-15 13:55:46 +02:00
dfl-fme-region.c fpga: dfl-fme-region: Use platform_get_drvdata() 2018-11-26 20:47:10 +01:00
dfl-fme.h fpga: dfl: fme: add partial reconfiguration sub feature support 2018-07-15 13:55:46 +02:00
dfl-pci.c fpga: dfl-pci: add enumeration for feature devices 2018-07-15 13:55:45 +02:00
dfl.c fpga: add devm_fpga_region_create 2018-10-16 11:13:50 +02:00
dfl.h fpga: dfl: add dfl_fpga_check_port_id function. 2018-07-15 13:55:45 +02:00
fpga-bridge.c fpga: bridge: add devm_fpga_bridge_create 2018-10-16 11:13:50 +02:00
fpga-mgr.c fpga: mgr: add devm_fpga_mgr_create 2018-10-16 11:13:50 +02:00
fpga-region.c fpga: add devm_fpga_region_create 2018-10-16 11:13:50 +02:00
ice40-spi.c fpga: mgr: add devm_fpga_mgr_create 2018-10-16 11:13:50 +02:00
Kconfig fpga: altera_freeze_bridge: remove restriction to socfpga 2019-01-31 16:22:51 +01:00
machxo2-spi.c fpga: mgr: add devm_fpga_mgr_create 2018-10-16 11:13:50 +02:00
Makefile fpga: add intel stratix10 soc fpga manager driver 2018-11-26 20:15:07 +01:00
of-fpga-region.c fpga: of-fpga-region: Use platform_set_drvdata 2018-11-26 20:47:10 +01:00
socfpga-a10.c fpga: mgr: add devm_fpga_mgr_create 2018-10-16 11:13:50 +02:00
socfpga.c fpga: mgr: add devm_fpga_mgr_create 2018-10-16 11:13:50 +02:00
stratix10-soc.c fpga: stratix10-soc: fix wrong of_node_put() in init function 2019-01-31 16:19:48 +01:00
ts73xx-fpga.c fpga: mgr: add devm_fpga_mgr_create 2018-10-16 11:13:50 +02:00
xilinx-pr-decoupler.c fpga: bridge: add devm_fpga_bridge_create 2018-10-16 11:13:50 +02:00
xilinx-spi.c fpga: mgr: add devm_fpga_mgr_create 2018-10-16 11:13:50 +02:00
zynq-fpga.c zynq-fpga: Only route PR via PCAP when required 2018-11-11 12:58:27 -08:00