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f15cbe6f1a
This follows the sparc changes a439fe51a1
.
Most of the moving about was done with Sam's directions at:
http://marc.info/?l=linux-sh&m=121724823706062&w=2
with subsequent hacking and fixups entirely my fault.
Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
35 lines
906 B
C
35 lines
906 B
C
/*
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* include/asm-sh/dreamcast/dma.h
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*
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* Copyright (C) 2003 Paul Mundt
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*/
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#ifndef __ASM_SH_DREAMCAST_DMA_H
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#define __ASM_SH_DREAMCAST_DMA_H
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/* Number of DMA channels */
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#define ONCHIP_NR_DMA_CHANNELS 4
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#define G2_NR_DMA_CHANNELS 4
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#define PVR2_NR_DMA_CHANNELS 1
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/* Channels for cascading */
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#define PVR2_CASCADE_CHAN 2
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#define G2_CASCADE_CHAN 3
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/* PVR2 DMA Registers */
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#define PVR2_DMA_BASE 0xa05f6800
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#define PVR2_DMA_ADDR (PVR2_DMA_BASE + 0)
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#define PVR2_DMA_COUNT (PVR2_DMA_BASE + 4)
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#define PVR2_DMA_MODE (PVR2_DMA_BASE + 8)
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#define PVR2_DMA_LMMODE0 (PVR2_DMA_BASE + 132)
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#define PVR2_DMA_LMMODE1 (PVR2_DMA_BASE + 136)
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/* G2 DMA Register */
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#define G2_DMA_BASE 0xa05f7800
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#endif /* __ASM_SH_DREAMCAST_DMA_H */
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