mirror of
https://github.com/torvalds/linux.git
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1da177e4c3
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
354 lines
8.9 KiB
C
354 lines
8.9 KiB
C
/****************************************************************************/
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/*
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* mcfne.h -- NE2000 in ColdFire eval boards.
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*
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* (C) Copyright 1999-2000, Greg Ungerer (gerg@snapgear.com)
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* (C) Copyright 2000, Lineo (www.lineo.com)
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* (C) Copyright 2001, SnapGear (www.snapgear.com)
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*
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* 19990409 David W. Miller Converted from m5206ne.h for 5307 eval board
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*
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* Hacked support for m5206e Cadre III evaluation board
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* Fred Stevens (fred.stevens@pemstar.com) 13 April 1999
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*/
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/****************************************************************************/
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#ifndef mcfne_h
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#define mcfne_h
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/****************************************************************************/
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#include <linux/config.h>
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/*
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* Support for NE2000 clones devices in ColdFire based boards.
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* Not all boards address these parts the same way, some use a
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* direct addressing method, others use a side-band address space
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* to access odd address registers, some require byte swapping
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* others do not.
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*/
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#define BSWAP(w) (((w) << 8) | ((w) >> 8))
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#define RSWAP(w) (w)
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/*
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* Define the basic hardware resources of NE2000 boards.
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*/
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#if defined(CONFIG_M5206) && defined(CONFIG_ARNEWSH)
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#define NE2000_ADDR 0x40000300
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#define NE2000_ODDOFFSET 0x00010000
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#define NE2000_IRQ_VECTOR 0xf0
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#define NE2000_IRQ_PRIORITY 2
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#define NE2000_IRQ_LEVEL 4
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#define NE2000_BYTE volatile unsigned short
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#endif
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#if defined(CONFIG_M5206e) && defined(CONFIG_MOTOROLA)
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#define NE2000_ADDR 0x40000300
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#define NE2000_ODDOFFSET 0x00010000
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#define NE2000_IRQ_VECTOR 0x1c
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#define NE2000_IRQ_PRIORITY 2
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#define NE2000_IRQ_LEVEL 4
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#define NE2000_BYTE volatile unsigned short
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#endif
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#if defined(CONFIG_M5206e) && defined(CONFIG_NETtel)
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#define NE2000_ADDR 0x30000300
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#define NE2000_IRQ_VECTOR 25
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#define NE2000_IRQ_PRIORITY 1
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#define NE2000_IRQ_LEVEL 3
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#define NE2000_BYTE volatile unsigned char
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#endif
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#if defined(CONFIG_M5206e) && defined(CONFIG_CFV240)
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#define NE2000_ADDR 0x40010000
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#define NE2000_ADDR1 0x40010001
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#define NE2000_ODDOFFSET 0x00000000
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#define NE2000_IRQ 1
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#define NE2000_IRQ_VECTOR 0x19
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#define NE2000_IRQ_PRIORITY 2
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#define NE2000_IRQ_LEVEL 1
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#define NE2000_BYTE volatile unsigned char
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#endif
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#if defined(CONFIG_M5307) && defined(CONFIG_MOTOROLA)
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#define NE2000_ADDR 0x40000300
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#define NE2000_ODDOFFSET 0x00010000
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#define NE2000_IRQ_VECTOR 0x1b
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#define NE2000_BYTE volatile unsigned short
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#endif
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#if defined(CONFIG_M5272) && defined(CONFIG_NETtel)
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#define NE2000_ADDR 0x30600300
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#define NE2000_ODDOFFSET 0x00008000
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#define NE2000_IRQ_VECTOR 67
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#undef BSWAP
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#define BSWAP(w) (w)
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#define NE2000_BYTE volatile unsigned short
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#undef RSWAP
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#define RSWAP(w) (((w) << 8) | ((w) >> 8))
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#endif
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#if defined(CONFIG_M5307) && defined(CONFIG_NETtel)
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#define NE2000_ADDR0 0x30600300
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#define NE2000_ADDR1 0x30800300
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#define NE2000_ODDOFFSET 0x00008000
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#define NE2000_IRQ_VECTOR0 27
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#define NE2000_IRQ_VECTOR1 29
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#undef BSWAP
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#define BSWAP(w) (w)
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#define NE2000_BYTE volatile unsigned short
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#undef RSWAP
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#define RSWAP(w) (((w) << 8) | ((w) >> 8))
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#endif
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#if defined(CONFIG_M5307) && defined(CONFIG_SECUREEDGEMP3)
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#define NE2000_ADDR 0x30600300
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#define NE2000_ODDOFFSET 0x00008000
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#define NE2000_IRQ_VECTOR 27
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#undef BSWAP
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#define BSWAP(w) (w)
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#define NE2000_BYTE volatile unsigned short
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#undef RSWAP
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#define RSWAP(w) (((w) << 8) | ((w) >> 8))
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#endif
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#if defined(CONFIG_M5307) && defined(CONFIG_ARNEWSH)
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#define NE2000_ADDR 0xfe600300
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#define NE2000_ODDOFFSET 0x00010000
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#define NE2000_IRQ_VECTOR 0x1b
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#define NE2000_IRQ_PRIORITY 2
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#define NE2000_IRQ_LEVEL 3
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#define NE2000_BYTE volatile unsigned short
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#endif
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#if defined(CONFIG_M5407)
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#define NE2000_ADDR 0x40000300
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#define NE2000_ODDOFFSET 0x00010000
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#define NE2000_IRQ_VECTOR 0x1b
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#define NE2000_BYTE volatile unsigned short
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#endif
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/****************************************************************************/
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/*
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* Side-band address space for odd address requires re-mapping
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* many of the standard ISA access functions.
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*/
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#ifdef NE2000_ODDOFFSET
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#undef outb
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#undef outb_p
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#undef inb
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#undef inb_p
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#undef outsb
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#undef outsw
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#undef insb
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#undef insw
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#define outb ne2000_outb
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#define inb ne2000_inb
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#define outb_p ne2000_outb
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#define inb_p ne2000_inb
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#define outsb ne2000_outsb
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#define outsw ne2000_outsw
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#define insb ne2000_insb
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#define insw ne2000_insw
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#ifndef COLDFIRE_NE2000_FUNCS
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void ne2000_outb(unsigned int val, unsigned int addr);
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int ne2000_inb(unsigned int addr);
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void ne2000_insb(unsigned int addr, void *vbuf, int unsigned long len);
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void ne2000_insw(unsigned int addr, void *vbuf, unsigned long len);
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void ne2000_outsb(unsigned int addr, void *vbuf, unsigned long len);
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void ne2000_outsw(unsigned int addr, void *vbuf, unsigned long len);
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#else
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/*
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* This macro converts a conventional register address into the
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* real memory pointer of the mapped NE2000 device.
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* On most NE2000 implementations on ColdFire boards the chip is
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* mapped in kinda funny, due to its ISA heritage.
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*/
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#ifdef CONFIG_CFV240
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#define NE2000_PTR(addr) (NE2000_ADDR + ((addr & 0x3f) << 1) + 1)
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#define NE2000_DATA_PTR(addr) (NE2000_ADDR + ((addr & 0x3f) << 1))
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#else
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#define NE2000_PTR(addr) ((addr&0x1)?(NE2000_ODDOFFSET+addr-1):(addr))
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#define NE2000_DATA_PTR(addr) (addr)
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#endif
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void ne2000_outb(unsigned int val, unsigned int addr)
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{
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NE2000_BYTE *rp;
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rp = (NE2000_BYTE *) NE2000_PTR(addr);
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*rp = RSWAP(val);
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}
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int ne2000_inb(unsigned int addr)
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{
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NE2000_BYTE *rp, val;
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rp = (NE2000_BYTE *) NE2000_PTR(addr);
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val = *rp;
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return((int) ((NE2000_BYTE) RSWAP(val)));
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}
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void ne2000_insb(unsigned int addr, void *vbuf, int unsigned long len)
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{
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NE2000_BYTE *rp, val;
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unsigned char *buf;
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buf = (unsigned char *) vbuf;
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rp = (NE2000_BYTE *) NE2000_DATA_PTR(addr);
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for (; (len > 0); len--) {
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val = *rp;
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*buf++ = RSWAP(val);
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}
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}
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void ne2000_insw(unsigned int addr, void *vbuf, unsigned long len)
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{
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volatile unsigned short *rp;
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unsigned short w, *buf;
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buf = (unsigned short *) vbuf;
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rp = (volatile unsigned short *) NE2000_DATA_PTR(addr);
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for (; (len > 0); len--) {
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w = *rp;
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*buf++ = BSWAP(w);
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}
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}
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void ne2000_outsb(unsigned int addr, const void *vbuf, unsigned long len)
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{
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NE2000_BYTE *rp, val;
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unsigned char *buf;
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buf = (unsigned char *) vbuf;
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rp = (NE2000_BYTE *) NE2000_DATA_PTR(addr);
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for (; (len > 0); len--) {
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val = *buf++;
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*rp = RSWAP(val);
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}
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}
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void ne2000_outsw(unsigned int addr, const void *vbuf, unsigned long len)
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{
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volatile unsigned short *rp;
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unsigned short w, *buf;
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buf = (unsigned short *) vbuf;
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rp = (volatile unsigned short *) NE2000_DATA_PTR(addr);
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for (; (len > 0); len--) {
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w = *buf++;
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*rp = BSWAP(w);
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}
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}
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#endif /* COLDFIRE_NE2000_FUNCS */
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#endif /* NE2000_OFFOFFSET */
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/****************************************************************************/
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#ifdef COLDFIRE_NE2000_FUNCS
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/*
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* Lastly the interrupt set up code...
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* Minor differences between the different board types.
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*/
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#if defined(CONFIG_M5206) && defined(CONFIG_ARNEWSH)
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void ne2000_irqsetup(int irq)
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{
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volatile unsigned char *icrp;
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icrp = (volatile unsigned char *) (MCF_MBAR + MCFSIM_ICR4);
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*icrp = MCFSIM_ICR_LEVEL4 | MCFSIM_ICR_PRI2;
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mcf_setimr(mcf_getimr() & ~MCFSIM_IMR_EINT4);
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}
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#endif
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#if defined(CONFIG_M5206e) && defined(CONFIG_MOTOROLA)
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void ne2000_irqsetup(int irq)
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{
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volatile unsigned char *icrp;
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icrp = (volatile unsigned char *) (MCF_MBAR + MCFSIM_ICR4);
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*icrp = MCFSIM_ICR_LEVEL4 | MCFSIM_ICR_PRI2 | MCFSIM_ICR_AUTOVEC;
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mcf_setimr(mcf_getimr() & ~MCFSIM_IMR_EINT4);
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}
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#endif
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#if defined(CONFIG_M5206e) && defined(CONFIG_CFV240)
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void ne2000_irqsetup(int irq)
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{
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volatile unsigned char *icrp;
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icrp = (volatile unsigned char *) (MCF_MBAR + MCFSIM_ICR1);
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*icrp = MCFSIM_ICR_LEVEL1 | MCFSIM_ICR_PRI2 | MCFSIM_ICR_AUTOVEC;
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mcf_setimr(mcf_getimr() & ~MCFSIM_IMR_EINT1);
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}
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#endif
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#if defined(CONFIG_M5206e) && defined(CONFIG_NETtel)
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void ne2000_irqsetup(int irq)
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{
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mcf_autovector(irq);
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}
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#endif
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#if defined(CONFIG_M5272) && defined(CONFIG_NETtel)
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void ne2000_irqsetup(int irq)
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{
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volatile unsigned long *icrp;
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volatile unsigned long *pitr;
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/* The NE2000 device uses external IRQ3 */
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icrp = (volatile unsigned long *) (MCF_MBAR + MCFSIM_ICR1);
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*icrp = (*icrp & 0x77077777) | 0x00d00000;
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pitr = (volatile unsigned long *) (MCF_MBAR + MCFSIM_PITR);
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*pitr = *pitr | 0x20000000;
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}
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void ne2000_irqack(int irq)
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{
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volatile unsigned long *icrp;
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/* The NE2000 device uses external IRQ3 */
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icrp = (volatile unsigned long *) (MCF_MBAR + MCFSIM_ICR1);
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*icrp = (*icrp & 0x77777777) | 0x00800000;
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}
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#endif
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#if defined(CONFIG_M5307) || defined(CONFIG_M5407)
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#if defined(CONFIG_NETtel) || defined(CONFIG_SECUREEDGEMP3)
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void ne2000_irqsetup(int irq)
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{
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mcf_setimr(mcf_getimr() & ~MCFSIM_IMR_EINT3);
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mcf_autovector(irq);
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}
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#else
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void ne2000_irqsetup(int irq)
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{
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mcf_setimr(mcf_getimr() & ~MCFSIM_IMR_EINT3);
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}
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#endif /* ! CONFIG_NETtel || CONFIG_SECUREEDGEMP3 */
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#endif /* CONFIG_M5307 || CONFIG_M5407 */
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#endif /* COLDFIRE_NE2000_FUNCS */
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/****************************************************************************/
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#endif /* mcfne_h */
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