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65c9ad77cb
Add a MODULE_DEVICE_TABLE() on all clocks that can be built as modules to allow auto-load at boot. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Chen-Yu Tsai <wenst@chromium.org> Tested-by: Miles Chen <miles.chen@mediatek.com> Tested-by: Chen-Yu Tsai <wenst@chromium.org> # MT8183, MT8192, MT8195 Chromebooks Link: https://lore.kernel.org/r/20230306140543.1813621-50-angelogioacchino.delregno@collabora.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
69 lines
1.8 KiB
C
69 lines
1.8 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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//
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// Copyright (c) 2022 MediaTek Inc.
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// Author: Chun-Jie Chen <chun-jie.chen@mediatek.com>
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#include <linux/clk-provider.h>
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#include <linux/platform_device.h>
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#include <dt-bindings/clock/mt8186-clk.h>
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#include "clk-mtk.h"
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static const char * const mcu_armpll_ll_parents[] = {
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"clk26m",
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"armpll_ll",
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"mainpll",
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"univpll_d2"
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};
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static const char * const mcu_armpll_bl_parents[] = {
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"clk26m",
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"armpll_bl",
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"mainpll",
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"univpll_d2"
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};
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static const char * const mcu_armpll_bus_parents[] = {
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"clk26m",
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"ccipll",
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"mainpll",
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"univpll_d2"
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};
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/*
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* We only configure the CPU muxes when adjust CPU frequency in MediaTek CPUFreq Driver.
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* Other fields like divider always keep the same value. (set once in bootloader)
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*/
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static struct mtk_composite mcu_muxes[] = {
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/* CPU_PLLDIV_CFG0 */
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MUX(CLK_MCU_ARMPLL_LL_SEL, "mcu_armpll_ll_sel", mcu_armpll_ll_parents, 0x2A0, 9, 2),
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/* CPU_PLLDIV_CFG1 */
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MUX(CLK_MCU_ARMPLL_BL_SEL, "mcu_armpll_bl_sel", mcu_armpll_bl_parents, 0x2A4, 9, 2),
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/* BUS_PLLDIV_CFG */
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MUX(CLK_MCU_ARMPLL_BUS_SEL, "mcu_armpll_bus_sel", mcu_armpll_bus_parents, 0x2E0, 9, 2),
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};
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static const struct mtk_clk_desc mcu_desc = {
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.composite_clks = mcu_muxes,
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.num_composite_clks = ARRAY_SIZE(mcu_muxes),
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};
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static const struct of_device_id of_match_clk_mt8186_mcu[] = {
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{ .compatible = "mediatek,mt8186-mcusys", .data = &mcu_desc },
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{ /* sentinel */}
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};
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MODULE_DEVICE_TABLE(of, of_match_clk_mt8186_mcu);
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static struct platform_driver clk_mt8186_mcu_drv = {
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.driver = {
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.name = "clk-mt8186-mcu",
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.of_match_table = of_match_clk_mt8186_mcu,
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},
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.probe = mtk_clk_simple_probe,
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.remove = mtk_clk_simple_remove,
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};
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module_platform_driver(clk_mt8186_mcu_drv);
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MODULE_DESCRIPTION("MediaTek MT8186 mcusys clocks driver");
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MODULE_LICENSE("GPL");
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