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Add clock definition and driver code for CV1800 SoC. Signed-off-by: Inochi Amaoto <inochiama@outlook.com> Link:6f4e9b8ecb/duo/datasheet/CV180X-Clock-v1.xlsxLink:6f4e9b8ecb/duo/datasheet/CV1800B-CV1801B-Preliminary-Datasheet-full-en.pdfLink: https://lore.kernel.org/r/IA1PR20MB49534F37F802CAF117364D66BB262@IA1PR20MB4953.namprd20.prod.outlook.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
82 lines
2.0 KiB
C
82 lines
2.0 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (C) 2023 Inochi Amaoto <inochiama@outlook.com>
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*/
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#ifndef _CLK_SOPHGO_CV18XX_IP_H_
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#define _CLK_SOPHGO_CV18XX_IP_H_
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#include <linux/compiler.h>
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#include <linux/clk-provider.h>
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#include <linux/bitfield.h>
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struct cv1800_clk_common {
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void __iomem *base;
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spinlock_t *lock;
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struct clk_hw hw;
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unsigned long features;
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};
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#define CV1800_CLK_COMMON(_name, _parents, _op, _flags) \
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{ \
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.hw.init = CLK_HW_INIT_PARENTS_DATA(_name, _parents, \
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_op, _flags), \
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}
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static inline struct cv1800_clk_common *
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hw_to_cv1800_clk_common(struct clk_hw *hw)
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{
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return container_of(hw, struct cv1800_clk_common, hw);
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}
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struct cv1800_clk_regbit {
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u16 reg;
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s8 shift;
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};
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struct cv1800_clk_regfield {
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u16 reg;
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u8 shift;
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u8 width;
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s16 initval;
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unsigned long flags;
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};
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#define CV1800_CLK_BIT(_reg, _shift) \
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{ \
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.reg = _reg, \
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.shift = _shift, \
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}
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#define CV1800_CLK_REG(_reg, _shift, _width, _initval, _flags) \
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{ \
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.reg = _reg, \
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.shift = _shift, \
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.width = _width, \
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.initval = _initval, \
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.flags = _flags, \
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}
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#define cv1800_clk_regfield_genmask(_reg) \
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GENMASK((_reg)->shift + (_reg)->width - 1, (_reg)->shift)
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#define cv1800_clk_regfield_get(_val, _reg) \
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(((_val) >> (_reg)->shift) & GENMASK((_reg)->width - 1, 0))
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#define cv1800_clk_regfield_set(_val, _new, _reg) \
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(((_val) & ~cv1800_clk_regfield_genmask((_reg))) | \
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(((_new) & GENMASK((_reg)->width - 1, 0)) << (_reg)->shift))
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#define _CV1800_SET_FIELD(_reg, _val, _field) \
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(((_reg) & ~(_field)) | FIELD_PREP((_field), (_val)))
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int cv1800_clk_setbit(struct cv1800_clk_common *common,
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struct cv1800_clk_regbit *field);
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int cv1800_clk_clearbit(struct cv1800_clk_common *common,
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struct cv1800_clk_regbit *field);
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int cv1800_clk_checkbit(struct cv1800_clk_common *common,
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struct cv1800_clk_regbit *field);
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void cv1800_clk_wait_for_lock(struct cv1800_clk_common *common,
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u32 reg, u32 lock);
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#endif // _CLK_SOPHGO_CV18XX_IP_H_
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