linux/arch/arm/mach-cns3xxx
Nicolas Pitre 639da5ee37 ARM: add an extra temp register to the low level debugging addruart macro
Some platforms (like OMAP not to name it) are doing rather complicated
hacks just to determine the base UART address to use.  Let's give their
addruart macro some slack by providing an extra work register which will
allow for much needed cleanups.

This is basically a no-op as this commit is only adding the extra argument
to the macro but no one is using it yet.

Signed-off-by: nicolas Pitre <nicolas.pitre@linaro.org>
Reviewed-by: Kevin Hilman <khilman@ti.com>
2011-09-26 10:11:25 -04:00
..
include/mach ARM: add an extra temp register to the low level debugging addruart macro 2011-09-26 10:11:25 -04:00
cns3420vb.c ARM: mach-cns3xxx: convert boot_params to atag_offset 2011-08-21 17:14:43 -04:00
core.c ARM: cns3xxx: Add support for L2 Cache Controller 2011-07-07 18:48:38 +04:00
core.h ARM: cns3xxx: Add support for L2 Cache Controller 2011-07-07 18:48:38 +04:00
devices.c ARM: cns3xxx: Add new and export the old power management functions 2010-11-26 21:10:50 +03:00
devices.h ARM: cns3xxx: Add support for AHCI controllers 2010-06-08 17:37:09 +04:00
Kconfig ARM: 6520/1: Kconfig: add new symbol MIGHT_HAVE_PCI 2010-12-05 08:39:30 +00:00
Makefile ARM: cns3xxx: Add support for SDHCI controllers 2010-06-08 17:37:09 +04:00
Makefile.boot ARM: cns3xxx: Add basic support for Cavium Networks CNS3xxx processors 2010-05-02 21:55:46 +04:00
pcie.c Merge branch 'linux-next' of git://git.kernel.org/pub/scm/linux/kernel/git/jbarnes/pci-2.6 2011-07-29 23:35:05 -07:00
pm.c atomic: use <linux/atomic.h> 2011-07-26 16:49:47 -07:00