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d2912cb15b
Based on 2 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation # extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 4122 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Enrico Weigelt <info@metux.net> Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org> Reviewed-by: Allison Randal <allison@lohutok.net> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190604081206.933168790@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
147 lines
3.2 KiB
C
147 lines
3.2 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Atheros AR7XXX/AR9XXX SoC early printk support
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*
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* Copyright (C) 2008-2011 Gabor Juhos <juhosg@openwrt.org>
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* Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
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*/
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#include <linux/io.h>
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#include <linux/errno.h>
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#include <linux/serial_reg.h>
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#include <asm/addrspace.h>
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#include <asm/setup.h>
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#include <asm/mach-ath79/ath79.h>
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#include <asm/mach-ath79/ar71xx_regs.h>
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#include <asm/mach-ath79/ar933x_uart.h>
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static void (*_prom_putchar)(char);
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static inline void prom_putchar_wait(void __iomem *reg, u32 mask, u32 val)
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{
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u32 t;
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do {
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t = __raw_readl(reg);
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if ((t & mask) == val)
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break;
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} while (1);
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}
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#define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)
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static void prom_putchar_ar71xx(char ch)
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{
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void __iomem *base = (void __iomem *)(KSEG1ADDR(AR71XX_UART_BASE));
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prom_putchar_wait(base + UART_LSR * 4, BOTH_EMPTY, BOTH_EMPTY);
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__raw_writel((unsigned char)ch, base + UART_TX * 4);
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prom_putchar_wait(base + UART_LSR * 4, BOTH_EMPTY, BOTH_EMPTY);
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}
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static void prom_putchar_ar933x(char ch)
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{
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void __iomem *base = (void __iomem *)(KSEG1ADDR(AR933X_UART_BASE));
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prom_putchar_wait(base + AR933X_UART_DATA_REG, AR933X_UART_DATA_TX_CSR,
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AR933X_UART_DATA_TX_CSR);
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__raw_writel(AR933X_UART_DATA_TX_CSR | (unsigned char)ch,
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base + AR933X_UART_DATA_REG);
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prom_putchar_wait(base + AR933X_UART_DATA_REG, AR933X_UART_DATA_TX_CSR,
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AR933X_UART_DATA_TX_CSR);
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}
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static void prom_putchar_dummy(char ch)
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{
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/* nothing to do */
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}
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static void prom_enable_uart(u32 id)
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{
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void __iomem *gpio_base;
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u32 uart_en;
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u32 t;
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switch (id) {
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case REV_ID_MAJOR_AR71XX:
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uart_en = AR71XX_GPIO_FUNC_UART_EN;
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break;
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case REV_ID_MAJOR_AR7240:
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case REV_ID_MAJOR_AR7241:
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case REV_ID_MAJOR_AR7242:
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uart_en = AR724X_GPIO_FUNC_UART_EN;
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break;
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case REV_ID_MAJOR_AR913X:
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uart_en = AR913X_GPIO_FUNC_UART_EN;
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break;
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case REV_ID_MAJOR_AR9330:
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case REV_ID_MAJOR_AR9331:
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uart_en = AR933X_GPIO_FUNC_UART_EN;
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break;
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case REV_ID_MAJOR_AR9341:
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case REV_ID_MAJOR_AR9342:
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case REV_ID_MAJOR_AR9344:
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/* TODO */
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default:
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return;
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}
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gpio_base = (void __iomem *)KSEG1ADDR(AR71XX_GPIO_BASE);
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t = __raw_readl(gpio_base + AR71XX_GPIO_REG_FUNC);
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t |= uart_en;
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__raw_writel(t, gpio_base + AR71XX_GPIO_REG_FUNC);
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}
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static void prom_putchar_init(void)
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{
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void __iomem *base;
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u32 id;
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base = (void __iomem *)(KSEG1ADDR(AR71XX_RESET_BASE));
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id = __raw_readl(base + AR71XX_RESET_REG_REV_ID);
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id &= REV_ID_MAJOR_MASK;
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switch (id) {
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case REV_ID_MAJOR_AR71XX:
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case REV_ID_MAJOR_AR7240:
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case REV_ID_MAJOR_AR7241:
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case REV_ID_MAJOR_AR7242:
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case REV_ID_MAJOR_AR913X:
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case REV_ID_MAJOR_AR9341:
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case REV_ID_MAJOR_AR9342:
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case REV_ID_MAJOR_AR9344:
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case REV_ID_MAJOR_QCA9533:
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case REV_ID_MAJOR_QCA9533_V2:
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case REV_ID_MAJOR_QCA9556:
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case REV_ID_MAJOR_QCA9558:
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case REV_ID_MAJOR_TP9343:
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case REV_ID_MAJOR_QCA956X:
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_prom_putchar = prom_putchar_ar71xx;
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break;
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case REV_ID_MAJOR_AR9330:
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case REV_ID_MAJOR_AR9331:
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_prom_putchar = prom_putchar_ar933x;
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break;
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default:
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_prom_putchar = prom_putchar_dummy;
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return;
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}
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prom_enable_uart(id);
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}
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void prom_putchar(char ch)
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{
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if (!_prom_putchar)
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prom_putchar_init();
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_prom_putchar(ch);
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}
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