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b65769fc01
This fixes a bug in read_persistent_clock() which causes the system clock to lag the Real Time Clock by one month. The problem was noticed on a Mac, but theoretically it must also affect Atari, BVME6000 and Q40. The tm_mon value in the struct rtc_time passed to mach_hwclk() is zero-based, and atari_mste_hwclk(), atari_tt_hwclk(), bvme6000_hwclk(), mac_hwclk() and q40_hwclk() all make this adjustment. Unfortunately, dn_dummy_hwclk(), mvme147_hwclk(), mvme16x_hwclk(), sun3_hwclk() and sun3x_hwclk() fail to decrement tm_mon. Also m68328_hwclk() assumes a one-based tm_mon. Bring these platforms into line and fix read_persistent_clock() so it works correctly on all m68k platforms. The datasheets for the RTC devices found on the affected platforms all confirm that the year is stored as a value in the range 0-99 and the month is stored as a value in the range 1-12. Please refer to the datasheets for MC146818 (Apollo), DS1643 (MVME), ICM7170 (Sun 3) and M48T02 (Sun 3x). Reported-by: Stan Johnson <userm57@yahoo.com> Signed-off-by: Finn Thain <fthain@telegraphics.com.au> Reviewed-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
140 lines
3.4 KiB
C
140 lines
3.4 KiB
C
/***************************************************************************/
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/*
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* timers.c - Generic hardware timer support.
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*
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* Copyright (C) 1993 Hamish Macdonald
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* Copyright (C) 1999 D. Jeff Dionne
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* Copyright (C) 2001 Georges Menie, Ken Desmet
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file COPYING in the main directory of this archive
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* for more details.
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*/
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/***************************************************************************/
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#include <linux/types.h>
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#include <linux/kernel.h>
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#include <linux/mm.h>
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#include <linux/interrupt.h>
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#include <linux/irq.h>
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#include <linux/clocksource.h>
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#include <linux/rtc.h>
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#include <asm/setup.h>
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#include <asm/pgtable.h>
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#include <asm/machdep.h>
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#include <asm/MC68VZ328.h>
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/***************************************************************************/
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#if defined(CONFIG_DRAGEN2)
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/* with a 33.16 MHz clock, this will give usec resolution to the time functions */
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#define CLOCK_SOURCE TCTL_CLKSOURCE_SYSCLK
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#define CLOCK_PRE 7
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#define TICKS_PER_JIFFY 41450
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#elif defined(CONFIG_XCOPILOT_BUGS)
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/*
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* The only thing I know is that CLK32 is not available on Xcopilot
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* I have little idea about what frequency SYSCLK has on Xcopilot.
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* The values for prescaler and compare registers were simply
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* taken from the original source
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*/
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#define CLOCK_SOURCE TCTL_CLKSOURCE_SYSCLK
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#define CLOCK_PRE 2
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#define TICKS_PER_JIFFY 0xd7e4
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#else
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/* default to using the 32Khz clock */
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#define CLOCK_SOURCE TCTL_CLKSOURCE_32KHZ
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#define CLOCK_PRE 31
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#define TICKS_PER_JIFFY 10
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#endif
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static u32 m68328_tick_cnt;
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static irq_handler_t timer_interrupt;
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/***************************************************************************/
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static irqreturn_t hw_tick(int irq, void *dummy)
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{
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/* Reset Timer1 */
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TSTAT &= 0;
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m68328_tick_cnt += TICKS_PER_JIFFY;
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return timer_interrupt(irq, dummy);
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}
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/***************************************************************************/
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static struct irqaction m68328_timer_irq = {
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.name = "timer",
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.flags = IRQF_TIMER,
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.handler = hw_tick,
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};
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/***************************************************************************/
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static u64 m68328_read_clk(struct clocksource *cs)
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{
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unsigned long flags;
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u32 cycles;
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local_irq_save(flags);
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cycles = m68328_tick_cnt + TCN;
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local_irq_restore(flags);
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return cycles;
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}
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/***************************************************************************/
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static struct clocksource m68328_clk = {
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.name = "timer",
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.rating = 250,
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.read = m68328_read_clk,
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.mask = CLOCKSOURCE_MASK(32),
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.flags = CLOCK_SOURCE_IS_CONTINUOUS,
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};
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/***************************************************************************/
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void hw_timer_init(irq_handler_t handler)
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{
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/* disable timer 1 */
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TCTL = 0;
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/* set ISR */
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setup_irq(TMR_IRQ_NUM, &m68328_timer_irq);
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/* Restart mode, Enable int, Set clock source */
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TCTL = TCTL_OM | TCTL_IRQEN | CLOCK_SOURCE;
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TPRER = CLOCK_PRE;
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TCMP = TICKS_PER_JIFFY;
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/* Enable timer 1 */
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TCTL |= TCTL_TEN;
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clocksource_register_hz(&m68328_clk, TICKS_PER_JIFFY*HZ);
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timer_interrupt = handler;
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}
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/***************************************************************************/
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int m68328_hwclk(int set, struct rtc_time *t)
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{
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if (!set) {
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long now = RTCTIME;
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t->tm_year = 1;
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t->tm_mon = 0;
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t->tm_mday = 1;
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t->tm_hour = (now >> 24) % 24;
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t->tm_min = (now >> 16) % 60;
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t->tm_sec = now % 60;
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}
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return 0;
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}
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/***************************************************************************/
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