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62e59c4e69
Now that we've gotten rid of clk_readl() we can remove io.h from the clk-provider header and push out the io.h include to any code that isn't already including the io.h header but using things like readl/writel, etc. Found with this grep: git grep -l clk-provider.h | grep '.c$' | xargs git grep -L 'linux/io.h' | \ xargs git grep -l \ -e '\<__iowrite32_copy\>' --or \ -e '\<__ioread32_copy\>' --or \ -e '\<__iowrite64_copy\>' --or \ -e '\<ioremap_page_range\>' --or \ -e '\<ioremap_huge_init\>' --or \ -e '\<arch_ioremap_pud_supported\>' --or \ -e '\<arch_ioremap_pmd_supported\>' --or \ -e '\<devm_ioport_map\>' --or \ -e '\<devm_ioport_unmap\>' --or \ -e '\<IOMEM_ERR_PTR\>' --or \ -e '\<devm_ioremap\>' --or \ -e '\<devm_ioremap_nocache\>' --or \ -e '\<devm_ioremap_wc\>' --or \ -e '\<devm_iounmap\>' --or \ -e '\<devm_ioremap_release\>' --or \ -e '\<devm_memremap\>' --or \ -e '\<devm_memunmap\>' --or \ -e '\<__devm_memremap_pages\>' --or \ -e '\<pci_remap_cfgspace\>' --or \ -e '\<arch_has_dev_port\>' --or \ -e '\<arch_phys_wc_add\>' --or \ -e '\<arch_phys_wc_del\>' --or \ -e '\<memremap\>' --or \ -e '\<memunmap\>' --or \ -e '\<arch_io_reserve_memtype_wc\>' --or \ -e '\<arch_io_free_memtype_wc\>' --or \ -e '\<__io_aw\>' --or \ -e '\<__io_pbw\>' --or \ -e '\<__io_paw\>' --or \ -e '\<__io_pbr\>' --or \ -e '\<__io_par\>' --or \ -e '\<__raw_readb\>' --or \ -e '\<__raw_readw\>' --or \ -e '\<__raw_readl\>' --or \ -e '\<__raw_readq\>' --or \ -e '\<__raw_writeb\>' --or \ -e '\<__raw_writew\>' --or \ -e '\<__raw_writel\>' --or \ -e '\<__raw_writeq\>' --or \ -e '\<readb\>' --or \ -e '\<readw\>' --or \ -e '\<readl\>' --or \ -e '\<readq\>' --or \ -e '\<writeb\>' --or \ -e '\<writew\>' --or \ -e '\<writel\>' --or \ -e '\<writeq\>' --or \ -e '\<readb_relaxed\>' --or \ -e '\<readw_relaxed\>' --or \ -e '\<readl_relaxed\>' --or \ -e '\<readq_relaxed\>' --or \ -e '\<writeb_relaxed\>' --or \ -e '\<writew_relaxed\>' --or \ -e '\<writel_relaxed\>' --or \ -e '\<writeq_relaxed\>' --or \ -e '\<readsb\>' --or \ -e '\<readsw\>' --or \ -e '\<readsl\>' --or \ -e '\<readsq\>' --or \ -e '\<writesb\>' --or \ -e '\<writesw\>' --or \ -e '\<writesl\>' --or \ -e '\<writesq\>' --or \ -e '\<inb\>' --or \ -e '\<inw\>' --or \ -e '\<inl\>' --or \ -e '\<outb\>' --or \ -e '\<outw\>' --or \ -e '\<outl\>' --or \ -e '\<inb_p\>' --or \ -e '\<inw_p\>' --or \ -e '\<inl_p\>' --or \ -e '\<outb_p\>' --or \ -e '\<outw_p\>' --or \ -e '\<outl_p\>' --or \ -e '\<insb\>' --or \ -e '\<insw\>' --or \ -e '\<insl\>' --or \ -e '\<outsb\>' --or \ -e '\<outsw\>' --or \ -e '\<outsl\>' --or \ -e '\<insb_p\>' --or \ -e '\<insw_p\>' --or \ -e '\<insl_p\>' --or \ -e '\<outsb_p\>' --or \ -e '\<outsw_p\>' --or \ -e '\<outsl_p\>' --or \ -e '\<ioread8\>' --or \ -e '\<ioread16\>' --or \ -e '\<ioread32\>' --or \ -e '\<ioread64\>' --or \ -e '\<iowrite8\>' --or \ -e '\<iowrite16\>' --or \ -e '\<iowrite32\>' --or \ -e '\<iowrite64\>' --or \ -e '\<ioread16be\>' --or \ -e '\<ioread32be\>' --or \ -e '\<ioread64be\>' --or \ -e '\<iowrite16be\>' --or \ -e '\<iowrite32be\>' --or \ -e '\<iowrite64be\>' --or \ -e '\<ioread8_rep\>' --or \ -e '\<ioread16_rep\>' --or \ -e '\<ioread32_rep\>' --or \ -e '\<ioread64_rep\>' --or \ -e '\<iowrite8_rep\>' --or \ -e '\<iowrite16_rep\>' --or \ -e '\<iowrite32_rep\>' --or \ -e '\<iowrite64_rep\>' --or \ -e '\<__io_virt\>' --or \ -e '\<pci_iounmap\>' --or \ -e '\<virt_to_phys\>' --or \ -e '\<phys_to_virt\>' --or \ -e '\<ioremap_uc\>' --or \ -e '\<ioremap\>' --or \ -e '\<__ioremap\>' --or \ -e '\<iounmap\>' --or \ -e '\<ioremap\>' --or \ -e '\<ioremap_nocache\>' --or \ -e '\<ioremap_uc\>' --or \ -e '\<ioremap_wc\>' --or \ -e '\<ioremap_wc\>' --or \ -e '\<ioremap_wt\>' --or \ -e '\<ioport_map\>' --or \ -e '\<ioport_unmap\>' --or \ -e '\<ioport_map\>' --or \ -e '\<ioport_unmap\>' --or \ -e '\<xlate_dev_kmem_ptr\>' --or \ -e '\<xlate_dev_mem_ptr\>' --or \ -e '\<unxlate_dev_mem_ptr\>' --or \ -e '\<virt_to_bus\>' --or \ -e '\<bus_to_virt\>' --or \ -e '\<memset_io\>' --or \ -e '\<memcpy_fromio\>' --or \ -e '\<memcpy_toio\>' I also reordered a couple includes when they weren't alphabetical and removed clk.h from kona, replacing it with clk-provider.h because that driver doesn't use clk consumer APIs. Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Cc: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Acked-by: Tero Kristo <t-kristo@ti.com> Acked-by: Sekhar Nori <nsekhar@ti.com> Cc: Krzysztof Kozlowski <krzk@kernel.org> Acked-by: Mark Brown <broonie@kernel.org> Cc: Chris Zankel <chris@zankel.net> Acked-by: Max Filippov <jcmvbkbc@gmail.com> Acked-by: John Crispin <john@phrozen.org> Acked-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
196 lines
5.3 KiB
C
196 lines
5.3 KiB
C
// SPDX-License-Identifier: GPL-2.0
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//
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// Copyright (c) 2018 Samsung Electronics Co., Ltd.
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// Author: Marek Szyprowski <m.szyprowski@samsung.com>
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// Common Clock Framework support for Exynos5 power-domain dependent clocks
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#include <linux/io.h>
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#include <linux/of_platform.h>
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#include <linux/platform_device.h>
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#include <linux/pm_domain.h>
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#include <linux/pm_runtime.h>
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#include "clk.h"
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#include "clk-exynos5-subcmu.h"
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static struct samsung_clk_provider *ctx;
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static const struct exynos5_subcmu_info *cmu;
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static int nr_cmus;
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static void exynos5_subcmu_clk_save(void __iomem *base,
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struct exynos5_subcmu_reg_dump *rd,
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unsigned int num_regs)
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{
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for (; num_regs > 0; --num_regs, ++rd) {
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rd->save = readl(base + rd->offset);
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writel((rd->save & ~rd->mask) | rd->value, base + rd->offset);
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rd->save &= rd->mask;
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}
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};
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static void exynos5_subcmu_clk_restore(void __iomem *base,
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struct exynos5_subcmu_reg_dump *rd,
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unsigned int num_regs)
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{
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for (; num_regs > 0; --num_regs, ++rd)
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writel((readl(base + rd->offset) & ~rd->mask) | rd->save,
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base + rd->offset);
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}
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static void exynos5_subcmu_defer_gate(struct samsung_clk_provider *ctx,
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const struct samsung_gate_clock *list, int nr_clk)
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{
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while (nr_clk--)
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samsung_clk_add_lookup(ctx, ERR_PTR(-EPROBE_DEFER), list++->id);
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}
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/*
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* Pass the needed clock provider context and register sub-CMU clocks
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*
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* NOTE: This function has to be called from the main, OF_CLK_DECLARE-
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* initialized clock provider driver. This happens very early during boot
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* process. Then this driver, during core_initcall registers two platform
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* drivers: one which binds to the same device-tree node as OF_CLK_DECLARE
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* driver and second, for handling its per-domain child-devices. Those
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* platform drivers are bound to their devices a bit later in arch_initcall,
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* when OF-core populates all device-tree nodes.
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*/
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void exynos5_subcmus_init(struct samsung_clk_provider *_ctx, int _nr_cmus,
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const struct exynos5_subcmu_info *_cmu)
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{
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ctx = _ctx;
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cmu = _cmu;
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nr_cmus = _nr_cmus;
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for (; _nr_cmus--; _cmu++) {
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exynos5_subcmu_defer_gate(ctx, _cmu->gate_clks,
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_cmu->nr_gate_clks);
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exynos5_subcmu_clk_save(ctx->reg_base, _cmu->suspend_regs,
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_cmu->nr_suspend_regs);
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}
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}
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static int __maybe_unused exynos5_subcmu_suspend(struct device *dev)
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{
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struct exynos5_subcmu_info *info = dev_get_drvdata(dev);
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unsigned long flags;
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spin_lock_irqsave(&ctx->lock, flags);
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exynos5_subcmu_clk_save(ctx->reg_base, info->suspend_regs,
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info->nr_suspend_regs);
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spin_unlock_irqrestore(&ctx->lock, flags);
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return 0;
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}
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static int __maybe_unused exynos5_subcmu_resume(struct device *dev)
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{
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struct exynos5_subcmu_info *info = dev_get_drvdata(dev);
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unsigned long flags;
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spin_lock_irqsave(&ctx->lock, flags);
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exynos5_subcmu_clk_restore(ctx->reg_base, info->suspend_regs,
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info->nr_suspend_regs);
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spin_unlock_irqrestore(&ctx->lock, flags);
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return 0;
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}
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static int __init exynos5_subcmu_probe(struct platform_device *pdev)
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{
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struct device *dev = &pdev->dev;
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struct exynos5_subcmu_info *info = dev_get_drvdata(dev);
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pm_runtime_set_suspended(dev);
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pm_runtime_enable(dev);
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pm_runtime_get(dev);
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ctx->dev = dev;
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samsung_clk_register_div(ctx, info->div_clks, info->nr_div_clks);
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samsung_clk_register_gate(ctx, info->gate_clks, info->nr_gate_clks);
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ctx->dev = NULL;
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pm_runtime_put_sync(dev);
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return 0;
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}
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static const struct dev_pm_ops exynos5_subcmu_pm_ops = {
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SET_RUNTIME_PM_OPS(exynos5_subcmu_suspend,
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exynos5_subcmu_resume, NULL)
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SET_LATE_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
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pm_runtime_force_resume)
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};
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static struct platform_driver exynos5_subcmu_driver __refdata = {
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.driver = {
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.name = "exynos5-subcmu",
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.suppress_bind_attrs = true,
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.pm = &exynos5_subcmu_pm_ops,
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},
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.probe = exynos5_subcmu_probe,
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};
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static int __init exynos5_clk_register_subcmu(struct device *parent,
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const struct exynos5_subcmu_info *info,
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struct device_node *pd_node)
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{
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struct of_phandle_args genpdspec = { .np = pd_node };
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struct platform_device *pdev;
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int ret;
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pdev = platform_device_alloc("exynos5-subcmu", PLATFORM_DEVID_AUTO);
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if (!pdev)
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return -ENOMEM;
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pdev->dev.parent = parent;
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platform_set_drvdata(pdev, (void *)info);
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of_genpd_add_device(&genpdspec, &pdev->dev);
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ret = platform_device_add(pdev);
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if (ret)
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platform_device_put(pdev);
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return ret;
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}
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static int __init exynos5_clk_probe(struct platform_device *pdev)
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{
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struct device_node *np;
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const char *name;
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int i;
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for_each_compatible_node(np, NULL, "samsung,exynos4210-pd") {
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if (of_property_read_string(np, "label", &name) < 0)
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continue;
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for (i = 0; i < nr_cmus; i++)
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if (strcmp(cmu[i].pd_name, name) == 0)
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exynos5_clk_register_subcmu(&pdev->dev,
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&cmu[i], np);
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}
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return 0;
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}
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static const struct of_device_id exynos5_clk_of_match[] = {
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{ .compatible = "samsung,exynos5250-clock", },
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{ .compatible = "samsung,exynos5420-clock", },
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{ .compatible = "samsung,exynos5800-clock", },
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{ },
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};
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static struct platform_driver exynos5_clk_driver __refdata = {
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.driver = {
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.name = "exynos5-clock",
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.of_match_table = exynos5_clk_of_match,
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.suppress_bind_attrs = true,
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},
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.probe = exynos5_clk_probe,
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};
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static int __init exynos5_clk_drv_init(void)
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{
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platform_driver_register(&exynos5_clk_driver);
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platform_driver_register(&exynos5_subcmu_driver);
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return 0;
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}
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core_initcall(exynos5_clk_drv_init);
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