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c23bfc3835
Most PCI implementations perform simple root bus scanning. Rather than having each group of platforms provide a duplicated bus scan function, provide the PCI configuration ops structure via the hw_pci structure, and call the root bus scanning function from core ARM PCI code. Acked-by: Krzysztof Hałasa <khc@pm.waw.pl> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
84 lines
1.7 KiB
C
84 lines
1.7 KiB
C
#include <linux/kernel.h>
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#include <linux/pci.h>
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#include <linux/interrupt.h>
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#include <linux/mm.h>
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#include <linux/init.h>
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#include <linux/ioport.h>
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#include <linux/io.h>
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#include <asm/mach/pci.h>
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#define MAX_SLOTS 7
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#define CONFIG_CMD(bus, devfn, where) (0x80000000 | (bus->number << 16) | (devfn << 8) | (where & ~3))
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static int
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via82c505_read_config(struct pci_bus *bus, unsigned int devfn, int where,
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int size, u32 *value)
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{
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outl(CONFIG_CMD(bus,devfn,where),0xCF8);
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switch (size) {
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case 1:
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*value=inb(0xCFC + (where&3));
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break;
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case 2:
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*value=inw(0xCFC + (where&2));
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break;
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case 4:
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*value=inl(0xCFC);
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break;
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}
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return PCIBIOS_SUCCESSFUL;
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}
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static int
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via82c505_write_config(struct pci_bus *bus, unsigned int devfn, int where,
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int size, u32 value)
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{
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outl(CONFIG_CMD(bus,devfn,where),0xCF8);
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switch (size) {
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case 1:
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outb(value, 0xCFC + (where&3));
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break;
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case 2:
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outw(value, 0xCFC + (where&2));
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break;
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case 4:
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outl(value, 0xCFC);
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break;
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}
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return PCIBIOS_SUCCESSFUL;
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}
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struct pci_ops via82c505_ops = {
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.read = via82c505_read_config,
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.write = via82c505_write_config,
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};
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void __init via82c505_preinit(void)
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{
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printk(KERN_DEBUG "PCI: VIA 82c505\n");
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if (!request_region(0xA8,2,"via config")) {
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printk(KERN_WARNING"VIA 82c505: Unable to request region 0xA8\n");
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return;
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}
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if (!request_region(0xCF8,8,"pci config")) {
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printk(KERN_WARNING"VIA 82c505: Unable to request region 0xCF8\n");
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release_region(0xA8, 2);
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return;
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}
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/* Enable compatible Mode */
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outb(0x96,0xA8);
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outb(0x18,0xA9);
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outb(0x93,0xA8);
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outb(0xd0,0xA9);
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}
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int __init via82c505_setup(int nr, struct pci_sys_data *sys)
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{
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return (nr == 0);
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}
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