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a5ebba6b54
These are various power management related changes, mainly concerning
cpuidle on i.MX and OMAP, as well as a the move of the omap smartreflex
driver to live in the power subsystem.
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Merge tag 'pm' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull arm-soc power management changes from Arnd Bergmann:
"These are various power management related changes, mainly concerning
cpuidle on i.MX and OMAP, as well as a the move of the omap
smartreflex driver to live in the power subsystem."
Fix up conflicts in arch/arm/mach-{imx/mach-imx6q.c,omap2/prm2xxx_3xxx.h}
* tag 'pm' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (37 commits)
ARM: OMAP2+: PM: fix IRQ_NOAUTOEN removal by mis-merge
ARM: OMAP2+: do not allow SmartReflex to be built as a module
ARM: OMAP2: Use hwmod to initialize mmc for 2420
ARM: OMAP3: PM: cpuidle: optimize the clkdm idle latency in C1 state
ARM: OMAP3: PM: cpuidle: optimize the PER latency in C1 state
ARM: OMAP3: PM: cpuidle: default to C1 in next_valid_state
ARM: OMAP3: PM: cleanup cam_pwrdm leftovers
ARM: OMAP3: PM: call pre/post transition per powerdomain
ARM: OMAP2+: powerdomain: allow pre/post transtion to be per pwrdm
ARM: OMAP3: PM: Remove IO Daisychain control from cpuidle
ARM: OMAP3PLUS: hwmod: reconfigure IO Daisychain during hwmod mux
ARM: OMAP3+: PRM: Enable IO wake up
ARM: OMAP4: PRM: Add IO Daisychain support
ARM: OMAP3: PM: Move IO Daisychain function to omap3 prm file
ARM: OMAP3: PM: correct enable/disable of daisy io chain
ARM: OMAP2+: PRM: fix compile for OMAP4-only build
W1: OMAP HDQ1W: use runtime PM
ARM: OMAP2+: HDQ1W: use omap_device
W1: OMAP HDQ1W: use 32-bit register accesses
W1: OMAP HDQ1W: allow driver to be built on all OMAP2+
...
273 lines
7.5 KiB
C
273 lines
7.5 KiB
C
/*
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* Copyright (C) 2011 Freescale Semiconductor, Inc. All Rights Reserved.
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*/
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/*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
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*/
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#include <linux/init.h>
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#include <linux/clk.h>
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#include <linux/delay.h>
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#include <linux/gpio.h>
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#include <linux/smsc911x.h>
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#include <linux/regulator/machine.h>
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#include <linux/regulator/fixed.h>
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#include <mach/common.h>
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#include <mach/hardware.h>
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#include <mach/iomux-mx53.h>
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#include <asm/mach-types.h>
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#include <asm/mach/arch.h>
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#include <asm/mach/time.h>
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#include "devices-imx53.h"
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#define ARD_ETHERNET_INT_B IMX_GPIO_NR(2, 31)
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#define ARD_SD1_CD IMX_GPIO_NR(1, 1)
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#define ARD_SD1_WP IMX_GPIO_NR(1, 9)
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#define ARD_I2CPORTEXP_B IMX_GPIO_NR(2, 3)
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#define ARD_VOLUMEDOWN IMX_GPIO_NR(4, 0)
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#define ARD_HOME IMX_GPIO_NR(5, 10)
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#define ARD_BACK IMX_GPIO_NR(5, 11)
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#define ARD_PROG IMX_GPIO_NR(5, 12)
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#define ARD_VOLUMEUP IMX_GPIO_NR(5, 13)
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static iomux_v3_cfg_t mx53_ard_pads[] = {
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/* UART1 */
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MX53_PAD_PATA_DIOW__UART1_TXD_MUX,
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MX53_PAD_PATA_DMACK__UART1_RXD_MUX,
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/* WEIM for CS1 */
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MX53_PAD_EIM_EB3__GPIO2_31, /* ETHERNET_INT_B */
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MX53_PAD_EIM_D16__EMI_WEIM_D_16,
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MX53_PAD_EIM_D17__EMI_WEIM_D_17,
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MX53_PAD_EIM_D18__EMI_WEIM_D_18,
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MX53_PAD_EIM_D19__EMI_WEIM_D_19,
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MX53_PAD_EIM_D20__EMI_WEIM_D_20,
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MX53_PAD_EIM_D21__EMI_WEIM_D_21,
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MX53_PAD_EIM_D22__EMI_WEIM_D_22,
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MX53_PAD_EIM_D23__EMI_WEIM_D_23,
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MX53_PAD_EIM_D24__EMI_WEIM_D_24,
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MX53_PAD_EIM_D25__EMI_WEIM_D_25,
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MX53_PAD_EIM_D26__EMI_WEIM_D_26,
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MX53_PAD_EIM_D27__EMI_WEIM_D_27,
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MX53_PAD_EIM_D28__EMI_WEIM_D_28,
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MX53_PAD_EIM_D29__EMI_WEIM_D_29,
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MX53_PAD_EIM_D30__EMI_WEIM_D_30,
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MX53_PAD_EIM_D31__EMI_WEIM_D_31,
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MX53_PAD_EIM_DA0__EMI_NAND_WEIM_DA_0,
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MX53_PAD_EIM_DA1__EMI_NAND_WEIM_DA_1,
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MX53_PAD_EIM_DA2__EMI_NAND_WEIM_DA_2,
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MX53_PAD_EIM_DA3__EMI_NAND_WEIM_DA_3,
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MX53_PAD_EIM_DA4__EMI_NAND_WEIM_DA_4,
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MX53_PAD_EIM_DA5__EMI_NAND_WEIM_DA_5,
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MX53_PAD_EIM_DA6__EMI_NAND_WEIM_DA_6,
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MX53_PAD_EIM_OE__EMI_WEIM_OE,
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MX53_PAD_EIM_RW__EMI_WEIM_RW,
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MX53_PAD_EIM_CS1__EMI_WEIM_CS_1,
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/* SDHC1 */
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MX53_PAD_SD1_CMD__ESDHC1_CMD,
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MX53_PAD_SD1_CLK__ESDHC1_CLK,
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MX53_PAD_SD1_DATA0__ESDHC1_DAT0,
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MX53_PAD_SD1_DATA1__ESDHC1_DAT1,
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MX53_PAD_SD1_DATA2__ESDHC1_DAT2,
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MX53_PAD_SD1_DATA3__ESDHC1_DAT3,
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MX53_PAD_PATA_DATA8__ESDHC1_DAT4,
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MX53_PAD_PATA_DATA9__ESDHC1_DAT5,
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MX53_PAD_PATA_DATA10__ESDHC1_DAT6,
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MX53_PAD_PATA_DATA11__ESDHC1_DAT7,
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MX53_PAD_GPIO_1__GPIO1_1,
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MX53_PAD_GPIO_9__GPIO1_9,
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/* I2C2 */
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MX53_PAD_EIM_EB2__I2C2_SCL,
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MX53_PAD_KEY_ROW3__I2C2_SDA,
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/* I2C3 */
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MX53_PAD_GPIO_3__I2C3_SCL,
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MX53_PAD_GPIO_16__I2C3_SDA,
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/* GPIO */
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MX53_PAD_DISP0_DAT16__GPIO5_10, /* home */
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MX53_PAD_DISP0_DAT17__GPIO5_11, /* back */
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MX53_PAD_DISP0_DAT18__GPIO5_12, /* prog */
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MX53_PAD_DISP0_DAT19__GPIO5_13, /* vol up */
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MX53_PAD_GPIO_10__GPIO4_0, /* vol down */
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};
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#define GPIO_BUTTON(gpio_num, ev_code, act_low, descr, wake) \
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{ \
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.gpio = gpio_num, \
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.type = EV_KEY, \
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.code = ev_code, \
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.active_low = act_low, \
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.desc = "btn " descr, \
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.wakeup = wake, \
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}
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static struct gpio_keys_button ard_buttons[] = {
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GPIO_BUTTON(ARD_HOME, KEY_HOME, 1, "home", 0),
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GPIO_BUTTON(ARD_BACK, KEY_BACK, 1, "back", 0),
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GPIO_BUTTON(ARD_PROG, KEY_PROGRAM, 1, "program", 0),
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GPIO_BUTTON(ARD_VOLUMEUP, KEY_VOLUMEUP, 1, "volume-up", 0),
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GPIO_BUTTON(ARD_VOLUMEDOWN, KEY_VOLUMEDOWN, 1, "volume-down", 0),
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};
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static const struct gpio_keys_platform_data ard_button_data __initconst = {
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.buttons = ard_buttons,
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.nbuttons = ARRAY_SIZE(ard_buttons),
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};
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static struct resource ard_smsc911x_resources[] = {
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{
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.start = MX53_CS1_64MB_BASE_ADDR,
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.end = MX53_CS1_64MB_BASE_ADDR + SZ_32M - 1,
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.flags = IORESOURCE_MEM,
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},
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{
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/* irq number is run-time assigned */
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.flags = IORESOURCE_IRQ,
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},
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};
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struct smsc911x_platform_config ard_smsc911x_config = {
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.irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
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.irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
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.flags = SMSC911X_USE_32BIT,
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};
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static struct platform_device ard_smsc_lan9220_device = {
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.name = "smsc911x",
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.id = -1,
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.num_resources = ARRAY_SIZE(ard_smsc911x_resources),
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.resource = ard_smsc911x_resources,
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.dev = {
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.platform_data = &ard_smsc911x_config,
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},
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};
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static const struct esdhc_platform_data mx53_ard_sd1_data __initconst = {
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.cd_gpio = ARD_SD1_CD,
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.wp_gpio = ARD_SD1_WP,
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};
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static struct imxi2c_platform_data mx53_ard_i2c2_data = {
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.bitrate = 50000,
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};
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static struct imxi2c_platform_data mx53_ard_i2c3_data = {
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.bitrate = 400000,
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};
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static void __init mx53_ard_io_init(void)
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{
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gpio_request(ARD_ETHERNET_INT_B, "eth-int-b");
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gpio_direction_input(ARD_ETHERNET_INT_B);
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gpio_request(ARD_I2CPORTEXP_B, "i2cptexp-rst");
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gpio_direction_output(ARD_I2CPORTEXP_B, 1);
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}
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/* Config CS1 settings for ethernet controller */
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static int weim_cs_config(void)
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{
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u32 reg;
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void __iomem *weim_base, *iomuxc_base;
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weim_base = ioremap(MX53_WEIM_BASE_ADDR, SZ_4K);
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if (!weim_base)
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return -ENOMEM;
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iomuxc_base = ioremap(MX53_IOMUXC_BASE_ADDR, SZ_4K);
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if (!iomuxc_base) {
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iounmap(weim_base);
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return -ENOMEM;
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}
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/* CS1 timings for LAN9220 */
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writel(0x20001, (weim_base + 0x18));
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writel(0x0, (weim_base + 0x1C));
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writel(0x16000202, (weim_base + 0x20));
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writel(0x00000002, (weim_base + 0x24));
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writel(0x16002082, (weim_base + 0x28));
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writel(0x00000000, (weim_base + 0x2C));
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writel(0x00000000, (weim_base + 0x90));
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/* specify 64 MB on CS1 and CS0 on GPR1 */
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reg = readl(iomuxc_base + 0x4);
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reg &= ~0x3F;
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reg |= 0x1B;
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writel(reg, (iomuxc_base + 0x4));
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iounmap(iomuxc_base);
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iounmap(weim_base);
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return 0;
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}
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static struct regulator_consumer_supply dummy_supplies[] = {
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REGULATOR_SUPPLY("vdd33a", "smsc911x"),
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REGULATOR_SUPPLY("vddvario", "smsc911x"),
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};
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void __init imx53_ard_common_init(void)
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{
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mxc_iomux_v3_setup_multiple_pads(mx53_ard_pads,
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ARRAY_SIZE(mx53_ard_pads));
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weim_cs_config();
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}
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static struct platform_device *devices[] __initdata = {
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&ard_smsc_lan9220_device,
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};
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static void __init mx53_ard_board_init(void)
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{
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imx53_soc_init();
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imx53_add_imx_uart(0, NULL);
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imx53_ard_common_init();
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mx53_ard_io_init();
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regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies));
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ard_smsc911x_resources[1].start = gpio_to_irq(ARD_ETHERNET_INT_B);
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ard_smsc911x_resources[1].end = gpio_to_irq(ARD_ETHERNET_INT_B);
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platform_add_devices(devices, ARRAY_SIZE(devices));
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imx53_add_sdhci_esdhc_imx(0, &mx53_ard_sd1_data);
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imx53_add_imx2_wdt(0);
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imx53_add_imx_i2c(1, &mx53_ard_i2c2_data);
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imx53_add_imx_i2c(2, &mx53_ard_i2c3_data);
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imx_add_gpio_keys(&ard_button_data);
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imx53_add_ahci_imx();
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}
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static void __init mx53_ard_timer_init(void)
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{
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mx53_clocks_init(32768, 24000000, 22579200, 0);
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}
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static struct sys_timer mx53_ard_timer = {
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.init = mx53_ard_timer_init,
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};
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MACHINE_START(MX53_ARD, "Freescale MX53 ARD Board")
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.map_io = mx53_map_io,
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.init_early = imx53_init_early,
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.init_irq = mx53_init_irq,
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.handle_irq = imx53_handle_irq,
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.timer = &mx53_ard_timer,
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.init_machine = mx53_ard_board_init,
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.init_late = imx53_init_late,
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.restart = mxc_restart,
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MACHINE_END
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