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The PPC476GTR SoC supports message signalled interrupts (MSI) by writing to special addresses within the High Speed Transfer Assist (HSTA) module. This patch adds support for PCI MSI with a new system device. The DMA window is also updated to allow access to the entire 42-bit address range to allow PCI devices write access to the HSTA module. Signed-off-by: Alistair Popple <alistair@popple.id.au> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
43 lines
692 B
Plaintext
43 lines
692 B
Plaintext
# For a description of the syntax of this configuration file,
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# see Documentation/kbuild/kconfig-language.txt.
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#
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config PPC4xx_PCI_EXPRESS
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bool
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depends on PCI && 4xx
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default n
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config PPC4xx_HSTA_MSI
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bool
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depends on PCI_MSI
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depends on PCI && 4xx
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default n
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config PPC4xx_MSI
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bool
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depends on PCI_MSI
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depends on PCI && 4xx
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default n
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config PPC_MSI_BITMAP
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bool
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depends on PCI_MSI
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default y if MPIC
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default y if FSL_PCI
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default y if PPC4xx_MSI
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default y if PPC_POWERNV
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source "arch/powerpc/sysdev/xics/Kconfig"
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config PPC_SCOM
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bool
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config SCOM_DEBUGFS
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bool "Expose SCOM controllers via debugfs"
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depends on PPC_SCOM && DEBUG_FS
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default n
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config GE_FPGA
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bool
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default n
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