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a56f489502
Another quiet release for SPI, almost entirely driver specific changes with the diffstat dominated by two new drivers which are about two thirds of it in terms of lines of code: - New drivers for PIC32 standard and SQI controllers. - The Cadence driver has had runtime PM support added and quite a few fixes and cleanups. - The flash-specific accelerated path support now has a feature query interface. - The pxa2xx driver has been moved to use the core DMA mapping support. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQEcBAABAgAGBQJXQufEAAoJECTWi3JdVIfQXeEH/3PZVHvwQBqpN6S0AunlJQoM s1bScKYeH2ukx9iw86M/upSCOVt4TGlPrdwzcYCUYll9IJuO/ChDio7PoVlxQeJB kYUrFi6dzE/bCNzWtrGtyvNlSDsrRccbRBhmKTFQ9DokcJHgzdzhuCuXUR6OKDDw CxlvDrLwapzOpHIncrhh6dvv1NoZgusOTMzVQAPvLbuiH9WpdnD9MjySklIqd0XU bp+J4J5+jyBVykOZ2MdYpXf1dRhg0c0kmKXOKuX9woiJhvBFrtZX2GfCw1MXchKZ /obHOyD7ff+MBCY2nFN95s3rl9Vxn8IAfNWsuQvZaFK0nz1bypaQ6aXIbXXgj/8= =QO1T -----END PGP SIGNATURE----- Merge tag 'spi-v4.7' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi Pull spi updates from Mark Brown: "Another quiet release for SPI, almost entirely driver specific changes with the diffstat dominated by two new drivers which are about two thirds of it in terms of lines of code: - new drivers for PIC32 standard and SQI controllers - the Cadence driver has had runtime PM support added and quite a few fixes and cleanups - flash-specific accelerated path support now has a feature query interface - the pxa2xx driver has been moved to use the core DMA mapping support" * tag 'spi-v4.7' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi: (48 commits) spi: pic32-sqi: Fix linker error, undefined reference to `bad_dma_ops' spi: dw-pci: Spelling s/paltforms/platforms/g spi: pic32-sqi: Remove pic32_sqi_setup and pic32_sqi_cleanup spi: Fix simple typo s/impelment/implement spi: rockchip: potential NULL dereference on error spi: zynqmp: disable clocks in error paths spi: Drop unnecessary dependencies on relaxed I/O accessors spi: qup: Add spi_master_put in remove function spi: qup: Handle clocks in pm_runtime suspend and resume spi: st-ssc4: Fix missing spi_master_put in spi_st_probe error paths spi: st-ssc4: Allow compile test build spi: omap2-mcspi: Use dma_request_chan() for requesting DMA channel spi: davinci: Use dma_request_chan() for requesting DMA channel spi: pic32: Fix checking return value of devm_ioremap_resource spi: spi-fsl-dspi: Update DT binding documentation spi: Drop duplicate code to set master->dev.parent spi: pic32: Set proper bits_per_word_mask spi: return error if kmap'd buffers passed to spi_map_buf() spi: core: add hook flash_read_supported to spi_master spi: pic32-sqi: silence array overflow warning ...
60 lines
1.7 KiB
Plaintext
60 lines
1.7 KiB
Plaintext
ARM Freescale DSPI controller
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Required properties:
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- compatible : "fsl,vf610-dspi", "fsl,ls1021a-v1.0-dspi",
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"fsl,ls2085a-dspi"
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or
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"fsl,ls2080a-dspi" followed by "fsl,ls2085a-dspi"
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- reg : Offset and length of the register set for the device
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- interrupts : Should contain SPI controller interrupt
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- clocks: from common clock binding: handle to dspi clock.
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- clock-names: from common clock binding: Shall be "dspi".
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- pinctrl-0: pin control group to be used for this controller.
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- pinctrl-names: must contain a "default" entry.
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- spi-num-chipselects : the number of the chipselect signals.
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- bus-num : the slave chip chipselect signal number.
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Optional property:
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- big-endian: If present the dspi device's registers are implemented
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in big endian mode.
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Optional SPI slave node properties:
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- fsl,spi-cs-sck-delay: a delay in nanoseconds between activating chip
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select and the start of clock signal, at the start of a transfer.
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- fsl,spi-sck-cs-delay: a delay in nanoseconds between stopping the clock
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signal and deactivating chip select, at the end of a transfer.
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Example:
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dspi0@4002c000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "fsl,vf610-dspi";
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reg = <0x4002c000 0x1000>;
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interrupts = <0 67 0x04>;
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clocks = <&clks VF610_CLK_DSPI0>;
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clock-names = "dspi";
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spi-num-chipselects = <5>;
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bus-num = <0>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_dspi0_1>;
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big-endian;
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status = "okay";
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sflash: at26df081a@0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "atmel,at26df081a";
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spi-max-frequency = <16000000>;
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spi-cpol;
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spi-cpha;
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reg = <0>;
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linux,modalias = "m25p80";
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modal = "at26df081a";
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fsl,spi-cs-sck-delay = <100>;
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fsl,spi-sck-cs-delay = <50>;
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};
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};
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