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This is the main peripheral IRQ controller on the BCM7xxx MIPS chips; it has the following characteristics: - 64 to 160+ level IRQs - Atomic set/clear registers - Reasonably predictable register layout (N status words, then N mask status words, then N mask set words, then N mask clear words) - SMP affinity supported on most systems - Typically connected to MIPS IRQ 2,3,2,3 on CPUs 0,1,2,3 This driver registers one IRQ domain and one IRQ chip to cover all instances of the block. Up to 4 instances of the block may appear, as it supports 4-way IRQ affinity on BCM7435. The same block exists on the ARM BCM7xxx chips, but typically the ARM GIC is used instead. So this driver is primarily intended for MIPS STB chips. Signed-off-by: Kevin Cernekee <cernekee@gmail.com> Cc: f.fainelli@gmail.com Cc: jaedon.shin@gmail.com Cc: abrestic@chromium.org Cc: tglx@linutronix.de Cc: jason@lakedaemon.net Cc: jogo@openwrt.org Cc: arnd@arndb.de Cc: computersforpeace@gmail.com Cc: linux-mips@linux-mips.org Cc: devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/8844/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org> |
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| .. | ||
| abilis,tb10x-ictl.txt | ||
| allwinner,sun4i-ic.txt | ||
| allwinner,sun67i-sc-nmi.txt | ||
| atmel,aic.txt | ||
| brcm,bcm2835-armctrl-ic.txt | ||
| brcm,bcm3380-l2-intc.txt | ||
| brcm,bcm7038-l1-intc.txt | ||
| brcm,bcm7120-l2-intc.txt | ||
| brcm,l2-intc.txt | ||
| cirrus,clps711x-intc.txt | ||
| digicolor-ic.txt | ||
| interrupts.txt | ||
| lsi,zevio-intc.txt | ||
| marvell,armada-370-xp-mpic.txt | ||
| marvell,orion-intc.txt | ||
| mips-gic.txt | ||
| opencores,or1k-pic.txt | ||
| renesas,intc-irqpin.txt | ||
| renesas,irqc.txt | ||
| samsung,s3c24xx-irq.txt | ||
| snps,dw-apb-ictl.txt | ||
| ti,keystone-irq.txt | ||
| ti,omap-intc-irq.txt | ||