linux/drivers/clk/qcom
Stephen Boyd c430daf951 Revert "clk: qcom: Specify LE device endianness"
This reverts commit 329cabcecf.

The commit that caused us to specify LE device endianness here,
29bb45f25f (regmap-mmio: Use native endianness for read/write,
2015-10-29), has been reverted in mainline so now when we specify
LE it actively breaks big endian kernels because the byte
swapping in regmap-mmio is incorrect. Let's revert this change
because it will 1) fix the big endian kernels and 2) be redundant
to specify LE because that will become the default soon.

Cc: Kevin Hilman <khilman@linaro.org>
Tested-by: Kevin Hilman <khilman@baylibre.com>
Cc: Mark Brown <broonie@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2016-02-12 14:24:24 -08:00
..
clk-alpha-pll.c clk: qcom: Add Alpha PLL support 2015-11-30 18:24:25 -08:00
clk-alpha-pll.h clk: qcom: Add Alpha PLL support 2015-11-30 18:24:25 -08:00
clk-branch.c clk: Convert __clk_get_name(hw->clk) to clk_hw_get_name(hw) 2015-08-24 16:49:12 -07:00
clk-branch.h clk: qcom: Add support for branches/gate clocks 2014-01-16 12:01:01 -08:00
clk-pll.c clk: qcom: Convert to clk_hw based provider APIs 2015-08-24 16:48:52 -07:00
clk-pll.h clk: qcom: Add support for SR2 PLLs 2015-07-07 17:19:58 -07:00
clk-rcg2.c clk: qcom: Add gfx3d ping-pong PLL frequency switching 2015-11-30 18:24:29 -08:00
clk-rcg.c clk: qcom: clk-rcg: Add customized clk_ops for DSI RCGs 2015-10-16 15:08:40 -07:00
clk-rcg.h clk: qcom: Add gfx3d ping-pong PLL frequency switching 2015-11-30 18:24:29 -08:00
clk-regmap-divider.c clk: qcom: Add support for regmap divider clocks 2015-01-27 11:49:00 -08:00
clk-regmap-divider.h clk: qcom: Add support for regmap divider clocks 2015-01-27 11:49:00 -08:00
clk-regmap-mux.c clk: qcom: Add simple regmap based muxes 2015-01-27 11:49:09 -08:00
clk-regmap-mux.h clk: qcom: Add simple regmap based muxes 2015-01-27 11:49:09 -08:00
clk-regmap.c
clk-regmap.h
common.c clk: qcom: common: Add API to register board clocks backwards compatibly 2015-11-16 11:07:06 -08:00
common.h clk: qcom: common: Add API to register board clocks backwards compatibly 2015-11-16 11:07:06 -08:00
gcc-apq8084.c Revert "clk: qcom: Specify LE device endianness" 2016-02-12 14:24:24 -08:00
gcc-ipq806x.c Revert "clk: qcom: Specify LE device endianness" 2016-02-12 14:24:24 -08:00
gcc-msm8660.c Revert "clk: qcom: Specify LE device endianness" 2016-02-12 14:24:24 -08:00
gcc-msm8916.c Revert "clk: qcom: Specify LE device endianness" 2016-02-12 14:24:24 -08:00
gcc-msm8960.c Revert "clk: qcom: Specify LE device endianness" 2016-02-12 14:24:24 -08:00
gcc-msm8974.c Revert "clk: qcom: Specify LE device endianness" 2016-02-12 14:24:24 -08:00
gcc-msm8996.c clk: qcom: Add MSM8996 Global Clock Control (GCC) driver 2015-11-30 18:24:27 -08:00
gdsc.c clk: qcom: gdsc: Add support for ON only state 2015-09-16 15:22:40 -07:00
gdsc.h clk: qcom: gdsc: Add support for ON only state 2015-09-16 15:22:40 -07:00
Kconfig clk: qcom: Add MSM8996 Multimedia Clock Controller (MMCC) driver 2015-11-30 18:24:30 -08:00
lcc-ipq806x.c Revert "clk: qcom: Specify LE device endianness" 2016-02-12 14:24:24 -08:00
lcc-msm8960.c Revert "clk: qcom: Specify LE device endianness" 2016-02-12 14:24:24 -08:00
Makefile clk: qcom: Add MSM8996 Multimedia Clock Controller (MMCC) driver 2015-11-30 18:24:30 -08:00
mmcc-apq8084.c Revert "clk: qcom: Specify LE device endianness" 2016-02-12 14:24:24 -08:00
mmcc-msm8960.c Revert "clk: qcom: Specify LE device endianness" 2016-02-12 14:24:24 -08:00
mmcc-msm8974.c Revert "clk: qcom: Specify LE device endianness" 2016-02-12 14:24:24 -08:00
mmcc-msm8996.c clk: qcom: Add MSM8996 Multimedia Clock Controller (MMCC) driver 2015-11-30 18:24:30 -08:00
reset.c clk: qcom: Add reset controller support 2014-01-16 12:01:02 -08:00
reset.h clk: qcom: Add reset controller support 2014-01-16 12:01:02 -08:00