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e6b5be2be4
Here's the set of driver core patches for 3.19-rc1. They are dominated by the removal of the .owner field in platform drivers. They touch a lot of files, but they are "simple" changes, just removing a line in a structure. Other than that, a few minor driver core and debugfs changes. There are some ath9k patches coming in through this tree that have been acked by the wireless maintainers as they relied on the debugfs changes. Everything has been in linux-next for a while. Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> -----BEGIN PGP SIGNATURE----- Version: GnuPG v2 iEYEABECAAYFAlSOD20ACgkQMUfUDdst+ylLPACg2QrW1oHhdTMT9WI8jihlHVRM 53kAoLeteByQ3iVwWurwwseRPiWa8+MI =OVRS -----END PGP SIGNATURE----- Merge tag 'driver-core-3.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/driver-core Pull driver core update from Greg KH: "Here's the set of driver core patches for 3.19-rc1. They are dominated by the removal of the .owner field in platform drivers. They touch a lot of files, but they are "simple" changes, just removing a line in a structure. Other than that, a few minor driver core and debugfs changes. There are some ath9k patches coming in through this tree that have been acked by the wireless maintainers as they relied on the debugfs changes. Everything has been in linux-next for a while" * tag 'driver-core-3.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/driver-core: (324 commits) Revert "ath: ath9k: use debugfs_create_devm_seqfile() helper for seq_file entries" fs: debugfs: add forward declaration for struct device type firmware class: Deletion of an unnecessary check before the function call "vunmap" firmware loader: fix hung task warning dump devcoredump: provide a one-way disable function device: Add dev_<level>_once variants ath: ath9k: use debugfs_create_devm_seqfile() helper for seq_file entries ath: use seq_file api for ath9k debugfs files debugfs: add helper function to create device related seq_file drivers/base: cacheinfo: remove noisy error boot message Revert "core: platform: add warning if driver has no owner" drivers: base: support cpu cache information interface to userspace via sysfs drivers: base: add cpu_device_create to support per-cpu devices topology: replace custom attribute macros with standard DEVICE_ATTR* cpumask: factor out show_cpumap into separate helper function driver core: Fix unbalanced device reference in drivers_probe driver core: fix race with userland in device_add() sysfs/kernfs: make read requests on pre-alloc files use the buffer. sysfs/kernfs: allow attributes to request write buffer be pre-allocated. fs: sysfs: return EGBIG on write if offset is larger than file size ...
1214 lines
30 KiB
C
1214 lines
30 KiB
C
/*
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* Driver for Atmel AC97C
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*
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* Copyright (C) 2005-2009 Atmel Corporation
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published by
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* the Free Software Foundation.
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*/
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#include <linux/clk.h>
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#include <linux/delay.h>
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#include <linux/bitmap.h>
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#include <linux/device.h>
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#include <linux/dmaengine.h>
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#include <linux/dma-mapping.h>
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#include <linux/atmel_pdc.h>
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#include <linux/init.h>
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#include <linux/interrupt.h>
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#include <linux/module.h>
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#include <linux/platform_device.h>
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#include <linux/mutex.h>
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#include <linux/gpio.h>
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#include <linux/types.h>
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#include <linux/io.h>
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#include <sound/core.h>
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#include <sound/initval.h>
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#include <sound/pcm.h>
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#include <sound/pcm_params.h>
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#include <sound/ac97_codec.h>
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#include <sound/atmel-ac97c.h>
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#include <sound/memalloc.h>
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#include <linux/platform_data/dma-dw.h>
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#include <linux/dma/dw.h>
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#include <mach/cpu.h>
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#ifdef CONFIG_ARCH_AT91
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#include <mach/hardware.h>
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#endif
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#include "ac97c.h"
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enum {
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DMA_TX_READY = 0,
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DMA_RX_READY,
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DMA_TX_CHAN_PRESENT,
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DMA_RX_CHAN_PRESENT,
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};
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/* Serialize access to opened variable */
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static DEFINE_MUTEX(opened_mutex);
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struct atmel_ac97c_dma {
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struct dma_chan *rx_chan;
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struct dma_chan *tx_chan;
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};
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struct atmel_ac97c {
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struct clk *pclk;
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struct platform_device *pdev;
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struct atmel_ac97c_dma dma;
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struct snd_pcm_substream *playback_substream;
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struct snd_pcm_substream *capture_substream;
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struct snd_card *card;
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struct snd_pcm *pcm;
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struct snd_ac97 *ac97;
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struct snd_ac97_bus *ac97_bus;
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u64 cur_format;
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unsigned int cur_rate;
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unsigned long flags;
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int playback_period, capture_period;
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/* Serialize access to opened variable */
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spinlock_t lock;
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void __iomem *regs;
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int irq;
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int opened;
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int reset_pin;
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};
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#define get_chip(card) ((struct atmel_ac97c *)(card)->private_data)
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#define ac97c_writel(chip, reg, val) \
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__raw_writel((val), (chip)->regs + AC97C_##reg)
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#define ac97c_readl(chip, reg) \
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__raw_readl((chip)->regs + AC97C_##reg)
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/* This function is called by the DMA driver. */
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static void atmel_ac97c_dma_playback_period_done(void *arg)
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{
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struct atmel_ac97c *chip = arg;
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snd_pcm_period_elapsed(chip->playback_substream);
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}
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static void atmel_ac97c_dma_capture_period_done(void *arg)
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{
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struct atmel_ac97c *chip = arg;
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snd_pcm_period_elapsed(chip->capture_substream);
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}
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static int atmel_ac97c_prepare_dma(struct atmel_ac97c *chip,
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struct snd_pcm_substream *substream,
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enum dma_transfer_direction direction)
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{
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struct dma_chan *chan;
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struct dw_cyclic_desc *cdesc;
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struct snd_pcm_runtime *runtime = substream->runtime;
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unsigned long buffer_len, period_len;
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/*
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* We don't do DMA on "complex" transfers, i.e. with
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* non-halfword-aligned buffers or lengths.
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*/
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if (runtime->dma_addr & 1 || runtime->buffer_size & 1) {
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dev_dbg(&chip->pdev->dev, "too complex transfer\n");
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return -EINVAL;
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}
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if (direction == DMA_MEM_TO_DEV)
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chan = chip->dma.tx_chan;
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else
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chan = chip->dma.rx_chan;
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buffer_len = frames_to_bytes(runtime, runtime->buffer_size);
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period_len = frames_to_bytes(runtime, runtime->period_size);
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cdesc = dw_dma_cyclic_prep(chan, runtime->dma_addr, buffer_len,
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period_len, direction);
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if (IS_ERR(cdesc)) {
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dev_dbg(&chip->pdev->dev, "could not prepare cyclic DMA\n");
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return PTR_ERR(cdesc);
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}
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if (direction == DMA_MEM_TO_DEV) {
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cdesc->period_callback = atmel_ac97c_dma_playback_period_done;
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set_bit(DMA_TX_READY, &chip->flags);
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} else {
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cdesc->period_callback = atmel_ac97c_dma_capture_period_done;
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set_bit(DMA_RX_READY, &chip->flags);
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}
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cdesc->period_callback_param = chip;
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return 0;
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}
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static struct snd_pcm_hardware atmel_ac97c_hw = {
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.info = (SNDRV_PCM_INFO_MMAP
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| SNDRV_PCM_INFO_MMAP_VALID
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| SNDRV_PCM_INFO_INTERLEAVED
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| SNDRV_PCM_INFO_BLOCK_TRANSFER
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| SNDRV_PCM_INFO_JOINT_DUPLEX
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| SNDRV_PCM_INFO_RESUME
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| SNDRV_PCM_INFO_PAUSE),
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.formats = (SNDRV_PCM_FMTBIT_S16_BE
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| SNDRV_PCM_FMTBIT_S16_LE),
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.rates = (SNDRV_PCM_RATE_CONTINUOUS),
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.rate_min = 4000,
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.rate_max = 48000,
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.channels_min = 1,
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.channels_max = 2,
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.buffer_bytes_max = 2 * 2 * 64 * 2048,
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.period_bytes_min = 4096,
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.period_bytes_max = 4096,
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.periods_min = 6,
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.periods_max = 64,
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};
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static int atmel_ac97c_playback_open(struct snd_pcm_substream *substream)
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{
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struct atmel_ac97c *chip = snd_pcm_substream_chip(substream);
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struct snd_pcm_runtime *runtime = substream->runtime;
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mutex_lock(&opened_mutex);
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chip->opened++;
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runtime->hw = atmel_ac97c_hw;
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if (chip->cur_rate) {
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runtime->hw.rate_min = chip->cur_rate;
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runtime->hw.rate_max = chip->cur_rate;
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}
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if (chip->cur_format)
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runtime->hw.formats = pcm_format_to_bits(chip->cur_format);
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mutex_unlock(&opened_mutex);
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chip->playback_substream = substream;
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return 0;
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}
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static int atmel_ac97c_capture_open(struct snd_pcm_substream *substream)
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{
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struct atmel_ac97c *chip = snd_pcm_substream_chip(substream);
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struct snd_pcm_runtime *runtime = substream->runtime;
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mutex_lock(&opened_mutex);
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chip->opened++;
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runtime->hw = atmel_ac97c_hw;
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if (chip->cur_rate) {
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runtime->hw.rate_min = chip->cur_rate;
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runtime->hw.rate_max = chip->cur_rate;
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}
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if (chip->cur_format)
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runtime->hw.formats = pcm_format_to_bits(chip->cur_format);
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mutex_unlock(&opened_mutex);
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chip->capture_substream = substream;
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return 0;
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}
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static int atmel_ac97c_playback_close(struct snd_pcm_substream *substream)
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{
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struct atmel_ac97c *chip = snd_pcm_substream_chip(substream);
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mutex_lock(&opened_mutex);
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chip->opened--;
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if (!chip->opened) {
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chip->cur_rate = 0;
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chip->cur_format = 0;
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}
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mutex_unlock(&opened_mutex);
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chip->playback_substream = NULL;
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return 0;
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}
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static int atmel_ac97c_capture_close(struct snd_pcm_substream *substream)
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{
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struct atmel_ac97c *chip = snd_pcm_substream_chip(substream);
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mutex_lock(&opened_mutex);
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chip->opened--;
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if (!chip->opened) {
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chip->cur_rate = 0;
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chip->cur_format = 0;
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}
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mutex_unlock(&opened_mutex);
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chip->capture_substream = NULL;
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return 0;
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}
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static int atmel_ac97c_playback_hw_params(struct snd_pcm_substream *substream,
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struct snd_pcm_hw_params *hw_params)
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{
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struct atmel_ac97c *chip = snd_pcm_substream_chip(substream);
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int retval;
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retval = snd_pcm_lib_malloc_pages(substream,
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params_buffer_bytes(hw_params));
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if (retval < 0)
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return retval;
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/* snd_pcm_lib_malloc_pages returns 1 if buffer is changed. */
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if (cpu_is_at32ap7000()) {
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/* snd_pcm_lib_malloc_pages returns 1 if buffer is changed. */
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if (retval == 1)
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if (test_and_clear_bit(DMA_TX_READY, &chip->flags))
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dw_dma_cyclic_free(chip->dma.tx_chan);
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}
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/* Set restrictions to params. */
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mutex_lock(&opened_mutex);
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chip->cur_rate = params_rate(hw_params);
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chip->cur_format = params_format(hw_params);
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mutex_unlock(&opened_mutex);
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return retval;
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}
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static int atmel_ac97c_capture_hw_params(struct snd_pcm_substream *substream,
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struct snd_pcm_hw_params *hw_params)
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{
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struct atmel_ac97c *chip = snd_pcm_substream_chip(substream);
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int retval;
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retval = snd_pcm_lib_malloc_pages(substream,
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params_buffer_bytes(hw_params));
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if (retval < 0)
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return retval;
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/* snd_pcm_lib_malloc_pages returns 1 if buffer is changed. */
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if (cpu_is_at32ap7000() && retval == 1)
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if (test_and_clear_bit(DMA_RX_READY, &chip->flags))
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dw_dma_cyclic_free(chip->dma.rx_chan);
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/* Set restrictions to params. */
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mutex_lock(&opened_mutex);
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chip->cur_rate = params_rate(hw_params);
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chip->cur_format = params_format(hw_params);
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mutex_unlock(&opened_mutex);
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return retval;
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}
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static int atmel_ac97c_playback_hw_free(struct snd_pcm_substream *substream)
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{
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struct atmel_ac97c *chip = snd_pcm_substream_chip(substream);
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if (cpu_is_at32ap7000()) {
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if (test_and_clear_bit(DMA_TX_READY, &chip->flags))
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dw_dma_cyclic_free(chip->dma.tx_chan);
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}
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return snd_pcm_lib_free_pages(substream);
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}
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static int atmel_ac97c_capture_hw_free(struct snd_pcm_substream *substream)
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{
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struct atmel_ac97c *chip = snd_pcm_substream_chip(substream);
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if (cpu_is_at32ap7000()) {
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if (test_and_clear_bit(DMA_RX_READY, &chip->flags))
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dw_dma_cyclic_free(chip->dma.rx_chan);
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}
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return snd_pcm_lib_free_pages(substream);
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}
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static int atmel_ac97c_playback_prepare(struct snd_pcm_substream *substream)
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{
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struct atmel_ac97c *chip = snd_pcm_substream_chip(substream);
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struct snd_pcm_runtime *runtime = substream->runtime;
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int block_size = frames_to_bytes(runtime, runtime->period_size);
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unsigned long word = ac97c_readl(chip, OCA);
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int retval;
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chip->playback_period = 0;
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word &= ~(AC97C_CH_MASK(PCM_LEFT) | AC97C_CH_MASK(PCM_RIGHT));
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/* assign channels to AC97C channel A */
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switch (runtime->channels) {
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case 1:
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word |= AC97C_CH_ASSIGN(PCM_LEFT, A);
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break;
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case 2:
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word |= AC97C_CH_ASSIGN(PCM_LEFT, A)
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| AC97C_CH_ASSIGN(PCM_RIGHT, A);
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break;
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default:
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/* TODO: support more than two channels */
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return -EINVAL;
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}
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ac97c_writel(chip, OCA, word);
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/* configure sample format and size */
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word = ac97c_readl(chip, CAMR);
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if (chip->opened <= 1)
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word = AC97C_CMR_DMAEN | AC97C_CMR_SIZE_16;
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else
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word |= AC97C_CMR_DMAEN | AC97C_CMR_SIZE_16;
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switch (runtime->format) {
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case SNDRV_PCM_FORMAT_S16_LE:
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if (cpu_is_at32ap7000())
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word |= AC97C_CMR_CEM_LITTLE;
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break;
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case SNDRV_PCM_FORMAT_S16_BE: /* fall through */
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word &= ~(AC97C_CMR_CEM_LITTLE);
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break;
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default:
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word = ac97c_readl(chip, OCA);
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word &= ~(AC97C_CH_MASK(PCM_LEFT) | AC97C_CH_MASK(PCM_RIGHT));
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ac97c_writel(chip, OCA, word);
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return -EINVAL;
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}
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/* Enable underrun interrupt on channel A */
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word |= AC97C_CSR_UNRUN;
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ac97c_writel(chip, CAMR, word);
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/* Enable channel A event interrupt */
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word = ac97c_readl(chip, IMR);
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word |= AC97C_SR_CAEVT;
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ac97c_writel(chip, IER, word);
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/* set variable rate if needed */
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if (runtime->rate != 48000) {
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word = ac97c_readl(chip, MR);
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word |= AC97C_MR_VRA;
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ac97c_writel(chip, MR, word);
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} else {
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word = ac97c_readl(chip, MR);
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word &= ~(AC97C_MR_VRA);
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ac97c_writel(chip, MR, word);
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}
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retval = snd_ac97_set_rate(chip->ac97, AC97_PCM_FRONT_DAC_RATE,
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runtime->rate);
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if (retval)
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dev_dbg(&chip->pdev->dev, "could not set rate %d Hz\n",
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runtime->rate);
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if (cpu_is_at32ap7000()) {
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if (!test_bit(DMA_TX_READY, &chip->flags))
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retval = atmel_ac97c_prepare_dma(chip, substream,
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DMA_MEM_TO_DEV);
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} else {
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/* Initialize and start the PDC */
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writel(runtime->dma_addr, chip->regs + ATMEL_PDC_TPR);
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writel(block_size / 2, chip->regs + ATMEL_PDC_TCR);
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writel(runtime->dma_addr + block_size,
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chip->regs + ATMEL_PDC_TNPR);
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writel(block_size / 2, chip->regs + ATMEL_PDC_TNCR);
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}
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return retval;
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}
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static int atmel_ac97c_capture_prepare(struct snd_pcm_substream *substream)
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{
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struct atmel_ac97c *chip = snd_pcm_substream_chip(substream);
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struct snd_pcm_runtime *runtime = substream->runtime;
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int block_size = frames_to_bytes(runtime, runtime->period_size);
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unsigned long word = ac97c_readl(chip, ICA);
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int retval;
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chip->capture_period = 0;
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word &= ~(AC97C_CH_MASK(PCM_LEFT) | AC97C_CH_MASK(PCM_RIGHT));
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/* assign channels to AC97C channel A */
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switch (runtime->channels) {
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case 1:
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word |= AC97C_CH_ASSIGN(PCM_LEFT, A);
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break;
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case 2:
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word |= AC97C_CH_ASSIGN(PCM_LEFT, A)
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| AC97C_CH_ASSIGN(PCM_RIGHT, A);
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break;
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default:
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/* TODO: support more than two channels */
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return -EINVAL;
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}
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ac97c_writel(chip, ICA, word);
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|
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/* configure sample format and size */
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word = ac97c_readl(chip, CAMR);
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if (chip->opened <= 1)
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word = AC97C_CMR_DMAEN | AC97C_CMR_SIZE_16;
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else
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word |= AC97C_CMR_DMAEN | AC97C_CMR_SIZE_16;
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|
|
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switch (runtime->format) {
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case SNDRV_PCM_FORMAT_S16_LE:
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if (cpu_is_at32ap7000())
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word |= AC97C_CMR_CEM_LITTLE;
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|
break;
|
|
case SNDRV_PCM_FORMAT_S16_BE: /* fall through */
|
|
word &= ~(AC97C_CMR_CEM_LITTLE);
|
|
break;
|
|
default:
|
|
word = ac97c_readl(chip, ICA);
|
|
word &= ~(AC97C_CH_MASK(PCM_LEFT) | AC97C_CH_MASK(PCM_RIGHT));
|
|
ac97c_writel(chip, ICA, word);
|
|
return -EINVAL;
|
|
}
|
|
|
|
/* Enable overrun interrupt on channel A */
|
|
word |= AC97C_CSR_OVRUN;
|
|
|
|
ac97c_writel(chip, CAMR, word);
|
|
|
|
/* Enable channel A event interrupt */
|
|
word = ac97c_readl(chip, IMR);
|
|
word |= AC97C_SR_CAEVT;
|
|
ac97c_writel(chip, IER, word);
|
|
|
|
/* set variable rate if needed */
|
|
if (runtime->rate != 48000) {
|
|
word = ac97c_readl(chip, MR);
|
|
word |= AC97C_MR_VRA;
|
|
ac97c_writel(chip, MR, word);
|
|
} else {
|
|
word = ac97c_readl(chip, MR);
|
|
word &= ~(AC97C_MR_VRA);
|
|
ac97c_writel(chip, MR, word);
|
|
}
|
|
|
|
retval = snd_ac97_set_rate(chip->ac97, AC97_PCM_LR_ADC_RATE,
|
|
runtime->rate);
|
|
if (retval)
|
|
dev_dbg(&chip->pdev->dev, "could not set rate %d Hz\n",
|
|
runtime->rate);
|
|
|
|
if (cpu_is_at32ap7000()) {
|
|
if (!test_bit(DMA_RX_READY, &chip->flags))
|
|
retval = atmel_ac97c_prepare_dma(chip, substream,
|
|
DMA_DEV_TO_MEM);
|
|
} else {
|
|
/* Initialize and start the PDC */
|
|
writel(runtime->dma_addr, chip->regs + ATMEL_PDC_RPR);
|
|
writel(block_size / 2, chip->regs + ATMEL_PDC_RCR);
|
|
writel(runtime->dma_addr + block_size,
|
|
chip->regs + ATMEL_PDC_RNPR);
|
|
writel(block_size / 2, chip->regs + ATMEL_PDC_RNCR);
|
|
}
|
|
|
|
return retval;
|
|
}
|
|
|
|
static int
|
|
atmel_ac97c_playback_trigger(struct snd_pcm_substream *substream, int cmd)
|
|
{
|
|
struct atmel_ac97c *chip = snd_pcm_substream_chip(substream);
|
|
unsigned long camr, ptcr = 0;
|
|
int retval = 0;
|
|
|
|
camr = ac97c_readl(chip, CAMR);
|
|
|
|
switch (cmd) {
|
|
case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: /* fall through */
|
|
case SNDRV_PCM_TRIGGER_RESUME: /* fall through */
|
|
case SNDRV_PCM_TRIGGER_START:
|
|
if (cpu_is_at32ap7000()) {
|
|
retval = dw_dma_cyclic_start(chip->dma.tx_chan);
|
|
if (retval)
|
|
goto out;
|
|
} else {
|
|
ptcr = ATMEL_PDC_TXTEN;
|
|
}
|
|
camr |= AC97C_CMR_CENA | AC97C_CSR_ENDTX;
|
|
break;
|
|
case SNDRV_PCM_TRIGGER_PAUSE_PUSH: /* fall through */
|
|
case SNDRV_PCM_TRIGGER_SUSPEND: /* fall through */
|
|
case SNDRV_PCM_TRIGGER_STOP:
|
|
if (cpu_is_at32ap7000())
|
|
dw_dma_cyclic_stop(chip->dma.tx_chan);
|
|
else
|
|
ptcr |= ATMEL_PDC_TXTDIS;
|
|
if (chip->opened <= 1)
|
|
camr &= ~AC97C_CMR_CENA;
|
|
break;
|
|
default:
|
|
retval = -EINVAL;
|
|
goto out;
|
|
}
|
|
|
|
ac97c_writel(chip, CAMR, camr);
|
|
if (!cpu_is_at32ap7000())
|
|
writel(ptcr, chip->regs + ATMEL_PDC_PTCR);
|
|
out:
|
|
return retval;
|
|
}
|
|
|
|
static int
|
|
atmel_ac97c_capture_trigger(struct snd_pcm_substream *substream, int cmd)
|
|
{
|
|
struct atmel_ac97c *chip = snd_pcm_substream_chip(substream);
|
|
unsigned long camr, ptcr = 0;
|
|
int retval = 0;
|
|
|
|
camr = ac97c_readl(chip, CAMR);
|
|
ptcr = readl(chip->regs + ATMEL_PDC_PTSR);
|
|
|
|
switch (cmd) {
|
|
case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: /* fall through */
|
|
case SNDRV_PCM_TRIGGER_RESUME: /* fall through */
|
|
case SNDRV_PCM_TRIGGER_START:
|
|
if (cpu_is_at32ap7000()) {
|
|
retval = dw_dma_cyclic_start(chip->dma.rx_chan);
|
|
if (retval)
|
|
goto out;
|
|
} else {
|
|
ptcr = ATMEL_PDC_RXTEN;
|
|
}
|
|
camr |= AC97C_CMR_CENA | AC97C_CSR_ENDRX;
|
|
break;
|
|
case SNDRV_PCM_TRIGGER_PAUSE_PUSH: /* fall through */
|
|
case SNDRV_PCM_TRIGGER_SUSPEND: /* fall through */
|
|
case SNDRV_PCM_TRIGGER_STOP:
|
|
if (cpu_is_at32ap7000())
|
|
dw_dma_cyclic_stop(chip->dma.rx_chan);
|
|
else
|
|
ptcr |= (ATMEL_PDC_RXTDIS);
|
|
if (chip->opened <= 1)
|
|
camr &= ~AC97C_CMR_CENA;
|
|
break;
|
|
default:
|
|
retval = -EINVAL;
|
|
break;
|
|
}
|
|
|
|
ac97c_writel(chip, CAMR, camr);
|
|
if (!cpu_is_at32ap7000())
|
|
writel(ptcr, chip->regs + ATMEL_PDC_PTCR);
|
|
out:
|
|
return retval;
|
|
}
|
|
|
|
static snd_pcm_uframes_t
|
|
atmel_ac97c_playback_pointer(struct snd_pcm_substream *substream)
|
|
{
|
|
struct atmel_ac97c *chip = snd_pcm_substream_chip(substream);
|
|
struct snd_pcm_runtime *runtime = substream->runtime;
|
|
snd_pcm_uframes_t frames;
|
|
unsigned long bytes;
|
|
|
|
if (cpu_is_at32ap7000())
|
|
bytes = dw_dma_get_src_addr(chip->dma.tx_chan);
|
|
else
|
|
bytes = readl(chip->regs + ATMEL_PDC_TPR);
|
|
bytes -= runtime->dma_addr;
|
|
|
|
frames = bytes_to_frames(runtime, bytes);
|
|
if (frames >= runtime->buffer_size)
|
|
frames -= runtime->buffer_size;
|
|
return frames;
|
|
}
|
|
|
|
static snd_pcm_uframes_t
|
|
atmel_ac97c_capture_pointer(struct snd_pcm_substream *substream)
|
|
{
|
|
struct atmel_ac97c *chip = snd_pcm_substream_chip(substream);
|
|
struct snd_pcm_runtime *runtime = substream->runtime;
|
|
snd_pcm_uframes_t frames;
|
|
unsigned long bytes;
|
|
|
|
if (cpu_is_at32ap7000())
|
|
bytes = dw_dma_get_dst_addr(chip->dma.rx_chan);
|
|
else
|
|
bytes = readl(chip->regs + ATMEL_PDC_RPR);
|
|
bytes -= runtime->dma_addr;
|
|
|
|
frames = bytes_to_frames(runtime, bytes);
|
|
if (frames >= runtime->buffer_size)
|
|
frames -= runtime->buffer_size;
|
|
return frames;
|
|
}
|
|
|
|
static struct snd_pcm_ops atmel_ac97_playback_ops = {
|
|
.open = atmel_ac97c_playback_open,
|
|
.close = atmel_ac97c_playback_close,
|
|
.ioctl = snd_pcm_lib_ioctl,
|
|
.hw_params = atmel_ac97c_playback_hw_params,
|
|
.hw_free = atmel_ac97c_playback_hw_free,
|
|
.prepare = atmel_ac97c_playback_prepare,
|
|
.trigger = atmel_ac97c_playback_trigger,
|
|
.pointer = atmel_ac97c_playback_pointer,
|
|
};
|
|
|
|
static struct snd_pcm_ops atmel_ac97_capture_ops = {
|
|
.open = atmel_ac97c_capture_open,
|
|
.close = atmel_ac97c_capture_close,
|
|
.ioctl = snd_pcm_lib_ioctl,
|
|
.hw_params = atmel_ac97c_capture_hw_params,
|
|
.hw_free = atmel_ac97c_capture_hw_free,
|
|
.prepare = atmel_ac97c_capture_prepare,
|
|
.trigger = atmel_ac97c_capture_trigger,
|
|
.pointer = atmel_ac97c_capture_pointer,
|
|
};
|
|
|
|
static irqreturn_t atmel_ac97c_interrupt(int irq, void *dev)
|
|
{
|
|
struct atmel_ac97c *chip = (struct atmel_ac97c *)dev;
|
|
irqreturn_t retval = IRQ_NONE;
|
|
u32 sr = ac97c_readl(chip, SR);
|
|
u32 casr = ac97c_readl(chip, CASR);
|
|
u32 cosr = ac97c_readl(chip, COSR);
|
|
u32 camr = ac97c_readl(chip, CAMR);
|
|
|
|
if (sr & AC97C_SR_CAEVT) {
|
|
struct snd_pcm_runtime *runtime;
|
|
int offset, next_period, block_size;
|
|
dev_dbg(&chip->pdev->dev, "channel A event%s%s%s%s%s%s\n",
|
|
casr & AC97C_CSR_OVRUN ? " OVRUN" : "",
|
|
casr & AC97C_CSR_RXRDY ? " RXRDY" : "",
|
|
casr & AC97C_CSR_UNRUN ? " UNRUN" : "",
|
|
casr & AC97C_CSR_TXEMPTY ? " TXEMPTY" : "",
|
|
casr & AC97C_CSR_TXRDY ? " TXRDY" : "",
|
|
!casr ? " NONE" : "");
|
|
if (!cpu_is_at32ap7000()) {
|
|
if ((casr & camr) & AC97C_CSR_ENDTX) {
|
|
runtime = chip->playback_substream->runtime;
|
|
block_size = frames_to_bytes(runtime,
|
|
runtime->period_size);
|
|
chip->playback_period++;
|
|
|
|
if (chip->playback_period == runtime->periods)
|
|
chip->playback_period = 0;
|
|
next_period = chip->playback_period + 1;
|
|
if (next_period == runtime->periods)
|
|
next_period = 0;
|
|
|
|
offset = block_size * next_period;
|
|
|
|
writel(runtime->dma_addr + offset,
|
|
chip->regs + ATMEL_PDC_TNPR);
|
|
writel(block_size / 2,
|
|
chip->regs + ATMEL_PDC_TNCR);
|
|
|
|
snd_pcm_period_elapsed(
|
|
chip->playback_substream);
|
|
}
|
|
if ((casr & camr) & AC97C_CSR_ENDRX) {
|
|
runtime = chip->capture_substream->runtime;
|
|
block_size = frames_to_bytes(runtime,
|
|
runtime->period_size);
|
|
chip->capture_period++;
|
|
|
|
if (chip->capture_period == runtime->periods)
|
|
chip->capture_period = 0;
|
|
next_period = chip->capture_period + 1;
|
|
if (next_period == runtime->periods)
|
|
next_period = 0;
|
|
|
|
offset = block_size * next_period;
|
|
|
|
writel(runtime->dma_addr + offset,
|
|
chip->regs + ATMEL_PDC_RNPR);
|
|
writel(block_size / 2,
|
|
chip->regs + ATMEL_PDC_RNCR);
|
|
snd_pcm_period_elapsed(chip->capture_substream);
|
|
}
|
|
}
|
|
retval = IRQ_HANDLED;
|
|
}
|
|
|
|
if (sr & AC97C_SR_COEVT) {
|
|
dev_info(&chip->pdev->dev, "codec channel event%s%s%s%s%s\n",
|
|
cosr & AC97C_CSR_OVRUN ? " OVRUN" : "",
|
|
cosr & AC97C_CSR_RXRDY ? " RXRDY" : "",
|
|
cosr & AC97C_CSR_TXEMPTY ? " TXEMPTY" : "",
|
|
cosr & AC97C_CSR_TXRDY ? " TXRDY" : "",
|
|
!cosr ? " NONE" : "");
|
|
retval = IRQ_HANDLED;
|
|
}
|
|
|
|
if (retval == IRQ_NONE) {
|
|
dev_err(&chip->pdev->dev, "spurious interrupt sr 0x%08x "
|
|
"casr 0x%08x cosr 0x%08x\n", sr, casr, cosr);
|
|
}
|
|
|
|
return retval;
|
|
}
|
|
|
|
static struct ac97_pcm at91_ac97_pcm_defs[] = {
|
|
/* Playback */
|
|
{
|
|
.exclusive = 1,
|
|
.r = { {
|
|
.slots = ((1 << AC97_SLOT_PCM_LEFT)
|
|
| (1 << AC97_SLOT_PCM_RIGHT)),
|
|
} },
|
|
},
|
|
/* PCM in */
|
|
{
|
|
.stream = 1,
|
|
.exclusive = 1,
|
|
.r = { {
|
|
.slots = ((1 << AC97_SLOT_PCM_LEFT)
|
|
| (1 << AC97_SLOT_PCM_RIGHT)),
|
|
} }
|
|
},
|
|
/* Mic in */
|
|
{
|
|
.stream = 1,
|
|
.exclusive = 1,
|
|
.r = { {
|
|
.slots = (1<<AC97_SLOT_MIC),
|
|
} }
|
|
},
|
|
};
|
|
|
|
static int atmel_ac97c_pcm_new(struct atmel_ac97c *chip)
|
|
{
|
|
struct snd_pcm *pcm;
|
|
struct snd_pcm_hardware hw = atmel_ac97c_hw;
|
|
int capture, playback, retval, err;
|
|
|
|
capture = test_bit(DMA_RX_CHAN_PRESENT, &chip->flags);
|
|
playback = test_bit(DMA_TX_CHAN_PRESENT, &chip->flags);
|
|
|
|
if (!cpu_is_at32ap7000()) {
|
|
err = snd_ac97_pcm_assign(chip->ac97_bus,
|
|
ARRAY_SIZE(at91_ac97_pcm_defs),
|
|
at91_ac97_pcm_defs);
|
|
if (err)
|
|
return err;
|
|
}
|
|
retval = snd_pcm_new(chip->card, chip->card->shortname,
|
|
0, playback, capture, &pcm);
|
|
if (retval)
|
|
return retval;
|
|
|
|
if (capture)
|
|
snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE,
|
|
&atmel_ac97_capture_ops);
|
|
if (playback)
|
|
snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
|
|
&atmel_ac97_playback_ops);
|
|
|
|
retval = snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
|
|
&chip->pdev->dev, hw.periods_min * hw.period_bytes_min,
|
|
hw.buffer_bytes_max);
|
|
if (retval)
|
|
return retval;
|
|
|
|
pcm->private_data = chip;
|
|
pcm->info_flags = 0;
|
|
strcpy(pcm->name, chip->card->shortname);
|
|
chip->pcm = pcm;
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int atmel_ac97c_mixer_new(struct atmel_ac97c *chip)
|
|
{
|
|
struct snd_ac97_template template;
|
|
memset(&template, 0, sizeof(template));
|
|
template.private_data = chip;
|
|
return snd_ac97_mixer(chip->ac97_bus, &template, &chip->ac97);
|
|
}
|
|
|
|
static void atmel_ac97c_write(struct snd_ac97 *ac97, unsigned short reg,
|
|
unsigned short val)
|
|
{
|
|
struct atmel_ac97c *chip = get_chip(ac97);
|
|
unsigned long word;
|
|
int timeout = 40;
|
|
|
|
word = (reg & 0x7f) << 16 | val;
|
|
|
|
do {
|
|
if (ac97c_readl(chip, COSR) & AC97C_CSR_TXRDY) {
|
|
ac97c_writel(chip, COTHR, word);
|
|
return;
|
|
}
|
|
udelay(1);
|
|
} while (--timeout);
|
|
|
|
dev_dbg(&chip->pdev->dev, "codec write timeout\n");
|
|
}
|
|
|
|
static unsigned short atmel_ac97c_read(struct snd_ac97 *ac97,
|
|
unsigned short reg)
|
|
{
|
|
struct atmel_ac97c *chip = get_chip(ac97);
|
|
unsigned long word;
|
|
int timeout = 40;
|
|
int write = 10;
|
|
|
|
word = (0x80 | (reg & 0x7f)) << 16;
|
|
|
|
if ((ac97c_readl(chip, COSR) & AC97C_CSR_RXRDY) != 0)
|
|
ac97c_readl(chip, CORHR);
|
|
|
|
retry_write:
|
|
timeout = 40;
|
|
|
|
do {
|
|
if ((ac97c_readl(chip, COSR) & AC97C_CSR_TXRDY) != 0) {
|
|
ac97c_writel(chip, COTHR, word);
|
|
goto read_reg;
|
|
}
|
|
udelay(10);
|
|
} while (--timeout);
|
|
|
|
if (!--write)
|
|
goto timed_out;
|
|
goto retry_write;
|
|
|
|
read_reg:
|
|
do {
|
|
if ((ac97c_readl(chip, COSR) & AC97C_CSR_RXRDY) != 0) {
|
|
unsigned short val = ac97c_readl(chip, CORHR);
|
|
return val;
|
|
}
|
|
udelay(10);
|
|
} while (--timeout);
|
|
|
|
if (!--write)
|
|
goto timed_out;
|
|
goto retry_write;
|
|
|
|
timed_out:
|
|
dev_dbg(&chip->pdev->dev, "codec read timeout\n");
|
|
return 0xffff;
|
|
}
|
|
|
|
static bool filter(struct dma_chan *chan, void *slave)
|
|
{
|
|
struct dw_dma_slave *dws = slave;
|
|
|
|
if (dws->dma_dev == chan->device->dev) {
|
|
chan->private = dws;
|
|
return true;
|
|
} else
|
|
return false;
|
|
}
|
|
|
|
static void atmel_ac97c_reset(struct atmel_ac97c *chip)
|
|
{
|
|
ac97c_writel(chip, MR, 0);
|
|
ac97c_writel(chip, MR, AC97C_MR_ENA);
|
|
ac97c_writel(chip, CAMR, 0);
|
|
ac97c_writel(chip, COMR, 0);
|
|
|
|
if (gpio_is_valid(chip->reset_pin)) {
|
|
gpio_set_value(chip->reset_pin, 0);
|
|
/* AC97 v2.2 specifications says minimum 1 us. */
|
|
udelay(2);
|
|
gpio_set_value(chip->reset_pin, 1);
|
|
} else {
|
|
ac97c_writel(chip, MR, AC97C_MR_WRST | AC97C_MR_ENA);
|
|
udelay(2);
|
|
ac97c_writel(chip, MR, AC97C_MR_ENA);
|
|
}
|
|
}
|
|
|
|
static int atmel_ac97c_probe(struct platform_device *pdev)
|
|
{
|
|
struct snd_card *card;
|
|
struct atmel_ac97c *chip;
|
|
struct resource *regs;
|
|
struct ac97c_platform_data *pdata;
|
|
struct clk *pclk;
|
|
static struct snd_ac97_bus_ops ops = {
|
|
.write = atmel_ac97c_write,
|
|
.read = atmel_ac97c_read,
|
|
};
|
|
int retval;
|
|
int irq;
|
|
|
|
regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
|
if (!regs) {
|
|
dev_dbg(&pdev->dev, "no memory resource\n");
|
|
return -ENXIO;
|
|
}
|
|
|
|
pdata = pdev->dev.platform_data;
|
|
if (!pdata) {
|
|
dev_dbg(&pdev->dev, "no platform data\n");
|
|
return -ENXIO;
|
|
}
|
|
|
|
irq = platform_get_irq(pdev, 0);
|
|
if (irq < 0) {
|
|
dev_dbg(&pdev->dev, "could not get irq\n");
|
|
return -ENXIO;
|
|
}
|
|
|
|
if (cpu_is_at32ap7000()) {
|
|
pclk = clk_get(&pdev->dev, "pclk");
|
|
} else {
|
|
pclk = clk_get(&pdev->dev, "ac97_clk");
|
|
}
|
|
|
|
if (IS_ERR(pclk)) {
|
|
dev_dbg(&pdev->dev, "no peripheral clock\n");
|
|
return PTR_ERR(pclk);
|
|
}
|
|
clk_prepare_enable(pclk);
|
|
|
|
retval = snd_card_new(&pdev->dev, SNDRV_DEFAULT_IDX1,
|
|
SNDRV_DEFAULT_STR1, THIS_MODULE,
|
|
sizeof(struct atmel_ac97c), &card);
|
|
if (retval) {
|
|
dev_dbg(&pdev->dev, "could not create sound card device\n");
|
|
goto err_snd_card_new;
|
|
}
|
|
|
|
chip = get_chip(card);
|
|
|
|
retval = request_irq(irq, atmel_ac97c_interrupt, 0, "AC97C", chip);
|
|
if (retval) {
|
|
dev_dbg(&pdev->dev, "unable to request irq %d\n", irq);
|
|
goto err_request_irq;
|
|
}
|
|
chip->irq = irq;
|
|
|
|
spin_lock_init(&chip->lock);
|
|
|
|
strcpy(card->driver, "Atmel AC97C");
|
|
strcpy(card->shortname, "Atmel AC97C");
|
|
sprintf(card->longname, "Atmel AC97 controller");
|
|
|
|
chip->card = card;
|
|
chip->pclk = pclk;
|
|
chip->pdev = pdev;
|
|
chip->regs = ioremap(regs->start, resource_size(regs));
|
|
|
|
if (!chip->regs) {
|
|
dev_dbg(&pdev->dev, "could not remap register memory\n");
|
|
retval = -ENOMEM;
|
|
goto err_ioremap;
|
|
}
|
|
|
|
if (gpio_is_valid(pdata->reset_pin)) {
|
|
if (gpio_request(pdata->reset_pin, "reset_pin")) {
|
|
dev_dbg(&pdev->dev, "reset pin not available\n");
|
|
chip->reset_pin = -ENODEV;
|
|
} else {
|
|
gpio_direction_output(pdata->reset_pin, 1);
|
|
chip->reset_pin = pdata->reset_pin;
|
|
}
|
|
} else {
|
|
chip->reset_pin = -EINVAL;
|
|
}
|
|
|
|
atmel_ac97c_reset(chip);
|
|
|
|
/* Enable overrun interrupt from codec channel */
|
|
ac97c_writel(chip, COMR, AC97C_CSR_OVRUN);
|
|
ac97c_writel(chip, IER, ac97c_readl(chip, IMR) | AC97C_SR_COEVT);
|
|
|
|
retval = snd_ac97_bus(card, 0, &ops, chip, &chip->ac97_bus);
|
|
if (retval) {
|
|
dev_dbg(&pdev->dev, "could not register on ac97 bus\n");
|
|
goto err_ac97_bus;
|
|
}
|
|
|
|
retval = atmel_ac97c_mixer_new(chip);
|
|
if (retval) {
|
|
dev_dbg(&pdev->dev, "could not register ac97 mixer\n");
|
|
goto err_ac97_bus;
|
|
}
|
|
|
|
if (cpu_is_at32ap7000()) {
|
|
if (pdata->rx_dws.dma_dev) {
|
|
dma_cap_mask_t mask;
|
|
|
|
dma_cap_zero(mask);
|
|
dma_cap_set(DMA_SLAVE, mask);
|
|
|
|
chip->dma.rx_chan = dma_request_channel(mask, filter,
|
|
&pdata->rx_dws);
|
|
if (chip->dma.rx_chan) {
|
|
struct dma_slave_config dma_conf = {
|
|
.src_addr = regs->start + AC97C_CARHR +
|
|
2,
|
|
.src_addr_width =
|
|
DMA_SLAVE_BUSWIDTH_2_BYTES,
|
|
.src_maxburst = 1,
|
|
.dst_maxburst = 1,
|
|
.direction = DMA_DEV_TO_MEM,
|
|
.device_fc = false,
|
|
};
|
|
|
|
dmaengine_slave_config(chip->dma.rx_chan,
|
|
&dma_conf);
|
|
}
|
|
|
|
dev_info(&chip->pdev->dev, "using %s for DMA RX\n",
|
|
dev_name(&chip->dma.rx_chan->dev->device));
|
|
set_bit(DMA_RX_CHAN_PRESENT, &chip->flags);
|
|
}
|
|
|
|
if (pdata->tx_dws.dma_dev) {
|
|
dma_cap_mask_t mask;
|
|
|
|
dma_cap_zero(mask);
|
|
dma_cap_set(DMA_SLAVE, mask);
|
|
|
|
chip->dma.tx_chan = dma_request_channel(mask, filter,
|
|
&pdata->tx_dws);
|
|
if (chip->dma.tx_chan) {
|
|
struct dma_slave_config dma_conf = {
|
|
.dst_addr = regs->start + AC97C_CATHR +
|
|
2,
|
|
.dst_addr_width =
|
|
DMA_SLAVE_BUSWIDTH_2_BYTES,
|
|
.src_maxburst = 1,
|
|
.dst_maxburst = 1,
|
|
.direction = DMA_MEM_TO_DEV,
|
|
.device_fc = false,
|
|
};
|
|
|
|
dmaengine_slave_config(chip->dma.tx_chan,
|
|
&dma_conf);
|
|
}
|
|
|
|
dev_info(&chip->pdev->dev, "using %s for DMA TX\n",
|
|
dev_name(&chip->dma.tx_chan->dev->device));
|
|
set_bit(DMA_TX_CHAN_PRESENT, &chip->flags);
|
|
}
|
|
|
|
if (!test_bit(DMA_RX_CHAN_PRESENT, &chip->flags) &&
|
|
!test_bit(DMA_TX_CHAN_PRESENT, &chip->flags)) {
|
|
dev_dbg(&pdev->dev, "DMA not available\n");
|
|
retval = -ENODEV;
|
|
goto err_dma;
|
|
}
|
|
} else {
|
|
/* Just pretend that we have DMA channel(for at91 i is actually
|
|
* the PDC) */
|
|
set_bit(DMA_RX_CHAN_PRESENT, &chip->flags);
|
|
set_bit(DMA_TX_CHAN_PRESENT, &chip->flags);
|
|
}
|
|
|
|
retval = atmel_ac97c_pcm_new(chip);
|
|
if (retval) {
|
|
dev_dbg(&pdev->dev, "could not register ac97 pcm device\n");
|
|
goto err_dma;
|
|
}
|
|
|
|
retval = snd_card_register(card);
|
|
if (retval) {
|
|
dev_dbg(&pdev->dev, "could not register sound card\n");
|
|
goto err_dma;
|
|
}
|
|
|
|
platform_set_drvdata(pdev, card);
|
|
|
|
dev_info(&pdev->dev, "Atmel AC97 controller at 0x%p, irq = %d\n",
|
|
chip->regs, irq);
|
|
|
|
return 0;
|
|
|
|
err_dma:
|
|
if (cpu_is_at32ap7000()) {
|
|
if (test_bit(DMA_RX_CHAN_PRESENT, &chip->flags))
|
|
dma_release_channel(chip->dma.rx_chan);
|
|
if (test_bit(DMA_TX_CHAN_PRESENT, &chip->flags))
|
|
dma_release_channel(chip->dma.tx_chan);
|
|
clear_bit(DMA_RX_CHAN_PRESENT, &chip->flags);
|
|
clear_bit(DMA_TX_CHAN_PRESENT, &chip->flags);
|
|
chip->dma.rx_chan = NULL;
|
|
chip->dma.tx_chan = NULL;
|
|
}
|
|
err_ac97_bus:
|
|
if (gpio_is_valid(chip->reset_pin))
|
|
gpio_free(chip->reset_pin);
|
|
|
|
iounmap(chip->regs);
|
|
err_ioremap:
|
|
free_irq(irq, chip);
|
|
err_request_irq:
|
|
snd_card_free(card);
|
|
err_snd_card_new:
|
|
clk_disable_unprepare(pclk);
|
|
clk_put(pclk);
|
|
return retval;
|
|
}
|
|
|
|
#ifdef CONFIG_PM_SLEEP
|
|
static int atmel_ac97c_suspend(struct device *pdev)
|
|
{
|
|
struct snd_card *card = dev_get_drvdata(pdev);
|
|
struct atmel_ac97c *chip = card->private_data;
|
|
|
|
if (cpu_is_at32ap7000()) {
|
|
if (test_bit(DMA_RX_READY, &chip->flags))
|
|
dw_dma_cyclic_stop(chip->dma.rx_chan);
|
|
if (test_bit(DMA_TX_READY, &chip->flags))
|
|
dw_dma_cyclic_stop(chip->dma.tx_chan);
|
|
}
|
|
clk_disable_unprepare(chip->pclk);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int atmel_ac97c_resume(struct device *pdev)
|
|
{
|
|
struct snd_card *card = dev_get_drvdata(pdev);
|
|
struct atmel_ac97c *chip = card->private_data;
|
|
|
|
clk_prepare_enable(chip->pclk);
|
|
if (cpu_is_at32ap7000()) {
|
|
if (test_bit(DMA_RX_READY, &chip->flags))
|
|
dw_dma_cyclic_start(chip->dma.rx_chan);
|
|
if (test_bit(DMA_TX_READY, &chip->flags))
|
|
dw_dma_cyclic_start(chip->dma.tx_chan);
|
|
}
|
|
return 0;
|
|
}
|
|
|
|
static SIMPLE_DEV_PM_OPS(atmel_ac97c_pm, atmel_ac97c_suspend, atmel_ac97c_resume);
|
|
#define ATMEL_AC97C_PM_OPS &atmel_ac97c_pm
|
|
#else
|
|
#define ATMEL_AC97C_PM_OPS NULL
|
|
#endif
|
|
|
|
static int atmel_ac97c_remove(struct platform_device *pdev)
|
|
{
|
|
struct snd_card *card = platform_get_drvdata(pdev);
|
|
struct atmel_ac97c *chip = get_chip(card);
|
|
|
|
if (gpio_is_valid(chip->reset_pin))
|
|
gpio_free(chip->reset_pin);
|
|
|
|
ac97c_writel(chip, CAMR, 0);
|
|
ac97c_writel(chip, COMR, 0);
|
|
ac97c_writel(chip, MR, 0);
|
|
|
|
clk_disable_unprepare(chip->pclk);
|
|
clk_put(chip->pclk);
|
|
iounmap(chip->regs);
|
|
free_irq(chip->irq, chip);
|
|
|
|
if (cpu_is_at32ap7000()) {
|
|
if (test_bit(DMA_RX_CHAN_PRESENT, &chip->flags))
|
|
dma_release_channel(chip->dma.rx_chan);
|
|
if (test_bit(DMA_TX_CHAN_PRESENT, &chip->flags))
|
|
dma_release_channel(chip->dma.tx_chan);
|
|
clear_bit(DMA_RX_CHAN_PRESENT, &chip->flags);
|
|
clear_bit(DMA_TX_CHAN_PRESENT, &chip->flags);
|
|
chip->dma.rx_chan = NULL;
|
|
chip->dma.tx_chan = NULL;
|
|
}
|
|
|
|
snd_card_free(card);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static struct platform_driver atmel_ac97c_driver = {
|
|
.probe = atmel_ac97c_probe,
|
|
.remove = atmel_ac97c_remove,
|
|
.driver = {
|
|
.name = "atmel_ac97c",
|
|
.pm = ATMEL_AC97C_PM_OPS,
|
|
},
|
|
};
|
|
module_platform_driver(atmel_ac97c_driver);
|
|
|
|
MODULE_LICENSE("GPL");
|
|
MODULE_DESCRIPTION("Driver for Atmel AC97 controller");
|
|
MODULE_AUTHOR("Hans-Christian Egtvedt <egtvedt@samfundet.no>");
|