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f535b56c39
If User-space Direct Access (UDA) QP creation fails,
the QP entry is not removed from QoS list. Fix this
by removing QP from QoS list if create QP fails.
Fixes: 0fc2dc5889 ("i40iw: Add Quality of Service support")
Signed-off-by: Ivan Barrera <ivan.d.barrera@intel.com>
Signed-off-by: Shiraz Saleem <shiraz.saleem@intel.com>
Signed-off-by: Doug Ledford <dledford@redhat.com>
129 lines
5.2 KiB
C
129 lines
5.2 KiB
C
/*******************************************************************************
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*
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* Copyright (c) 2015-2016 Intel Corporation. All rights reserved.
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*
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* This software is available to you under a choice of one of two
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* licenses. You may choose to be licensed under the terms of the GNU
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* General Public License (GPL) Version 2, available from the file
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* COPYING in the main directory of this source tree, or the
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* OpenFabrics.org BSD license below:
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*
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* Redistribution and use in source and binary forms, with or
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* without modification, are permitted provided that the following
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* conditions are met:
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*
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* - Redistributions of source code must retain the above
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* copyright notice, this list of conditions and the following
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* disclaimer.
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*
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* - Redistributions in binary form must reproduce the above
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* copyright notice, this list of conditions and the following
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* disclaimer in the documentation and/or other materials
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* provided with the distribution.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*
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*******************************************************************************/
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#ifndef I40IW_P_H
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#define I40IW_P_H
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#define PAUSE_TIMER_VALUE 0xFFFF
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#define REFRESH_THRESHOLD 0x7FFF
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#define HIGH_THRESHOLD 0x800
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#define LOW_THRESHOLD 0x200
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#define ALL_TC2PFC 0xFF
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#define CQP_COMPL_WAIT_TIME 0x3E8
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#define CQP_TIMEOUT_THRESHOLD 5
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void i40iw_debug_buf(struct i40iw_sc_dev *dev, enum i40iw_debug_flag mask,
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char *desc, u64 *buf, u32 size);
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/* init operations */
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enum i40iw_status_code i40iw_device_init(struct i40iw_sc_dev *dev,
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struct i40iw_device_init_info *info);
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void i40iw_sc_cqp_post_sq(struct i40iw_sc_cqp *cqp);
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u64 *i40iw_sc_cqp_get_next_send_wqe(struct i40iw_sc_cqp *cqp, u64 scratch);
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void i40iw_check_cqp_progress(struct i40iw_cqp_timeout *cqp_timeout, struct i40iw_sc_dev *dev);
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enum i40iw_status_code i40iw_sc_mr_fast_register(struct i40iw_sc_qp *qp,
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struct i40iw_fast_reg_stag_info *info,
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bool post_sq);
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void i40iw_insert_wqe_hdr(u64 *wqe, u64 header);
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/* HMC/FPM functions */
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enum i40iw_status_code i40iw_sc_init_iw_hmc(struct i40iw_sc_dev *dev,
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u8 hmc_fn_id);
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enum i40iw_status_code i40iw_pf_init_vfhmc(struct i40iw_sc_dev *dev, u8 vf_hmc_fn_id,
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u32 *vf_cnt_array);
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/* stats functions */
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void i40iw_hw_stats_refresh_all(struct i40iw_vsi_pestat *stats);
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void i40iw_hw_stats_read_all(struct i40iw_vsi_pestat *stats, struct i40iw_dev_hw_stats *stats_values);
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void i40iw_hw_stats_read_32(struct i40iw_vsi_pestat *stats,
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enum i40iw_hw_stats_index_32b index,
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u64 *value);
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void i40iw_hw_stats_read_64(struct i40iw_vsi_pestat *stats,
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enum i40iw_hw_stats_index_64b index,
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u64 *value);
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void i40iw_hw_stats_init(struct i40iw_vsi_pestat *stats, u8 index, bool is_pf);
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/* vsi misc functions */
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enum i40iw_status_code i40iw_vsi_stats_init(struct i40iw_sc_vsi *vsi, struct i40iw_vsi_stats_info *info);
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void i40iw_vsi_stats_free(struct i40iw_sc_vsi *vsi);
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void i40iw_sc_vsi_init(struct i40iw_sc_vsi *vsi, struct i40iw_vsi_init_info *info);
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void i40iw_change_l2params(struct i40iw_sc_vsi *vsi, struct i40iw_l2params *l2params);
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void i40iw_qp_add_qos(struct i40iw_sc_qp *qp);
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void i40iw_qp_rem_qos(struct i40iw_sc_qp *qp);
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void i40iw_terminate_send_fin(struct i40iw_sc_qp *qp);
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void i40iw_terminate_connection(struct i40iw_sc_qp *qp, struct i40iw_aeqe_info *info);
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void i40iw_terminate_received(struct i40iw_sc_qp *qp, struct i40iw_aeqe_info *info);
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enum i40iw_status_code i40iw_sc_suspend_qp(struct i40iw_sc_cqp *cqp,
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struct i40iw_sc_qp *qp, u64 scratch);
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enum i40iw_status_code i40iw_sc_resume_qp(struct i40iw_sc_cqp *cqp,
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struct i40iw_sc_qp *qp, u64 scratch);
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enum i40iw_status_code i40iw_sc_static_hmc_pages_allocated(struct i40iw_sc_cqp *cqp,
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u64 scratch, u8 hmc_fn_id,
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bool post_sq,
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bool poll_registers);
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enum i40iw_status_code i40iw_config_fpm_values(struct i40iw_sc_dev *dev, u32 qp_count);
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void free_sd_mem(struct i40iw_sc_dev *dev);
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enum i40iw_status_code i40iw_process_cqp_cmd(struct i40iw_sc_dev *dev,
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struct cqp_commands_info *pcmdinfo);
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enum i40iw_status_code i40iw_process_bh(struct i40iw_sc_dev *dev);
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/* prototype for functions used for dynamic memory allocation */
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enum i40iw_status_code i40iw_allocate_dma_mem(struct i40iw_hw *hw,
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struct i40iw_dma_mem *mem, u64 size,
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u32 alignment);
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void i40iw_free_dma_mem(struct i40iw_hw *hw, struct i40iw_dma_mem *mem);
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enum i40iw_status_code i40iw_allocate_virt_mem(struct i40iw_hw *hw,
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struct i40iw_virt_mem *mem, u32 size);
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enum i40iw_status_code i40iw_free_virt_mem(struct i40iw_hw *hw,
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struct i40iw_virt_mem *mem);
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u8 i40iw_get_encoded_wqe_size(u32 wqsize, bool cqpsq);
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void i40iw_reinitialize_ieq(struct i40iw_sc_dev *dev);
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#endif
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