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a823c4aecd
Most of the CPUFreq drivers do similar things in .exit() and .verify() routines and .attr. So its better if we have generic routines for them which can be used by cpufreq drivers then. This patch uses these generic routines in the sc520 driver. Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
169 lines
3.7 KiB
C
169 lines
3.7 KiB
C
/*
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* sc520_freq.c: cpufreq driver for the AMD Elan sc520
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*
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* Copyright (C) 2005 Sean Young <sean@mess.org>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*
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* Based on elanfreq.c
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*
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* 2005-03-30: - initial revision
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/delay.h>
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#include <linux/cpufreq.h>
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#include <linux/timex.h>
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#include <linux/io.h>
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#include <asm/cpu_device_id.h>
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#include <asm/msr.h>
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#define MMCR_BASE 0xfffef000 /* The default base address */
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#define OFFS_CPUCTL 0x2 /* CPU Control Register */
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static __u8 __iomem *cpuctl;
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#define PFX "sc520_freq: "
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static struct cpufreq_frequency_table sc520_freq_table[] = {
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{0x01, 100000},
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{0x02, 133000},
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{0, CPUFREQ_TABLE_END},
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};
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static unsigned int sc520_freq_get_cpu_frequency(unsigned int cpu)
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{
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u8 clockspeed_reg = *cpuctl;
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switch (clockspeed_reg & 0x03) {
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default:
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printk(KERN_ERR PFX "error: cpuctl register has unexpected "
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"value %02x\n", clockspeed_reg);
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case 0x01:
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return 100000;
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case 0x02:
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return 133000;
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}
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}
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static void sc520_freq_set_cpu_state(struct cpufreq_policy *policy,
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unsigned int state)
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{
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struct cpufreq_freqs freqs;
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u8 clockspeed_reg;
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freqs.old = sc520_freq_get_cpu_frequency(0);
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freqs.new = sc520_freq_table[state].frequency;
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cpufreq_notify_transition(policy, &freqs, CPUFREQ_PRECHANGE);
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pr_debug("attempting to set frequency to %i kHz\n",
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sc520_freq_table[state].frequency);
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local_irq_disable();
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clockspeed_reg = *cpuctl & ~0x03;
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*cpuctl = clockspeed_reg | sc520_freq_table[state].driver_data;
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local_irq_enable();
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cpufreq_notify_transition(policy, &freqs, CPUFREQ_POSTCHANGE);
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};
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static int sc520_freq_target(struct cpufreq_policy *policy,
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unsigned int target_freq,
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unsigned int relation)
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{
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unsigned int newstate = 0;
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if (cpufreq_frequency_table_target(policy, sc520_freq_table,
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target_freq, relation, &newstate))
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return -EINVAL;
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sc520_freq_set_cpu_state(policy, newstate);
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return 0;
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}
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/*
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* Module init and exit code
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*/
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static int sc520_freq_cpu_init(struct cpufreq_policy *policy)
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{
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struct cpuinfo_x86 *c = &cpu_data(0);
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/* capability check */
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if (c->x86_vendor != X86_VENDOR_AMD ||
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c->x86 != 4 || c->x86_model != 9)
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return -ENODEV;
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/* cpuinfo and default policy values */
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policy->cpuinfo.transition_latency = 1000000; /* 1ms */
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policy->cur = sc520_freq_get_cpu_frequency(0);
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return cpufreq_table_validate_and_show(policy, sc520_freq_table);
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}
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static struct cpufreq_driver sc520_freq_driver = {
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.get = sc520_freq_get_cpu_frequency,
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.verify = cpufreq_generic_frequency_table_verify,
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.target = sc520_freq_target,
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.init = sc520_freq_cpu_init,
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.exit = cpufreq_generic_exit,
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.name = "sc520_freq",
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.attr = cpufreq_generic_attr,
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};
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static const struct x86_cpu_id sc520_ids[] = {
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{ X86_VENDOR_AMD, 4, 9 },
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{}
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};
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MODULE_DEVICE_TABLE(x86cpu, sc520_ids);
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static int __init sc520_freq_init(void)
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{
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int err;
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if (!x86_match_cpu(sc520_ids))
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return -ENODEV;
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cpuctl = ioremap((unsigned long)(MMCR_BASE + OFFS_CPUCTL), 1);
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if (!cpuctl) {
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printk(KERN_ERR "sc520_freq: error: failed to remap memory\n");
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return -ENOMEM;
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}
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err = cpufreq_register_driver(&sc520_freq_driver);
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if (err)
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iounmap(cpuctl);
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return err;
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}
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static void __exit sc520_freq_exit(void)
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{
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cpufreq_unregister_driver(&sc520_freq_driver);
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iounmap(cpuctl);
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}
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MODULE_LICENSE("GPL");
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MODULE_AUTHOR("Sean Young <sean@mess.org>");
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MODULE_DESCRIPTION("cpufreq driver for AMD's Elan sc520 CPU");
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module_init(sc520_freq_init);
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module_exit(sc520_freq_exit);
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