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465e42180c
Initial pinctrl driver for QCOM msm8994 platforms. In order to continue the initial board support for QCOM msm8994/msm8992 presented in patches from Jeremy McNicoll <jeremymc@redhat.com>, let's put a proper pinctrl driver in place. Currently, the DT for these platforms uses the msm8x74 pinctrl driver to enable basic UART. Beyond the first few pins the rest are different enough to justify it's own driver. Note: This driver is also used by QCOM's msm8992 platform as it's TLM block is the same. - Initial formatting and style was taken from the msm8x74 pinctrl driver added by Björn Andersson <bjorn.andersson@linaro.org> - Data was then adjusted per QCOM MSM8994v2 documentation for Top Level Multiplexing - Bindings documentation was based on qcom,msm8996-pinctrl.txt by Joonwoo Park <joonwoop@codeaurora.org> and then modified for msm8994 content Signed-off-by: Michael Scott <michael.scott@linaro.org> Tested-by: Jeremy McNicoll <jeremymc@redhat.com> Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
178 lines
5.9 KiB
Plaintext
178 lines
5.9 KiB
Plaintext
Qualcomm MSM8994 TLMM block
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This binding describes the Top Level Mode Multiplexer block found in the
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MSM8994 platform.
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- compatible:
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Usage: required
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Value type: <string>
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Definition: Should contain one of:
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"qcom,msm8992-pinctrl",
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"qcom,msm8994-pinctrl".
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- reg:
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Usage: required
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Value type: <prop-encoded-array>
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Definition: the base address and size of the TLMM register space.
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- interrupts:
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Usage: required
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Value type: <prop-encoded-array>
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Definition: should specify the TLMM summary IRQ.
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- interrupt-controller:
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Usage: required
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Value type: <none>
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Definition: identifies this node as an interrupt controller
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- #interrupt-cells:
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Usage: required
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Value type: <u32>
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Definition: must be 2. Specifying the pin number and flags, as defined
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in <dt-bindings/interrupt-controller/irq.h>
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- gpio-controller:
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Usage: required
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Value type: <none>
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Definition: identifies this node as a gpio controller
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- #gpio-cells:
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Usage: required
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Value type: <u32>
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Definition: must be 2. Specifying the pin number and flags, as defined
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in <dt-bindings/gpio/gpio.h>
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Please refer to ../gpio/gpio.txt and ../interrupt-controller/interrupts.txt for
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a general description of GPIO and interrupt bindings.
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Please refer to pinctrl-bindings.txt in this directory for details of the
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common pinctrl bindings used by client devices, including the meaning of the
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phrase "pin configuration node".
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The pin configuration nodes act as a container for an arbitrary number of
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subnodes. Each of these subnodes represents some desired configuration for a
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pin, a group, or a list of pins or groups. This configuration can include the
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mux function to select on those pin(s)/group(s), and various pin configuration
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parameters, such as pull-up, drive strength, etc.
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PIN CONFIGURATION NODES:
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The name of each subnode is not important; all subnodes should be enumerated
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and processed purely based on their content.
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Each subnode only affects those parameters that are explicitly listed. In
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other words, a subnode that lists a mux function but no pin configuration
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parameters implies no information about any pin configuration parameters.
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Similarly, a pin subnode that describes a pullup parameter implies no
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information about e.g. the mux function.
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The following generic properties as defined in pinctrl-bindings.txt are valid
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to specify in a pin configuration subnode:
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- pins:
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Usage: required
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Value type: <string-array>
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Definition: List of gpio pins affected by the properties specified in
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this subnode.
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Valid pins are:
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gpio0-gpio145
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Supports mux, bias and drive-strength
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sdc1_clk, sdc1_cmd, sdc1_data sdc1_rclk, sdc2_clk,
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sdc2_cmd, sdc2_data
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Supports bias and drive-strength
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- function:
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Usage: required
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Value type: <string>
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Definition: Specify the alternative function to be configured for the
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specified pins. Functions are only valid for gpio pins.
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Valid values are:
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audio_ref_clk, blsp_i2c1, blsp_i2c2, blsp_i2c3, blsp_i2c4, blsp_i2c5,
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blsp_i2c6, blsp_i2c7, blsp_i2c8, blsp_i2c9, blsp_i2c10, blsp_i2c11,
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blsp_i2c12, blsp_spi1, blsp_spi1_cs1, blsp_spi1_cs2, blsp_spi1_cs3,
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blsp_spi2, blsp_spi2_cs1, blsp_spi2_cs2, blsp_spi2_cs3, blsp_spi3,
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blsp_spi4, blsp_spi5, blsp_spi6, blsp_spi7, blsp_spi8, blsp_spi9,
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blsp_spi10, blsp_spi10_cs1, blsp_spi10_cs2, blsp_spi10_cs3, blsp_spi11,
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blsp_spi12, blsp_uart1, blsp_uart2, blsp_uart3, blsp_uart4, blsp_uart5,
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blsp_uart6, blsp_uart7, blsp_uart8, blsp_uart9, blsp_uart10, blsp_uart11,
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blsp_uart12, blsp_uim1, blsp_uim2, blsp_uim3, blsp_uim4, blsp_uim5,
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blsp_uim6, blsp_uim7, blsp_uim8, blsp_uim9, blsp_uim10, blsp_uim11,
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blsp_uim12, blsp11_i2c_scl_b, blsp11_i2c_sda_b, blsp11_uart_rx_b,
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blsp11_uart_tx_b, cam_mclk0, cam_mclk1, cam_mclk2, cam_mclk3,
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cci_async_in0, cci_async_in1, cci_async_in2, cci_i2c0, cci_i2c1,
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cci_timer0, cci_timer1, cci_timer2, cci_timer3, cci_timer4,
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gcc_gp1_clk_a, gcc_gp1_clk_b, gcc_gp2_clk_a, gcc_gp2_clk_b, gcc_gp3_clk_a,
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gcc_gp3_clk_b, gp_mn, gp_pdm0, gp_pdm1, gp_pdm2, gp0_clk,
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gp1_clk, gps_tx, gsm_tx, hdmi_cec, hdmi_ddc, hdmi_hpd, hdmi_rcv,
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mdp_vsync, mss_lte, nav_pps, nav_tsync, qdss_cti_trig_in_a,
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qdss_cti_trig_in_b, qdss_cti_trig_in_c, qdss_cti_trig_in_d,
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qdss_cti_trig_out_a, qdss_cti_trig_out_b, qdss_cti_trig_out_c,
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qdss_cti_trig_out_d, qdss_traceclk_a, qdss_traceclk_b, qdss_tracectl_a,
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qdss_tracectl_b, qdss_tracedata_a, qdss_tracedata_b, qua_mi2s, pci_e0,
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pci_e1, pri_mi2s, sdc4, sec_mi2s, slimbus, spkr_i2s, ter_mi2s, tsif1,
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tsif2, uim_batt_alarm, uim1, uim2, uim3, uim4, gpio
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- bias-disable:
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Usage: optional
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Value type: <none>
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Definition: The specified pins should be configued as no pull.
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- bias-pull-down:
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Usage: optional
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Value type: <none>
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Definition: The specified pins should be configued as pull down.
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- bias-pull-up:
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Usage: optional
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Value type: <none>
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Definition: The specified pins should be configued as pull up.
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- output-high:
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Usage: optional
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Value type: <none>
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Definition: The specified pins are configured in output mode, driven
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high.
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Not valid for sdc pins.
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- output-low:
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Usage: optional
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Value type: <none>
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Definition: The specified pins are configured in output mode, driven
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low.
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Not valid for sdc pins.
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- drive-strength:
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Usage: optional
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Value type: <u32>
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Definition: Selects the drive strength for the specified pins, in mA.
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Valid values are: 2, 4, 6, 8, 10, 12, 14 and 16
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Example:
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msmgpio: pinctrl@fd510000 {
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compatible = "qcom,msm8994-pinctrl";
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reg = <0xfd510000 0x4000>;
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interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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blsp1_uart2_default: blsp1_uart2_default {
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pinmux {
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pins = "gpio4", "gpio5";
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function = "blsp_uart2";
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};
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pinconf {
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pins = "gpio4", "gpio5";
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drive-strength = <16>;
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bias-disable;
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};
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};
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};
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