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Gen3 has two clocks (OSC and R) which look like a DIV6 clock but their divider value is read-only and depends on MD pins at bootup. Add support for such clocks by reading the value and adding a fixed clock. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> |
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.. | ||
clk-div6.c | ||
clk-div6.h | ||
clk-emev2.c | ||
clk-mstp.c | ||
clk-r8a73a4.c | ||
clk-r8a7740.c | ||
clk-r8a7778.c | ||
clk-r8a7779.c | ||
clk-rcar-gen2.c | ||
clk-rz.c | ||
clk-sh73a0.c | ||
Makefile | ||
r8a7795-cpg-mssr.c | ||
renesas-cpg-mssr.c | ||
renesas-cpg-mssr.h |