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76 lines
1.8 KiB
C
76 lines
1.8 KiB
C
/*
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* Copyright (c) 2013 Samsung Electronics Co., Ltd.
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* Copyright (c) 2013 Linaro Ltd.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* Common Clock Framework support for all PLL's in Samsung platforms
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*/
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#ifndef __SAMSUNG_CLK_PLL_H
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#define __SAMSUNG_CLK_PLL_H
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enum samsung_pll_type {
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pll_35xx,
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pll_36xx,
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pll_2550,
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pll_2650,
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};
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#define PLL_35XX_RATE(_rate, _m, _p, _s) \
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{ \
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.rate = (_rate), \
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.mdiv = (_m), \
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.pdiv = (_p), \
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.sdiv = (_s), \
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}
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#define PLL_36XX_RATE(_rate, _m, _p, _s, _k) \
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{ \
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.rate = (_rate), \
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.mdiv = (_m), \
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.pdiv = (_p), \
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.sdiv = (_s), \
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.kdiv = (_k), \
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}
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/* NOTE: Rate table should be kept sorted in descending order. */
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struct samsung_pll_rate_table {
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unsigned int rate;
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unsigned int pdiv;
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unsigned int mdiv;
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unsigned int sdiv;
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unsigned int kdiv;
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};
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enum pll45xx_type {
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pll_4500,
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pll_4502,
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pll_4508
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};
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enum pll46xx_type {
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pll_4600,
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pll_4650,
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pll_4650c,
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};
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extern struct clk * __init samsung_clk_register_pll45xx(const char *name,
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const char *pname, const void __iomem *con_reg,
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enum pll45xx_type type);
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extern struct clk * __init samsung_clk_register_pll46xx(const char *name,
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const char *pname, const void __iomem *con_reg,
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enum pll46xx_type type);
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extern struct clk *samsung_clk_register_pll6552(const char *name,
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const char *pname, void __iomem *base);
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extern struct clk *samsung_clk_register_pll6553(const char *name,
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const char *pname, void __iomem *base);
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extern struct clk * __init samsung_clk_register_pll2550x(const char *name,
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const char *pname, const void __iomem *reg_base,
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const unsigned long offset);
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#endif /* __SAMSUNG_CLK_PLL_H */
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