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f048aace29
This commit moves the whole no-hash TLB handling out of line into a new tlb_nohash.c file, and implements some basic SMP support using IPIs and/or broadcast tlbivax instructions. Note that I'm using local invalidations for D->I cache coherency. At worst, if another processor is trying to execute the same and has the old entry in its TLB, it will just take a fault and re-do the TLB flush locally (it won't re-do the cache flush in any case). Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Acked-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
190 lines
4.6 KiB
C
190 lines
4.6 KiB
C
#include <linux/module.h>
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#include <linux/threads.h>
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#include <linux/smp.h>
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#include <linux/sched.h>
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#include <linux/elfcore.h>
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#include <linux/string.h>
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#include <linux/interrupt.h>
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#include <linux/screen_info.h>
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#include <linux/vt_kern.h>
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#include <linux/nvram.h>
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#include <linux/irq.h>
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#include <linux/pci.h>
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#include <linux/delay.h>
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#include <linux/bitops.h>
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#include <asm/page.h>
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#include <asm/processor.h>
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#include <asm/cacheflush.h>
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#include <asm/uaccess.h>
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#include <asm/io.h>
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#include <asm/atomic.h>
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#include <asm/checksum.h>
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#include <asm/pgtable.h>
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#include <asm/tlbflush.h>
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#include <linux/adb.h>
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#include <linux/cuda.h>
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#include <linux/pmu.h>
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#include <asm/prom.h>
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#include <asm/system.h>
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#include <asm/pci-bridge.h>
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#include <asm/irq.h>
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#include <asm/pmac_feature.h>
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#include <asm/dma.h>
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#include <asm/machdep.h>
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#include <asm/hw_irq.h>
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#include <asm/nvram.h>
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#include <asm/mmu_context.h>
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#include <asm/backlight.h>
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#include <asm/time.h>
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#include <asm/cputable.h>
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#include <asm/btext.h>
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#include <asm/div64.h>
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#include <asm/signal.h>
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#include <asm/dcr.h>
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#include <asm/ftrace.h>
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#ifdef CONFIG_PPC32
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extern void transfer_to_handler(void);
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extern void do_IRQ(struct pt_regs *regs);
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extern void machine_check_exception(struct pt_regs *regs);
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extern void alignment_exception(struct pt_regs *regs);
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extern void program_check_exception(struct pt_regs *regs);
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extern void single_step_exception(struct pt_regs *regs);
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extern int sys_sigreturn(struct pt_regs *regs);
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EXPORT_SYMBOL(clear_pages);
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EXPORT_SYMBOL(copy_page);
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EXPORT_SYMBOL(ISA_DMA_THRESHOLD);
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EXPORT_SYMBOL(DMA_MODE_READ);
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EXPORT_SYMBOL(DMA_MODE_WRITE);
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EXPORT_SYMBOL(transfer_to_handler);
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EXPORT_SYMBOL(do_IRQ);
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EXPORT_SYMBOL(machine_check_exception);
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EXPORT_SYMBOL(alignment_exception);
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EXPORT_SYMBOL(program_check_exception);
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EXPORT_SYMBOL(single_step_exception);
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EXPORT_SYMBOL(sys_sigreturn);
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#endif
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#ifdef CONFIG_FUNCTION_TRACER
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EXPORT_SYMBOL(_mcount);
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#endif
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EXPORT_SYMBOL(strcpy);
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EXPORT_SYMBOL(strncpy);
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EXPORT_SYMBOL(strcat);
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EXPORT_SYMBOL(strlen);
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EXPORT_SYMBOL(strcmp);
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EXPORT_SYMBOL(strncmp);
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EXPORT_SYMBOL(csum_partial);
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EXPORT_SYMBOL(csum_partial_copy_generic);
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EXPORT_SYMBOL(ip_fast_csum);
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EXPORT_SYMBOL(csum_tcpudp_magic);
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EXPORT_SYMBOL(__copy_tofrom_user);
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EXPORT_SYMBOL(__clear_user);
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EXPORT_SYMBOL(__strncpy_from_user);
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EXPORT_SYMBOL(__strnlen_user);
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#ifdef CONFIG_PPC64
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EXPORT_SYMBOL(copy_4K_page);
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#endif
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#if defined(CONFIG_PCI) && defined(CONFIG_PPC32)
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EXPORT_SYMBOL(isa_io_base);
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EXPORT_SYMBOL(isa_mem_base);
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EXPORT_SYMBOL(pci_dram_offset);
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EXPORT_SYMBOL(pci_alloc_consistent);
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EXPORT_SYMBOL(pci_free_consistent);
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#endif /* CONFIG_PCI */
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EXPORT_SYMBOL(start_thread);
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EXPORT_SYMBOL(kernel_thread);
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EXPORT_SYMBOL(giveup_fpu);
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#ifdef CONFIG_ALTIVEC
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EXPORT_SYMBOL(giveup_altivec);
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#endif /* CONFIG_ALTIVEC */
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#ifdef CONFIG_VSX
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EXPORT_SYMBOL(giveup_vsx);
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#endif /* CONFIG_VSX */
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#ifdef CONFIG_SPE
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EXPORT_SYMBOL(giveup_spe);
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#endif /* CONFIG_SPE */
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#ifndef CONFIG_PPC64
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EXPORT_SYMBOL(flush_instruction_cache);
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#endif
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EXPORT_SYMBOL(__flush_icache_range);
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EXPORT_SYMBOL(flush_dcache_range);
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#ifdef CONFIG_SMP
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#ifdef CONFIG_PPC32
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EXPORT_SYMBOL(smp_hw_index);
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#endif
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#endif
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#ifdef CONFIG_ADB
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EXPORT_SYMBOL(adb_request);
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EXPORT_SYMBOL(adb_register);
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EXPORT_SYMBOL(adb_unregister);
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EXPORT_SYMBOL(adb_poll);
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EXPORT_SYMBOL(adb_try_handler_change);
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#endif /* CONFIG_ADB */
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#ifdef CONFIG_ADB_CUDA
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EXPORT_SYMBOL(cuda_request);
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EXPORT_SYMBOL(cuda_poll);
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#endif /* CONFIG_ADB_CUDA */
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EXPORT_SYMBOL(to_tm);
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#ifdef CONFIG_PPC32
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long long __ashrdi3(long long, int);
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long long __ashldi3(long long, int);
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long long __lshrdi3(long long, int);
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EXPORT_SYMBOL(__ashrdi3);
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EXPORT_SYMBOL(__ashldi3);
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EXPORT_SYMBOL(__lshrdi3);
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int __ucmpdi2(unsigned long long, unsigned long long);
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EXPORT_SYMBOL(__ucmpdi2);
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#endif
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EXPORT_SYMBOL(memcpy);
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EXPORT_SYMBOL(memset);
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EXPORT_SYMBOL(memmove);
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EXPORT_SYMBOL(memcmp);
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EXPORT_SYMBOL(memchr);
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#if defined(CONFIG_FB_VGA16_MODULE)
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EXPORT_SYMBOL(screen_info);
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#endif
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#ifdef CONFIG_PPC32
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EXPORT_SYMBOL(timer_interrupt);
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EXPORT_SYMBOL(irq_desc);
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EXPORT_SYMBOL(tb_ticks_per_jiffy);
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EXPORT_SYMBOL(cacheable_memcpy);
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#endif
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#ifdef CONFIG_PPC32
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EXPORT_SYMBOL(switch_mmu_context);
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#endif
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#ifdef CONFIG_PPC_STD_MMU_32
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extern long mol_trampoline;
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EXPORT_SYMBOL(mol_trampoline); /* For MOL */
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EXPORT_SYMBOL(flush_hash_pages); /* For MOL */
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#ifdef CONFIG_SMP
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extern int mmu_hash_lock;
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EXPORT_SYMBOL(mmu_hash_lock); /* For MOL */
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#endif /* CONFIG_SMP */
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extern long *intercept_table;
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EXPORT_SYMBOL(intercept_table);
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#endif /* CONFIG_PPC_STD_MMU_32 */
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#ifdef CONFIG_PPC_DCR_NATIVE
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EXPORT_SYMBOL(__mtdcr);
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EXPORT_SYMBOL(__mfdcr);
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#endif
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EXPORT_SYMBOL(empty_zero_page);
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