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It appears that a read access to GIC[DR]_I[CS]PENDRn doesn't always result in the pending interrupts being accurately reported if they are mapped to a HW interrupt. This is particularily visible when acking the timer interrupt and reading the GICR_ISPENDR1 register immediately after, for example (the interrupt appears as not-pending while it really is...). This is because a HW interrupt has its 'active and pending state' kept in the *physical* distributor, and not in the virtual one, as mandated by the spec (this is what allows the direct deactivation). The virtual distributor only caries the pending and active *states* (note the plural, as these are two independent and non-overlapping states). Fix it by reading the HW state back, either from the timer itself or from the distributor if necessary. Reported-by: Ricardo Koller <ricarkol@google.com> Tested-by: Ricardo Koller <ricarkol@google.com> Reviewed-by: Ricardo Koller <ricarkol@google.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20220208123726.3604198-1-maz@kernel.org |
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| .. | ||
| hyp | ||
| vgic | ||
| .gitignore | ||
| arch_timer.c | ||
| arm.c | ||
| debug.c | ||
| fpsimd.c | ||
| guest.c | ||
| handle_exit.c | ||
| hypercalls.c | ||
| inject_fault.c | ||
| irq.h | ||
| Kconfig | ||
| Makefile | ||
| mmio.c | ||
| mmu.c | ||
| pkvm.c | ||
| pmu-emul.c | ||
| pmu.c | ||
| psci.c | ||
| pvtime.c | ||
| reset.c | ||
| sys_regs.c | ||
| sys_regs.h | ||
| trace_arm.h | ||
| trace_handle_exit.h | ||
| trace.h | ||
| trng.c | ||
| va_layout.c | ||
| vgic-sys-reg-v3.c | ||