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1344500e2d
Since the VIC was converted to use generic IRQ domains IRQ 0 is silently ignored. This IRQ is used on the U300 so we're missing it now. Bump all IRQ numbers by one since they are now decoupled from the hardware IRQ numbers. Cc: Grant Likely <grant.likely@secretlab.ca> Cc: Rob Herring <rob.herring@calxeda.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
123 lines
3.5 KiB
C
123 lines
3.5 KiB
C
/*
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*
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* arch/arm/mach-u300/include/mach/irqs.h
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*
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*
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* Copyright (C) 2006-2009 ST-Ericsson AB
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* License terms: GNU General Public License (GPL) version 2
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* IRQ channel definitions for the U300 platforms.
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* Author: Linus Walleij <linus.walleij@stericsson.com>
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*/
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#ifndef __MACH_IRQS_H
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#define __MACH_IRQS_H
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#define IRQ_U300_INTCON0_START 1
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#define IRQ_U300_INTCON1_START 33
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/* These are on INTCON0 - 30 lines */
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#define IRQ_U300_IRQ0_EXT 1
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#define IRQ_U300_IRQ1_EXT 2
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#define IRQ_U300_DMA 3
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#define IRQ_U300_VIDEO_ENC_0 4
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#define IRQ_U300_VIDEO_ENC_1 5
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#define IRQ_U300_AAIF_RX 6
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#define IRQ_U300_AAIF_TX 7
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#define IRQ_U300_AAIF_VGPIO 8
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#define IRQ_U300_AAIF_WAKEUP 9
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#define IRQ_U300_PCM_I2S0_FRAME 10
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#define IRQ_U300_PCM_I2S0_FIFO 11
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#define IRQ_U300_PCM_I2S1_FRAME 12
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#define IRQ_U300_PCM_I2S1_FIFO 13
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#define IRQ_U300_XGAM_GAMCON 14
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#define IRQ_U300_XGAM_CDI 15
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#define IRQ_U300_XGAM_CDICON 16
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#if defined(CONFIG_MACH_U300_BS2X) || defined(CONFIG_MACH_U300_BS330)
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/* MMIACC not used on the DB3210 or DB3350 chips */
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#define IRQ_U300_XGAM_MMIACC 17
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#endif
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#define IRQ_U300_XGAM_PDI 18
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#define IRQ_U300_XGAM_PDICON 19
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#define IRQ_U300_XGAM_GAMEACC 20
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#define IRQ_U300_XGAM_MCIDCT 21
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#define IRQ_U300_APEX 22
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#define IRQ_U300_UART0 23
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#define IRQ_U300_SPI 24
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#define IRQ_U300_TIMER_APP_OS 25
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#define IRQ_U300_TIMER_APP_DD 26
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#define IRQ_U300_TIMER_APP_GP1 27
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#define IRQ_U300_TIMER_APP_GP2 28
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#define IRQ_U300_TIMER_OS 29
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#define IRQ_U300_TIMER_MS 30
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#define IRQ_U300_KEYPAD_KEYBF 31
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#define IRQ_U300_KEYPAD_KEYBR 32
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/* These are on INTCON1 - 32 lines */
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#define IRQ_U300_GPIO_PORT0 33
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#define IRQ_U300_GPIO_PORT1 34
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#define IRQ_U300_GPIO_PORT2 35
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#if defined(CONFIG_MACH_U300_BS2X) || defined(CONFIG_MACH_U300_BS330) || \
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defined(CONFIG_MACH_U300_BS335)
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/* These are for DB3150, DB3200 and DB3350 */
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#define IRQ_U300_WDOG 36
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#define IRQ_U300_EVHIST 37
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#define IRQ_U300_MSPRO 38
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#define IRQ_U300_MMCSD_MCIINTR0 39
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#define IRQ_U300_MMCSD_MCIINTR1 40
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#define IRQ_U300_I2C0 41
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#define IRQ_U300_I2C1 42
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#define IRQ_U300_RTC 43
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#define IRQ_U300_NFIF 44
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#define IRQ_U300_NFIF2 45
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#endif
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/* DB3150 and DB3200 have only 45 IRQs */
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#if defined(CONFIG_MACH_U300_BS2X) || defined(CONFIG_MACH_U300_BS330)
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#define U300_VIC_IRQS_END 46
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#endif
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/* The DB3350-specific interrupt lines */
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#ifdef CONFIG_MACH_U300_BS335
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#define IRQ_U300_ISP_F0 46
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#define IRQ_U300_ISP_F1 47
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#define IRQ_U300_ISP_F2 48
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#define IRQ_U300_ISP_F3 49
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#define IRQ_U300_ISP_F4 50
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#define IRQ_U300_GPIO_PORT3 51
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#define IRQ_U300_SYSCON_PLL_LOCK 52
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#define IRQ_U300_UART1 53
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#define IRQ_U300_GPIO_PORT4 54
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#define IRQ_U300_GPIO_PORT5 55
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#define IRQ_U300_GPIO_PORT6 56
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#define U300_VIC_IRQS_END 57
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#endif
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/* The DB3210-specific interrupt lines */
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#ifdef CONFIG_MACH_U300_BS365
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#define IRQ_U300_GPIO_PORT3 36
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#define IRQ_U300_GPIO_PORT4 37
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#define IRQ_U300_WDOG 38
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#define IRQ_U300_EVHIST 39
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#define IRQ_U300_MSPRO 40
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#define IRQ_U300_MMCSD_MCIINTR0 41
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#define IRQ_U300_MMCSD_MCIINTR1 42
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#define IRQ_U300_I2C0 43
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#define IRQ_U300_I2C1 44
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#define IRQ_U300_RTC 45
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#define IRQ_U300_NFIF 46
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#define IRQ_U300_NFIF2 47
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#define IRQ_U300_SYSCON_PLL_LOCK 48
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#define U300_VIC_IRQS_END 49
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#endif
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/* Maximum 8*7 GPIO lines */
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#ifdef CONFIG_PINCTRL_COH901
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#define IRQ_U300_GPIO_BASE (U300_VIC_IRQS_END)
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#define IRQ_U300_GPIO_END (IRQ_U300_GPIO_BASE + 56)
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#else
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#define IRQ_U300_GPIO_END (U300_VIC_IRQS_END)
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#endif
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#define NR_IRQS (IRQ_U300_GPIO_END - IRQ_U300_INTCON0_START)
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#endif
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