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CMU_MFCMSCL clock domain provides clocks for MFC (Multi-Format Codec),
JPEG Codec and Scaler IP-cores. According to Exynos850 TRM, CMU_MFCMSCL
generates MFC, M2M, MCSC and JPEG clocks for BLK_MFCMSCL.
This patch adds next clocks:
- bus clocks in CMU_TOP for CMU_MFCMSCL
- all internal CMU_MFCMSCL clocks
- leaf clocks for MFCMSCL, TZPC (TrustZone Protection Controller),
JPEG codec, M2M (Memory-to-Memory), MCSC (Multi-Channel Scaler),
MFC (Multi-Format Codec), PPMU (Platform Performance Monitoring
Unit), SysMMU and SysReg
MFCMSCL related gate clocks in CMU_TOP were marked as CLK_IS_CRITICAL,
because:
1. All of those have to be enabled in order to read
/sys/kernel/debug/clk/clk_summary file
2. When some user driver (e.g. exynos-sysmmu) disables some derived
leaf clock, it can lead to CMU_TOP clocks disable, which then makes
the system hang. To prevent that, the CLK_IS_CRITICAL flag is used,
as CLK_IGNORE_UNUSED is not enough.
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Acked-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220809113323.29965-8-semen.protsenko@linaro.org
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| .. | ||
| clk-cpu.c | ||
| clk-cpu.h | ||
| clk-exynos4.c | ||
| clk-exynos5-subcmu.c | ||
| clk-exynos5-subcmu.h | ||
| clk-exynos7.c | ||
| clk-exynos850.c | ||
| clk-exynos3250.c | ||
| clk-exynos4412-isp.c | ||
| clk-exynos5250.c | ||
| clk-exynos5260.c | ||
| clk-exynos5260.h | ||
| clk-exynos5410.c | ||
| clk-exynos5420.c | ||
| clk-exynos5433.c | ||
| clk-exynos7885.c | ||
| clk-exynos-arm64.c | ||
| clk-exynos-arm64.h | ||
| clk-exynos-audss.c | ||
| clk-exynos-clkout.c | ||
| clk-exynosautov9.c | ||
| clk-fsd.c | ||
| clk-pll.c | ||
| clk-pll.h | ||
| clk-s3c64xx.c | ||
| clk-s3c2410-dclk.c | ||
| clk-s3c2410.c | ||
| clk-s3c2412.c | ||
| clk-s3c2443.c | ||
| clk-s5pv210-audss.c | ||
| clk-s5pv210.c | ||
| clk.c | ||
| clk.h | ||
| Kconfig | ||
| Makefile | ||