linux/arch/arm/mach-s3c/map-base.h
Arnd Bergmann 91276c0fa4 ARM: s3c24xx: remove support for ISA drivers on BAST PC/104
BAST is the one machine that theoretically supports unmodified ISA
drivers for hardware on its PC/104 connector, using a custom version of
the inb()/outb() and inw()/outw() macros.

This is incompatible with the generic version used in asm/io.h, and
can't easily be used in a multiplatform kernel.

Removing the special case for 16-bit I/O port access on BAST gets us
closer to multiplatform, at the expense of any PC/104 users with 16-bit
cards having to either use an older kernel or modify their ISA drivers
to manually ioremap() the area and use readw()/write() in place of
inw()/outw(). Either way is probably ok, given that there is a
recurring discussion about dropping s3c24xx altogether, and many
traditional ISA drivers are already gone.

Machines other than BAST already have no support for ISA drivers, though a
couple of them do map one of the external chip-selects into the ISA port
range, using the same address for 8-bit and 16-bit I/O. It is unlikely
that anything actually uses this mapping, but it's also easy to keep
this working by mapping it to the normal platform-independent PCI I/O
base that is otherwise unused on s3c24xx.

The mach/map-base.h file is no longer referenced in global headers and
can be moved into the platform directory.

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-04-07 09:31:21 +02:00

49 lines
1.5 KiB
C

/* SPDX-License-Identifier: GPL-2.0 */
/*
* Copyright 2003, 2007 Simtec Electronics
* http://armlinux.simtec.co.uk/
* Ben Dooks <ben@simtec.co.uk>
*
* S3C - Memory map definitions (virtual addresses)
*/
#ifndef __ASM_PLAT_MAP_H
#define __ASM_PLAT_MAP_H __FILE__
/* Fit all our registers in at 0xF6000000 upwards, trying to use as
* little of the VA space as possible so vmalloc and friends have a
* better chance of getting memory.
*
* we try to ensure stuff like the IRQ registers are available for
* an single MOVS instruction (ie, only 8 bits of set data)
*/
#define S3C_ADDR_BASE 0xF6000000
#ifndef __ASSEMBLY__
#define S3C_ADDR(x) ((void __iomem __force *)S3C_ADDR_BASE + (x))
#else
#define S3C_ADDR(x) (S3C_ADDR_BASE + (x))
#endif
#define S3C_VA_IRQ S3C_ADDR(0x00000000) /* irq controller(s) */
#define S3C_VA_SYS S3C_ADDR(0x00100000) /* system control */
#define S3C_VA_MEM S3C_ADDR(0x00200000) /* memory control */
#define S3C_VA_TIMER S3C_ADDR(0x00300000) /* timer block */
#define S3C_VA_WATCHDOG S3C_ADDR(0x00400000) /* watchdog */
#define S3C_VA_UART S3C_ADDR(0x01000000) /* UART */
/* ISA device mapping for BAST to use with inb()/outb() on 8-bit I/O.
* 16-bit I/O on BAST now requires driver modifications to manually
* ioremap CS3.
*/
#define S3C24XX_VA_ISA_BYTE PCI_IOBASE
/* This is used for the CPU specific mappings that may be needed, so that
* they do not need to directly used S3C_ADDR() and thus make it easier to
* modify the space for mapping.
*/
#define S3C_ADDR_CPU(x) S3C_ADDR(0x00500000 + (x))
#endif /* __ASM_PLAT_MAP_H */