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cbed8388bf
Now that we can specify which PMU variant we're likely to deal with, do so in the realview board code. This will allow us to split the ARMv6, ARMv7, and XScale PMU drivers. The Realview EB may be used with ARMv6 or ARMv7 CPUs, but luckily there's only a single ARMv7 CPU, so we can match that explicitly to determine whether or not we have an ARMv7 PMU. Signed-off-by: Mark Rutland <mark.rutland@arm.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Olof Johansson <olof@lixom.net> Cc: Russell King <linux@arm.linux.org.uk> Signed-off-by: Olof Johansson <olof@lixom.net>
316 lines
8.5 KiB
C
316 lines
8.5 KiB
C
/*
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* linux/arch/arm/mach-realview/realview_pba8.c
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*
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* Copyright (C) 2008 ARM Limited
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* Copyright (C) 2000 Deep Blue Solutions Ltd
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#include <linux/init.h>
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#include <linux/platform_device.h>
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#include <linux/device.h>
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#include <linux/amba/bus.h>
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#include <linux/amba/pl061.h>
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#include <linux/amba/mmci.h>
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#include <linux/amba/pl022.h>
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#include <linux/io.h>
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#include <linux/irqchip/arm-gic.h>
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#include <linux/platform_data/clk-realview.h>
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#include <linux/reboot.h>
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#include <asm/irq.h>
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#include <asm/mach-types.h>
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#include <asm/pgtable.h>
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#include <asm/mach/arch.h>
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#include <asm/mach/map.h>
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#include <asm/mach/time.h>
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#include <mach/hardware.h>
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#include <mach/board-pba8.h>
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#include <mach/irqs.h>
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#include "core.h"
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static struct map_desc realview_pba8_io_desc[] __initdata = {
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{
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.virtual = IO_ADDRESS(REALVIEW_SYS_BASE),
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.pfn = __phys_to_pfn(REALVIEW_SYS_BASE),
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.length = SZ_4K,
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.type = MT_DEVICE,
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}, {
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.virtual = IO_ADDRESS(REALVIEW_PBA8_GIC_CPU_BASE),
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.pfn = __phys_to_pfn(REALVIEW_PBA8_GIC_CPU_BASE),
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.length = SZ_4K,
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.type = MT_DEVICE,
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}, {
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.virtual = IO_ADDRESS(REALVIEW_PBA8_GIC_DIST_BASE),
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.pfn = __phys_to_pfn(REALVIEW_PBA8_GIC_DIST_BASE),
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.length = SZ_4K,
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.type = MT_DEVICE,
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}, {
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.virtual = IO_ADDRESS(REALVIEW_SCTL_BASE),
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.pfn = __phys_to_pfn(REALVIEW_SCTL_BASE),
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.length = SZ_4K,
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.type = MT_DEVICE,
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}, {
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.virtual = IO_ADDRESS(REALVIEW_PBA8_TIMER0_1_BASE),
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.pfn = __phys_to_pfn(REALVIEW_PBA8_TIMER0_1_BASE),
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.length = SZ_4K,
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.type = MT_DEVICE,
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}, {
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.virtual = IO_ADDRESS(REALVIEW_PBA8_TIMER2_3_BASE),
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.pfn = __phys_to_pfn(REALVIEW_PBA8_TIMER2_3_BASE),
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.length = SZ_4K,
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.type = MT_DEVICE,
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},
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#ifdef CONFIG_PCI
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{
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.virtual = PCIX_UNIT_BASE,
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.pfn = __phys_to_pfn(REALVIEW_PBA8_PCI_BASE),
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.length = REALVIEW_PBA8_PCI_BASE_SIZE,
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.type = MT_DEVICE
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},
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#endif
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#ifdef CONFIG_DEBUG_LL
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{
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.virtual = IO_ADDRESS(REALVIEW_PBA8_UART0_BASE),
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.pfn = __phys_to_pfn(REALVIEW_PBA8_UART0_BASE),
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.length = SZ_4K,
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.type = MT_DEVICE,
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},
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#endif
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};
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static void __init realview_pba8_map_io(void)
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{
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iotable_init(realview_pba8_io_desc, ARRAY_SIZE(realview_pba8_io_desc));
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}
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static struct pl061_platform_data gpio0_plat_data = {
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.gpio_base = 0,
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};
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static struct pl061_platform_data gpio1_plat_data = {
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.gpio_base = 8,
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};
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static struct pl061_platform_data gpio2_plat_data = {
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.gpio_base = 16,
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};
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static struct pl022_ssp_controller ssp0_plat_data = {
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.bus_id = 0,
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.enable_dma = 0,
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.num_chipselect = 1,
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};
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/*
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* RealView PBA8Core AMBA devices
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*/
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#define GPIO2_IRQ { IRQ_PBA8_GPIO2 }
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#define GPIO3_IRQ { IRQ_PBA8_GPIO3 }
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#define AACI_IRQ { IRQ_PBA8_AACI }
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#define MMCI0_IRQ { IRQ_PBA8_MMCI0A, IRQ_PBA8_MMCI0B }
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#define KMI0_IRQ { IRQ_PBA8_KMI0 }
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#define KMI1_IRQ { IRQ_PBA8_KMI1 }
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#define PBA8_SMC_IRQ { }
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#define MPMC_IRQ { }
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#define PBA8_CLCD_IRQ { IRQ_PBA8_CLCD }
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#define DMAC_IRQ { IRQ_PBA8_DMAC }
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#define SCTL_IRQ { }
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#define PBA8_WATCHDOG_IRQ { IRQ_PBA8_WATCHDOG }
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#define PBA8_GPIO0_IRQ { IRQ_PBA8_GPIO0 }
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#define GPIO1_IRQ { IRQ_PBA8_GPIO1 }
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#define PBA8_RTC_IRQ { IRQ_PBA8_RTC }
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#define SCI_IRQ { IRQ_PBA8_SCI }
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#define PBA8_UART0_IRQ { IRQ_PBA8_UART0 }
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#define PBA8_UART1_IRQ { IRQ_PBA8_UART1 }
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#define PBA8_UART2_IRQ { IRQ_PBA8_UART2 }
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#define PBA8_UART3_IRQ { IRQ_PBA8_UART3 }
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#define PBA8_SSP_IRQ { IRQ_PBA8_SSP }
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/* FPGA Primecells */
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APB_DEVICE(aaci, "fpga:aaci", AACI, NULL);
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APB_DEVICE(mmc0, "fpga:mmc0", MMCI0, &realview_mmc0_plat_data);
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APB_DEVICE(kmi0, "fpga:kmi0", KMI0, NULL);
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APB_DEVICE(kmi1, "fpga:kmi1", KMI1, NULL);
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APB_DEVICE(uart3, "fpga:uart3", PBA8_UART3, NULL);
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/* DevChip Primecells */
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AHB_DEVICE(smc, "dev:smc", PBA8_SMC, NULL);
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AHB_DEVICE(sctl, "dev:sctl", SCTL, NULL);
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APB_DEVICE(wdog, "dev:wdog", PBA8_WATCHDOG, NULL);
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APB_DEVICE(gpio0, "dev:gpio0", PBA8_GPIO0, &gpio0_plat_data);
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APB_DEVICE(gpio1, "dev:gpio1", GPIO1, &gpio1_plat_data);
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APB_DEVICE(gpio2, "dev:gpio2", GPIO2, &gpio2_plat_data);
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APB_DEVICE(rtc, "dev:rtc", PBA8_RTC, NULL);
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APB_DEVICE(sci0, "dev:sci0", SCI, NULL);
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APB_DEVICE(uart0, "dev:uart0", PBA8_UART0, NULL);
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APB_DEVICE(uart1, "dev:uart1", PBA8_UART1, NULL);
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APB_DEVICE(uart2, "dev:uart2", PBA8_UART2, NULL);
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APB_DEVICE(ssp0, "dev:ssp0", PBA8_SSP, &ssp0_plat_data);
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/* Primecells on the NEC ISSP chip */
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AHB_DEVICE(clcd, "issp:clcd", PBA8_CLCD, &clcd_plat_data);
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AHB_DEVICE(dmac, "issp:dmac", DMAC, NULL);
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static struct amba_device *amba_devs[] __initdata = {
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&dmac_device,
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&uart0_device,
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&uart1_device,
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&uart2_device,
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&uart3_device,
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&smc_device,
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&clcd_device,
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&sctl_device,
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&wdog_device,
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&gpio0_device,
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&gpio1_device,
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&gpio2_device,
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&rtc_device,
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&sci0_device,
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&ssp0_device,
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&aaci_device,
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&mmc0_device,
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&kmi0_device,
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&kmi1_device,
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};
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/*
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* RealView PB-A8 platform devices
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*/
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static struct resource realview_pba8_flash_resource[] = {
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[0] = {
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.start = REALVIEW_PBA8_FLASH0_BASE,
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.end = REALVIEW_PBA8_FLASH0_BASE + REALVIEW_PBA8_FLASH0_SIZE - 1,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = REALVIEW_PBA8_FLASH1_BASE,
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.end = REALVIEW_PBA8_FLASH1_BASE + REALVIEW_PBA8_FLASH1_SIZE - 1,
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.flags = IORESOURCE_MEM,
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},
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};
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static struct resource realview_pba8_smsc911x_resources[] = {
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[0] = {
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.start = REALVIEW_PBA8_ETH_BASE,
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.end = REALVIEW_PBA8_ETH_BASE + SZ_64K - 1,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = IRQ_PBA8_ETH,
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.end = IRQ_PBA8_ETH,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct resource realview_pba8_isp1761_resources[] = {
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[0] = {
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.start = REALVIEW_PBA8_USB_BASE,
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.end = REALVIEW_PBA8_USB_BASE + SZ_128K - 1,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = IRQ_PBA8_USB,
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.end = IRQ_PBA8_USB,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct resource pmu_resource = {
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.start = IRQ_PBA8_PMU,
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.end = IRQ_PBA8_PMU,
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.flags = IORESOURCE_IRQ,
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};
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static struct platform_device pmu_device = {
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.name = "armv7-pmu",
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.id = -1,
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.num_resources = 1,
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.resource = &pmu_resource,
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};
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static void __init gic_init_irq(void)
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{
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/* ARM PB-A8 on-board GIC */
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gic_init(0, IRQ_PBA8_GIC_START,
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__io_address(REALVIEW_PBA8_GIC_DIST_BASE),
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__io_address(REALVIEW_PBA8_GIC_CPU_BASE));
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}
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static void __init realview_pba8_timer_init(void)
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{
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timer0_va_base = __io_address(REALVIEW_PBA8_TIMER0_1_BASE);
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timer1_va_base = __io_address(REALVIEW_PBA8_TIMER0_1_BASE) + 0x20;
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timer2_va_base = __io_address(REALVIEW_PBA8_TIMER2_3_BASE);
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timer3_va_base = __io_address(REALVIEW_PBA8_TIMER2_3_BASE) + 0x20;
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realview_clk_init(__io_address(REALVIEW_SYS_BASE), false);
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realview_timer_init(IRQ_PBA8_TIMER0_1);
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}
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static void realview_pba8_restart(enum reboot_mode mode, const char *cmd)
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{
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void __iomem *reset_ctrl = __io_address(REALVIEW_SYS_RESETCTL);
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void __iomem *lock_ctrl = __io_address(REALVIEW_SYS_LOCK);
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/*
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* To reset, we hit the on-board reset register
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* in the system FPGA
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*/
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__raw_writel(REALVIEW_SYS_LOCK_VAL, lock_ctrl);
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__raw_writel(0x0000, reset_ctrl);
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__raw_writel(0x0004, reset_ctrl);
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dsb();
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}
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static void __init realview_pba8_init(void)
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{
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int i;
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realview_flash_register(realview_pba8_flash_resource,
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ARRAY_SIZE(realview_pba8_flash_resource));
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realview_eth_register(NULL, realview_pba8_smsc911x_resources);
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platform_device_register(&realview_i2c_device);
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platform_device_register(&realview_cf_device);
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platform_device_register(&realview_leds_device);
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realview_usb_register(realview_pba8_isp1761_resources);
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platform_device_register(&pmu_device);
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for (i = 0; i < ARRAY_SIZE(amba_devs); i++) {
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struct amba_device *d = amba_devs[i];
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amba_device_register(d, &iomem_resource);
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}
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}
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MACHINE_START(REALVIEW_PBA8, "ARM-RealView PB-A8")
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/* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
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.atag_offset = 0x100,
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.fixup = realview_fixup,
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.map_io = realview_pba8_map_io,
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.init_early = realview_init_early,
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.init_irq = gic_init_irq,
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.init_time = realview_pba8_timer_init,
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.init_machine = realview_pba8_init,
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#ifdef CONFIG_ZONE_DMA
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.dma_zone_size = SZ_256M,
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#endif
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.restart = realview_pba8_restart,
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MACHINE_END
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