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3828ee047d
Remove the {set,get}_434_reg() prototypes, as the functions have been
removed. Also move the prototypes for {get,set}_latch_u5() to the correct
place.
Signed-off-by: Phil Sutter <n0-1@freewrt.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
90 lines
2.1 KiB
C
90 lines
2.1 KiB
C
/*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* Copyright (C) 2004 IDT Inc.
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* Copyright (C) 2006 Felix Fietkau <nbd@openwrt.org>
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*/
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#ifndef __ASM_RC32434_RB_H
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#define __ASM_RC32434_RB_H
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#include <linux/genhd.h>
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#define REGBASE 0x18000000
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#define IDT434_REG_BASE ((volatile void *) KSEG1ADDR(REGBASE))
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#define UART0BASE 0x58000
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#define RST (1 << 15)
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#define DEV0BASE 0x010000
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#define DEV0MASK 0x010004
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#define DEV0C 0x010008
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#define DEV0T 0x01000C
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#define DEV1BASE 0x010010
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#define DEV1MASK 0x010014
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#define DEV1C 0x010018
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#define DEV1TC 0x01001C
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#define DEV2BASE 0x010020
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#define DEV2MASK 0x010024
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#define DEV2C 0x010028
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#define DEV2TC 0x01002C
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#define DEV3BASE 0x010030
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#define DEV3MASK 0x010034
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#define DEV3C 0x010038
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#define DEV3TC 0x01003C
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#define BTCS 0x010040
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#define BTCOMPARE 0x010044
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#define GPIOBASE 0x050000
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/* Offsets relative to GPIOBASE */
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#define GPIOFUNC 0x00
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#define GPIOCFG 0x04
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#define GPIOD 0x08
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#define GPIOILEVEL 0x0C
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#define GPIOISTAT 0x10
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#define GPIONMIEN 0x14
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#define IMASK6 0x38
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#define LO_WPX (1 << 0)
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#define LO_ALE (1 << 1)
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#define LO_CLE (1 << 2)
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#define LO_CEX (1 << 3)
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#define LO_FOFF (1 << 5)
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#define LO_SPICS (1 << 6)
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#define LO_ULED (1 << 7)
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#define BIT_TO_MASK(x) (1 << x)
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struct dev_reg {
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u32 base;
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u32 mask;
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u32 ctl;
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u32 timing;
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};
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struct korina_device {
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char *name;
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unsigned char mac[6];
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struct net_device *dev;
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};
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struct cf_device {
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int gpio_pin;
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void *dev;
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struct gendisk *gd;
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};
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struct mpmc_device {
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unsigned char state;
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spinlock_t lock;
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void __iomem *base;
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};
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extern void set_latch_u5(unsigned char or_mask, unsigned char nand_mask);
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extern unsigned char get_latch_u5(void);
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#endif /* __ASM_RC32434_RB_H */
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