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527d147074
We add device tree files for a couple of additional SoCs in various areas:
Allwinner R40/V40 for entertainment, Broadcom Hurricane 2 for networking,
Amlogic A113D for audio, and Renesas R-Car V3M for automotive.
As usual, lots of new boards get added based on those and other SoCs:
- Actions S500 based CubieBoard6 single-board computer
- Amlogic Meson-AXG A113D based development board
- Amlogic S912 based Khadas VIM2 single-board computer
- Amlogic S912 based Tronsmart Vega S96 set-top-box
- Allwinner H5 based NanoPi NEO Plus2 single-board computer
- Allwinner R40 based Banana Pi M2 Ultra and Berry single-board computers
- Allwinner A83T based TBS A711 Tablet
- Broadcom Hurricane 2 based Ubiquiti UniFi Switch 8
- Broadcom bcm47xx based Luxul XAP-1440/XAP-810/ABR-4500/XBR-4500
wireless access points and routers
- NXP i.MX51 based Zodiac Inflight Innovations RDU1 board
- NXP i.MX53 based GE Healthcare PPD biometric monitor
- NXP i.MX6 based Pistachio single-board computer
- NXP i.MX6 based Vining-2000 automotive diagnostic interface
- NXP i.MX6 based Ka-Ro TX6 Computer-on-Module in additional variants
- Qualcomm MSM8974 (Snapdragon 800) based Fairphone 2 phone
- Qualcomm MSM8974pro (Snapdragon 801) based Sony Xperia Z2 Tablet
- Realtek RTD1295 based set-top-boxes MeLE V9 and PROBOX2 AVA
- Renesas R-Car V3M (R8A77970) SoC and "Eagle" reference board
- Renesas H3ULCB and M3ULCB "Kingfisher" extension infotainment boards
- Renasas r8a7745 based iWave G22D-SODIMM SoM
- Rockchip rk3288 based Amarula Vyasa single-board computer
- Samsung Exynos5800 based Odroid HC1 single-board computer
For existing SoC support, there was a lot of ongoing work, as usual
most of that concentrated on the Renesas, Rockchip, OMAP, i.MX, Amlogic
and Allwinner platforms, but others were also active.
Rob Herring and many others worked on reducing the number of issues that
the latest version of 'dtc' now warns about. Unfortunately there is still
a lot left to do.
A rework of the ARM foundation model introduced several new files
for common variations of the model.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJaDhcfAAoJEGCrR//JCVIngu0QAI2ntVotaOAOaCurNCnoVwI1
j+eKwHGTawQRcSHWN8C+p4FzzaOmw+vvbOyewky8PWaDOCkK6yWEHRf3hb2la2jw
j9prht28R1RAHIRPuah4SxKHYoT4VW9q/2hMHJ2BiNDOMX54xE7j2cUvWSsIRz5o
id2QqKsp2OIDNQAXAA4N25FjdBCYvSik80panSdJITtJODIj6UfmcXSgqkoQ3TTV
rwVyFtryl9Si3eyZYcfB2/0ILKuaMC8gl7IX9z+PkRqu9XN7i6bZKZlMMtpJqX3u
Ad89kLkFqNhiwZ77bIoRRl+0NEoSu5hTPLHRqghS6gPfDY2JT6igf0rGC8twjfea
fzGOBWr6NlIlUmR4smS0GyE/3YsfOQvYWjE+zx5qkmay30TORVTZBzsBR+kQJzKK
tnbO1zvst1ECtk9e8np0di4NAo9rwM37dxpu4aspP1Umxw1K68VSNE3RhGl8UUwW
oNvHa8hD8Ck0QDBNltrkmKBVoIYKRU3XhXrRXVjRQdu6Xitml0XYBi80V0h33EE3
162UXDEMu1/aqRRZUtKw7+yozT8fqOHjH8Zrv2zCVGg0HEwVohcWv/BPXbrg0abJ
wXYS8VocZJP6Nb4FQMe+cRbBUHoBgBQqbsF60tWiYsjv0zoc5hogLWcZYqzDcIO6
06OBR3HgUW27urUn/JBu
=TnSo
-----END PGP SIGNATURE-----
Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM device-tree updates from Arnd Bergmann:
"We add device tree files for a couple of additional SoCs in various
areas:
Allwinner R40/V40 for entertainment, Broadcom Hurricane 2 for
networking, Amlogic A113D for audio, and Renesas R-Car V3M for
automotive.
As usual, lots of new boards get added based on those and other SoCs:
- Actions S500 based CubieBoard6 single-board computer
- Amlogic Meson-AXG A113D based development board
- Amlogic S912 based Khadas VIM2 single-board computer
- Amlogic S912 based Tronsmart Vega S96 set-top-box
- Allwinner H5 based NanoPi NEO Plus2 single-board computer
- Allwinner R40 based Banana Pi M2 Ultra and Berry single-board computers
- Allwinner A83T based TBS A711 Tablet
- Broadcom Hurricane 2 based Ubiquiti UniFi Switch 8
- Broadcom bcm47xx based Luxul XAP-1440/XAP-810/ABR-4500/XBR-4500
wireless access points and routers
- NXP i.MX51 based Zodiac Inflight Innovations RDU1 board
- NXP i.MX53 based GE Healthcare PPD biometric monitor
- NXP i.MX6 based Pistachio single-board computer
- NXP i.MX6 based Vining-2000 automotive diagnostic interface
- NXP i.MX6 based Ka-Ro TX6 Computer-on-Module in additional variants
- Qualcomm MSM8974 (Snapdragon 800) based Fairphone 2 phone
- Qualcomm MSM8974pro (Snapdragon 801) based Sony Xperia Z2 Tablet
- Realtek RTD1295 based set-top-boxes MeLE V9 and PROBOX2 AVA
- Renesas R-Car V3M (R8A77970) SoC and "Eagle" reference board
- Renesas H3ULCB and M3ULCB "Kingfisher" extension infotainment boards
- Renasas r8a7745 based iWave G22D-SODIMM SoM
- Rockchip rk3288 based Amarula Vyasa single-board computer
- Samsung Exynos5800 based Odroid HC1 single-board computer
For existing SoC support, there was a lot of ongoing work, as usual
most of that concentrated on the Renesas, Rockchip, OMAP, i.MX,
Amlogic and Allwinner platforms, but others were also active.
Rob Herring and many others worked on reducing the number of issues
that the latest version of 'dtc' now warns about. Unfortunately there
is still a lot left to do.
A rework of the ARM foundation model introduced several new files for
common variations of the model"
* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (599 commits)
arm64: dts: uniphier: route on-board device IRQ to GPIO controller for PXs3
dt-bindings: bus: Add documentation for the Technologic Systems NBUS
arm64: dts: actions: s900-bubblegum-96: Add fake uart5 clock
ARM: dts: owl-s500: Add CubieBoard6
dt-bindings: arm: actions: Add CubieBoard6
ARM: dts: owl-s500-guitar-bb-rev-b: Add fake uart3 clock
ARM: dts: owl-s500: Set power domains for CPU2 and CPU3
arm: dts: mt7623: remove unused compatible string for pio node
arm: dts: mt7623: update usb related nodes
arm: dts: mt7623: update crypto node
ARM: dts: sun8i: a711: Enable USB OTG
ARM: dts: sun8i: a711: Add regulator support
ARM: dts: sun8i: a83t: bananapi-m3: Enable AP6212 WiFi on mmc1
ARM: dts: sun8i: a83t: cubietruck-plus: Enable AP6330 WiFi on mmc1
ARM: dts: sun8i: a83t: Move mmc1 pinctrl setting to dtsi file
ARM: dts: sun8i: a83t: allwinner-h8homlet-v2: Add AXP818 regulator nodes
ARM: dts: sun8i: a83t: bananapi-m3: Add AXP813 regulator nodes
ARM: dts: sun8i: a83t: cubietruck-plus: Add AXP818 regulator nodes
ARM: dts: sunxi: Add dtsi for AXP81x PMIC
arm64: dts: allwinner: H5: Restore EMAC changes
...
444 lines
13 KiB
Plaintext
444 lines
13 KiB
Plaintext
/*
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* Copyright (C) 2016 Marvell Technology Group Ltd.
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*
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* This file is dual-licensed: you can use it either under the terms
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* of the GPLv2 or the X11 license, at your option. Note that this dual
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* licensing only applies to this file, and not this project as a
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* whole.
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*
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* a) This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of the
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* License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* Or, alternatively,
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*
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* b) Permission is hereby granted, free of charge, to any person
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* obtaining a copy of this software and associated documentation
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* files (the "Software"), to deal in the Software without
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* restriction, including without limitation the rights to use,
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* copy, modify, merge, publish, distribute, sublicense, and/or
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* sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following
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* conditions:
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*
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* The above copyright notice and this permission notice shall be
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* included in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
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* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
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* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*/
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/*
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* Device Tree file for Marvell Armada CP110 Master.
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*/
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#define ICU_GRP_NSR 0x0
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/ {
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cp110-master {
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#address-cells = <2>;
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#size-cells = <2>;
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compatible = "simple-bus";
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interrupt-parent = <&cpm_icu>;
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ranges;
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config-space@f2000000 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "simple-bus";
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ranges = <0x0 0x0 0xf2000000 0x2000000>;
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cpm_ethernet: ethernet@0 {
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compatible = "marvell,armada-7k-pp22";
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reg = <0x0 0x100000>, <0x129000 0xb000>;
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clocks = <&cpm_clk 1 3>, <&cpm_clk 1 9>, <&cpm_clk 1 5>;
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clock-names = "pp_clk", "gop_clk", "mg_clk";
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marvell,system-controller = <&cpm_syscon0>;
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status = "disabled";
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dma-coherent;
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cpm_eth0: eth0 {
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interrupts = <ICU_GRP_NSR 39 IRQ_TYPE_LEVEL_HIGH>,
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<ICU_GRP_NSR 43 IRQ_TYPE_LEVEL_HIGH>,
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<ICU_GRP_NSR 47 IRQ_TYPE_LEVEL_HIGH>,
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<ICU_GRP_NSR 51 IRQ_TYPE_LEVEL_HIGH>,
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<ICU_GRP_NSR 55 IRQ_TYPE_LEVEL_HIGH>,
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<ICU_GRP_NSR 129 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "tx-cpu0", "tx-cpu1", "tx-cpu2",
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"tx-cpu3", "rx-shared", "link";
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port-id = <0>;
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gop-port-id = <0>;
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status = "disabled";
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};
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cpm_eth1: eth1 {
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interrupts = <ICU_GRP_NSR 40 IRQ_TYPE_LEVEL_HIGH>,
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<ICU_GRP_NSR 44 IRQ_TYPE_LEVEL_HIGH>,
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<ICU_GRP_NSR 48 IRQ_TYPE_LEVEL_HIGH>,
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<ICU_GRP_NSR 52 IRQ_TYPE_LEVEL_HIGH>,
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<ICU_GRP_NSR 56 IRQ_TYPE_LEVEL_HIGH>,
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<ICU_GRP_NSR 128 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "tx-cpu0", "tx-cpu1", "tx-cpu2",
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"tx-cpu3", "rx-shared", "link";
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port-id = <1>;
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gop-port-id = <2>;
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status = "disabled";
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};
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cpm_eth2: eth2 {
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interrupts = <ICU_GRP_NSR 41 IRQ_TYPE_LEVEL_HIGH>,
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<ICU_GRP_NSR 45 IRQ_TYPE_LEVEL_HIGH>,
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<ICU_GRP_NSR 49 IRQ_TYPE_LEVEL_HIGH>,
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<ICU_GRP_NSR 53 IRQ_TYPE_LEVEL_HIGH>,
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<ICU_GRP_NSR 57 IRQ_TYPE_LEVEL_HIGH>,
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<ICU_GRP_NSR 127 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "tx-cpu0", "tx-cpu1", "tx-cpu2",
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"tx-cpu3", "rx-shared", "link";
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port-id = <2>;
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gop-port-id = <3>;
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status = "disabled";
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};
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};
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cpm_comphy: phy@120000 {
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compatible = "marvell,comphy-cp110";
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reg = <0x120000 0x6000>;
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marvell,system-controller = <&cpm_syscon0>;
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#address-cells = <1>;
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#size-cells = <0>;
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cpm_comphy0: phy@0 {
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reg = <0>;
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#phy-cells = <1>;
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};
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cpm_comphy1: phy@1 {
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reg = <1>;
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#phy-cells = <1>;
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};
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cpm_comphy2: phy@2 {
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reg = <2>;
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#phy-cells = <1>;
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};
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cpm_comphy3: phy@3 {
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reg = <3>;
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#phy-cells = <1>;
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};
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cpm_comphy4: phy@4 {
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reg = <4>;
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#phy-cells = <1>;
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};
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cpm_comphy5: phy@5 {
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reg = <5>;
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#phy-cells = <1>;
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};
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};
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cpm_mdio: mdio@12a200 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "marvell,orion-mdio";
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reg = <0x12a200 0x10>;
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clocks = <&cpm_clk 1 9>, <&cpm_clk 1 5>;
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status = "disabled";
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};
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cpm_xmdio: mdio@12a600 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "marvell,xmdio";
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reg = <0x12a600 0x10>;
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status = "disabled";
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};
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cpm_icu: interrupt-controller@1e0000 {
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compatible = "marvell,cp110-icu";
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reg = <0x1e0000 0x10>;
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#interrupt-cells = <3>;
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interrupt-controller;
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msi-parent = <&gicp>;
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};
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cpm_rtc: rtc@284000 {
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compatible = "marvell,armada-8k-rtc";
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reg = <0x284000 0x20>, <0x284080 0x24>;
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reg-names = "rtc", "rtc-soc";
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interrupts = <ICU_GRP_NSR 77 IRQ_TYPE_LEVEL_HIGH>;
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};
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cpm_syscon0: system-controller@440000 {
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compatible = "syscon", "simple-mfd";
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reg = <0x440000 0x2000>;
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cpm_clk: clock {
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compatible = "marvell,cp110-clock";
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#clock-cells = <2>;
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};
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cpm_gpio1: gpio@100 {
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compatible = "marvell,armada-8k-gpio";
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offset = <0x100>;
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ngpios = <32>;
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gpio-controller;
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#gpio-cells = <2>;
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gpio-ranges = <&cpm_pinctrl 0 0 32>;
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interrupt-controller;
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interrupts = <ICU_GRP_NSR 86 IRQ_TYPE_LEVEL_HIGH>,
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<ICU_GRP_NSR 85 IRQ_TYPE_LEVEL_HIGH>,
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<ICU_GRP_NSR 84 IRQ_TYPE_LEVEL_HIGH>,
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<ICU_GRP_NSR 83 IRQ_TYPE_LEVEL_HIGH>;
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status = "disabled";
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};
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cpm_gpio2: gpio@140 {
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compatible = "marvell,armada-8k-gpio";
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offset = <0x140>;
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ngpios = <31>;
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gpio-controller;
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#gpio-cells = <2>;
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gpio-ranges = <&cpm_pinctrl 0 32 31>;
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interrupt-controller;
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interrupts = <ICU_GRP_NSR 82 IRQ_TYPE_LEVEL_HIGH>,
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<ICU_GRP_NSR 81 IRQ_TYPE_LEVEL_HIGH>,
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<ICU_GRP_NSR 80 IRQ_TYPE_LEVEL_HIGH>,
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<ICU_GRP_NSR 79 IRQ_TYPE_LEVEL_HIGH>;
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status = "disabled";
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};
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};
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cpm_usb3_0: usb3@500000 {
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compatible = "marvell,armada-8k-xhci",
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"generic-xhci";
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reg = <0x500000 0x4000>;
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dma-coherent;
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interrupts = <ICU_GRP_NSR 106 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cpm_clk 1 22>;
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status = "disabled";
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};
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cpm_usb3_1: usb3@510000 {
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compatible = "marvell,armada-8k-xhci",
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"generic-xhci";
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reg = <0x510000 0x4000>;
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dma-coherent;
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interrupts = <ICU_GRP_NSR 105 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cpm_clk 1 23>;
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status = "disabled";
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};
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cpm_sata0: sata@540000 {
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compatible = "marvell,armada-8k-ahci",
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"generic-ahci";
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reg = <0x540000 0x30000>;
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interrupts = <ICU_GRP_NSR 107 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cpm_clk 1 15>;
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status = "disabled";
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};
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cpm_xor0: xor@6a0000 {
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compatible = "marvell,armada-7k-xor", "marvell,xor-v2";
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reg = <0x6a0000 0x1000>,
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<0x6b0000 0x1000>;
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dma-coherent;
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msi-parent = <&gic_v2m0>;
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clocks = <&cpm_clk 1 8>;
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};
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cpm_xor1: xor@6c0000 {
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compatible = "marvell,armada-7k-xor", "marvell,xor-v2";
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reg = <0x6c0000 0x1000>,
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<0x6d0000 0x1000>;
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dma-coherent;
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msi-parent = <&gic_v2m0>;
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clocks = <&cpm_clk 1 7>;
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};
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cpm_spi0: spi@700600 {
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compatible = "marvell,armada-380-spi";
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reg = <0x700600 0x50>;
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#address-cells = <0x1>;
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#size-cells = <0x0>;
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cell-index = <1>;
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clocks = <&cpm_clk 1 21>;
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status = "disabled";
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};
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cpm_spi1: spi@700680 {
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compatible = "marvell,armada-380-spi";
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reg = <0x700680 0x50>;
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#address-cells = <1>;
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#size-cells = <0>;
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cell-index = <2>;
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clocks = <&cpm_clk 1 21>;
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status = "disabled";
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};
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cpm_i2c0: i2c@701000 {
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compatible = "marvell,mv78230-i2c";
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reg = <0x701000 0x20>;
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#address-cells = <1>;
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#size-cells = <0>;
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interrupts = <ICU_GRP_NSR 120 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cpm_clk 1 21>;
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status = "disabled";
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};
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cpm_i2c1: i2c@701100 {
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compatible = "marvell,mv78230-i2c";
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reg = <0x701100 0x20>;
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#address-cells = <1>;
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#size-cells = <0>;
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interrupts = <ICU_GRP_NSR 121 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cpm_clk 1 21>;
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status = "disabled";
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};
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cpm_nand: nand@720000 {
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/*
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* Due to the limiation of the pin available
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* this controller is only usable on the CPM
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* for A7K and on the CPS for A8K.
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*/
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compatible = "marvell,armada-8k-nand",
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"marvell,armada370-nand";
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reg = <0x720000 0x54>;
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#address-cells = <1>;
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#size-cells = <1>;
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interrupts = <ICU_GRP_NSR 115 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cpm_clk 1 2>;
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marvell,system-controller = <&cpm_syscon0>;
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status = "disabled";
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};
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cpm_trng: trng@760000 {
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compatible = "marvell,armada-8k-rng", "inside-secure,safexcel-eip76";
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reg = <0x760000 0x7d>;
|
|
interrupts = <ICU_GRP_NSR 95 IRQ_TYPE_LEVEL_HIGH>;
|
|
clocks = <&cpm_clk 1 25>;
|
|
status = "okay";
|
|
};
|
|
|
|
cpm_sdhci0: sdhci@780000 {
|
|
compatible = "marvell,armada-cp110-sdhci";
|
|
reg = <0x780000 0x300>;
|
|
interrupts = <ICU_GRP_NSR 27 IRQ_TYPE_LEVEL_HIGH>;
|
|
clock-names = "core";
|
|
clocks = <&cpm_clk 1 4>;
|
|
dma-coherent;
|
|
status = "disabled";
|
|
};
|
|
|
|
cpm_crypto: crypto@800000 {
|
|
compatible = "inside-secure,safexcel-eip197";
|
|
reg = <0x800000 0x200000>;
|
|
interrupts = <ICU_GRP_NSR 87 IRQ_TYPE_LEVEL_HIGH>,
|
|
<ICU_GRP_NSR 88 IRQ_TYPE_LEVEL_HIGH>,
|
|
<ICU_GRP_NSR 89 IRQ_TYPE_LEVEL_HIGH>,
|
|
<ICU_GRP_NSR 90 IRQ_TYPE_LEVEL_HIGH>,
|
|
<ICU_GRP_NSR 91 IRQ_TYPE_LEVEL_HIGH>,
|
|
<ICU_GRP_NSR 92 IRQ_TYPE_LEVEL_HIGH>;
|
|
interrupt-names = "mem", "ring0", "ring1",
|
|
"ring2", "ring3", "eip";
|
|
clocks = <&cpm_clk 1 26>;
|
|
dma-coherent;
|
|
};
|
|
};
|
|
|
|
cpm_pcie0: pcie@f2600000 {
|
|
compatible = "marvell,armada8k-pcie", "snps,dw-pcie";
|
|
reg = <0 0xf2600000 0 0x10000>,
|
|
<0 0xf6f00000 0 0x80000>;
|
|
reg-names = "ctrl", "config";
|
|
#address-cells = <3>;
|
|
#size-cells = <2>;
|
|
#interrupt-cells = <1>;
|
|
device_type = "pci";
|
|
dma-coherent;
|
|
msi-parent = <&gic_v2m0>;
|
|
|
|
bus-range = <0 0xff>;
|
|
ranges =
|
|
/* downstream I/O */
|
|
<0x81000000 0 0xf9000000 0 0xf9000000 0 0x10000
|
|
/* non-prefetchable memory */
|
|
0x82000000 0 0xf6000000 0 0xf6000000 0 0xf00000>;
|
|
interrupt-map-mask = <0 0 0 0>;
|
|
interrupt-map = <0 0 0 0 &cpm_icu ICU_GRP_NSR 22 IRQ_TYPE_LEVEL_HIGH>;
|
|
interrupts = <ICU_GRP_NSR 22 IRQ_TYPE_LEVEL_HIGH>;
|
|
num-lanes = <1>;
|
|
clocks = <&cpm_clk 1 13>;
|
|
status = "disabled";
|
|
};
|
|
|
|
cpm_pcie1: pcie@f2620000 {
|
|
compatible = "marvell,armada8k-pcie", "snps,dw-pcie";
|
|
reg = <0 0xf2620000 0 0x10000>,
|
|
<0 0xf7f00000 0 0x80000>;
|
|
reg-names = "ctrl", "config";
|
|
#address-cells = <3>;
|
|
#size-cells = <2>;
|
|
#interrupt-cells = <1>;
|
|
device_type = "pci";
|
|
dma-coherent;
|
|
msi-parent = <&gic_v2m0>;
|
|
|
|
bus-range = <0 0xff>;
|
|
ranges =
|
|
/* downstream I/O */
|
|
<0x81000000 0 0xf9010000 0 0xf9010000 0 0x10000
|
|
/* non-prefetchable memory */
|
|
0x82000000 0 0xf7000000 0 0xf7000000 0 0xf00000>;
|
|
interrupt-map-mask = <0 0 0 0>;
|
|
interrupt-map = <0 0 0 0 &cpm_icu ICU_GRP_NSR 24 IRQ_TYPE_LEVEL_HIGH>;
|
|
interrupts = <ICU_GRP_NSR 24 IRQ_TYPE_LEVEL_HIGH>;
|
|
|
|
num-lanes = <1>;
|
|
clocks = <&cpm_clk 1 11>;
|
|
status = "disabled";
|
|
};
|
|
|
|
cpm_pcie2: pcie@f2640000 {
|
|
compatible = "marvell,armada8k-pcie", "snps,dw-pcie";
|
|
reg = <0 0xf2640000 0 0x10000>,
|
|
<0 0xf8f00000 0 0x80000>;
|
|
reg-names = "ctrl", "config";
|
|
#address-cells = <3>;
|
|
#size-cells = <2>;
|
|
#interrupt-cells = <1>;
|
|
device_type = "pci";
|
|
dma-coherent;
|
|
msi-parent = <&gic_v2m0>;
|
|
|
|
bus-range = <0 0xff>;
|
|
ranges =
|
|
/* downstream I/O */
|
|
<0x81000000 0 0xf9020000 0 0xf9020000 0 0x10000
|
|
/* non-prefetchable memory */
|
|
0x82000000 0 0xf8000000 0 0xf8000000 0 0xf00000>;
|
|
interrupt-map-mask = <0 0 0 0>;
|
|
interrupt-map = <0 0 0 0 &cpm_icu ICU_GRP_NSR 23 IRQ_TYPE_LEVEL_HIGH>;
|
|
interrupts = <ICU_GRP_NSR 23 IRQ_TYPE_LEVEL_HIGH>;
|
|
|
|
num-lanes = <1>;
|
|
clocks = <&cpm_clk 1 12>;
|
|
status = "disabled";
|
|
};
|
|
};
|
|
};
|