mirror of
https://github.com/torvalds/linux.git
synced 2024-12-27 13:22:23 +00:00
5ad945ea58
Using the platform driver model is a good way to separate the cpuidle specific
code from the low level pm code. It allows to remove the dependency between
these two components.
The platform_device is located in the pm code and a 'set' function has been
added to set the standby function from the AT91_SOC_START initialization
function. Each SoC with a cpuidle driver will set the standby function in the
platform_data field at init time. Then pm code will register the cpuidle
platform device.
The cpuidle driver will register the platform_driver and use the device's
platform_data as a standby callback in the idle path.
The at91_pm_enter function contains a { if then else } based on cpu_is_xx
similar to what was in cpuidle. This is considered dangerous when adding a new
SoC. Like the cpuidle driver, a standby ops is defined and assigned when the
SoC init function specifies what is its standby function and reused in the
at91_pm_enter's 'case' block.
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
119 lines
3.2 KiB
C
119 lines
3.2 KiB
C
/*
|
|
* AT91 Power Management
|
|
*
|
|
* Copyright (C) 2005 David Brownell
|
|
*
|
|
* This program is free software; you can redistribute it and/or modify
|
|
* it under the terms of the GNU General Public License as published by
|
|
* the Free Software Foundation; either version 2 of the License, or
|
|
* (at your option) any later version.
|
|
*/
|
|
#ifndef __ARCH_ARM_MACH_AT91_PM
|
|
#define __ARCH_ARM_MACH_AT91_PM
|
|
|
|
#include <asm/proc-fns.h>
|
|
|
|
#include <mach/at91_ramc.h>
|
|
#include <mach/at91rm9200_sdramc.h>
|
|
|
|
extern void at91_pm_set_standby(void (*at91_standby)(void));
|
|
|
|
/*
|
|
* The AT91RM9200 goes into self-refresh mode with this command, and will
|
|
* terminate self-refresh automatically on the next SDRAM access.
|
|
*
|
|
* Self-refresh mode is exited as soon as a memory access is made, but we don't
|
|
* know for sure when that happens. However, we need to restore the low-power
|
|
* mode if it was enabled before going idle. Restoring low-power mode while
|
|
* still in self-refresh is "not recommended", but seems to work.
|
|
*/
|
|
|
|
static inline void at91rm9200_standby(void)
|
|
{
|
|
u32 lpr = at91_ramc_read(0, AT91RM9200_SDRAMC_LPR);
|
|
|
|
asm volatile(
|
|
"b 1f\n\t"
|
|
".align 5\n\t"
|
|
"1: mcr p15, 0, %0, c7, c10, 4\n\t"
|
|
" str %0, [%1, %2]\n\t"
|
|
" str %3, [%1, %4]\n\t"
|
|
" mcr p15, 0, %0, c7, c0, 4\n\t"
|
|
" str %5, [%1, %2]"
|
|
:
|
|
: "r" (0), "r" (AT91_BASE_SYS), "r" (AT91RM9200_SDRAMC_LPR),
|
|
"r" (1), "r" (AT91RM9200_SDRAMC_SRR),
|
|
"r" (lpr));
|
|
}
|
|
|
|
/* We manage both DDRAM/SDRAM controllers, we need more than one value to
|
|
* remember.
|
|
*/
|
|
static inline void at91sam9g45_standby(void)
|
|
{
|
|
/* Those two values allow us to delay self-refresh activation
|
|
* to the maximum. */
|
|
u32 lpr0, lpr1;
|
|
u32 saved_lpr0, saved_lpr1;
|
|
|
|
saved_lpr1 = at91_ramc_read(1, AT91_DDRSDRC_LPR);
|
|
lpr1 = saved_lpr1 & ~AT91_DDRSDRC_LPCB;
|
|
lpr1 |= AT91_DDRSDRC_LPCB_SELF_REFRESH;
|
|
|
|
saved_lpr0 = at91_ramc_read(0, AT91_DDRSDRC_LPR);
|
|
lpr0 = saved_lpr0 & ~AT91_DDRSDRC_LPCB;
|
|
lpr0 |= AT91_DDRSDRC_LPCB_SELF_REFRESH;
|
|
|
|
/* self-refresh mode now */
|
|
at91_ramc_write(0, AT91_DDRSDRC_LPR, lpr0);
|
|
at91_ramc_write(1, AT91_DDRSDRC_LPR, lpr1);
|
|
|
|
cpu_do_idle();
|
|
|
|
at91_ramc_write(0, AT91_DDRSDRC_LPR, saved_lpr0);
|
|
at91_ramc_write(1, AT91_DDRSDRC_LPR, saved_lpr1);
|
|
}
|
|
|
|
/* We manage both DDRAM/SDRAM controllers, we need more than one value to
|
|
* remember.
|
|
*/
|
|
static inline void at91sam9263_standby(void)
|
|
{
|
|
u32 lpr0, lpr1;
|
|
u32 saved_lpr0, saved_lpr1;
|
|
|
|
saved_lpr1 = at91_ramc_read(1, AT91_SDRAMC_LPR);
|
|
lpr1 = saved_lpr1 & ~AT91_SDRAMC_LPCB;
|
|
lpr1 |= AT91_SDRAMC_LPCB_SELF_REFRESH;
|
|
|
|
saved_lpr0 = at91_ramc_read(0, AT91_SDRAMC_LPR);
|
|
lpr0 = saved_lpr0 & ~AT91_SDRAMC_LPCB;
|
|
lpr0 |= AT91_SDRAMC_LPCB_SELF_REFRESH;
|
|
|
|
/* self-refresh mode now */
|
|
at91_ramc_write(0, AT91_SDRAMC_LPR, lpr0);
|
|
at91_ramc_write(1, AT91_SDRAMC_LPR, lpr1);
|
|
|
|
cpu_do_idle();
|
|
|
|
at91_ramc_write(0, AT91_SDRAMC_LPR, saved_lpr0);
|
|
at91_ramc_write(1, AT91_SDRAMC_LPR, saved_lpr1);
|
|
}
|
|
|
|
static inline void at91sam9_standby(void)
|
|
{
|
|
u32 saved_lpr, lpr;
|
|
|
|
saved_lpr = at91_ramc_read(0, AT91_SDRAMC_LPR);
|
|
|
|
lpr = saved_lpr & ~AT91_SDRAMC_LPCB;
|
|
at91_ramc_write(0, AT91_SDRAMC_LPR, lpr |
|
|
AT91_SDRAMC_LPCB_SELF_REFRESH);
|
|
|
|
cpu_do_idle();
|
|
|
|
at91_ramc_write(0, AT91_SDRAMC_LPR, saved_lpr);
|
|
}
|
|
|
|
#endif
|