Daniel Vetter 5ab140a4ac drm/i915: align vlv forcewake with common lore ... For some odd reasons, the vlv forcewake code is rather different from all other platforms, with no clear justification. Adjust things: - Don't check whether the gt is awake already (and bail out early), we need to grab a forcewake anyway. Otherwise the chip might go to sleep too early. And this would also screw up our forcewake accounting. - Like all other platforms, check whether the gt has cleared the forcewake bit in the _ACK register before setting it again. - Use _MASKED_BIT_ENABLE/DISABLE macros - Only use bit0 of the forcewake reg, not all 16 bits. - check the gtfifodb reg like on all other platforms in _put. - Drop the POSTING_READs for consistency. v2: Failure to git add ... again. v3: Fixup the spelling fail a bit. Tested-by: "Purushothaman, Vijay A" <vijay.a.purushothaman@intel.com> Tested-by: "Widawsky, Benjamin" <benjamin.widawsky@intel.com> Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>		2012-09-03 10:09:28 +02:00
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drm	drm/i915: align vlv forcewake with common lore	2012-09-03 10:09:28 +02:00
stub	i915: select VIDEO_OUTPUT_CONTROL for ACPI_VIDEO	2011-04-13 09:10:25 +10:00
vga	vga_switcheroo: Don't require handler init callback	2012-08-17 17:34:41 -04:00
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