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5a148af669
Pull powerpc update from Benjamin Herrenschmidt: "The main highlights this time around are: - A pile of addition POWER8 bits and nits, such as updated performance counter support (Michael Ellerman), new branch history buffer support (Anshuman Khandual), base support for the new PCI host bridge when not using the hypervisor (Gavin Shan) and other random related bits and fixes from various contributors. - Some rework of our page table format by Aneesh Kumar which fixes a thing or two and paves the way for THP support. THP itself will not make it this time around however. - More Freescale updates, including Altivec support on the new e6500 cores, new PCI controller support, and a pile of new boards support and updates. - The usual batch of trivial cleanups & fixes" * 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc: (156 commits) powerpc: Fix build error for book3e powerpc: Context switch the new EBB SPRs powerpc: Turn on the EBB H/FSCR bits powerpc: Replace CPU_FTR_BCTAR with CPU_FTR_ARCH_207S powerpc: Setup BHRB instructions facility in HFSCR for POWER8 powerpc: Fix interrupt range check on debug exception powerpc: Update tlbie/tlbiel as per ISA doc powerpc: Print page size info during boot powerpc: print both base and actual page size on hash failure powerpc: Fix hpte_decode to use the correct decoding for page sizes powerpc: Decode the pte-lp-encoding bits correctly. powerpc: Use encode avpn where we need only avpn values powerpc: Reduce PTE table memory wastage powerpc: Move the pte free routines from common header powerpc: Reduce the PTE_INDEX_SIZE powerpc: Switch 16GB and 16MB explicit hugepages to a different page table format powerpc: New hugepage directory format powerpc: Don't truncate pgd_index wrongly powerpc: Don't hard code the size of pte page powerpc: Save DAR and DSISR in pt_regs on MCE ...
301 lines
8.3 KiB
C
301 lines
8.3 KiB
C
/*
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* PowerPC version
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* Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
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*
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* Modifications by Paul Mackerras (PowerMac) (paulus@cs.anu.edu.au)
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* and Cort Dougan (PReP) (cort@cs.nmt.edu)
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* Copyright (C) 1996 Paul Mackerras
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*
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* Derived from "arch/i386/mm/init.c"
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* Copyright (C) 1991, 1992, 1993, 1994 Linus Torvalds
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*
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* Dave Engebretsen <engebret@us.ibm.com>
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* Rework for PPC64 port.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*
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*/
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#undef DEBUG
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#include <linux/signal.h>
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#include <linux/sched.h>
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#include <linux/kernel.h>
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#include <linux/errno.h>
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#include <linux/string.h>
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#include <linux/types.h>
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#include <linux/mman.h>
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#include <linux/mm.h>
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#include <linux/swap.h>
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#include <linux/stddef.h>
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#include <linux/vmalloc.h>
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#include <linux/init.h>
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#include <linux/delay.h>
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#include <linux/bootmem.h>
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#include <linux/highmem.h>
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#include <linux/idr.h>
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#include <linux/nodemask.h>
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#include <linux/module.h>
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#include <linux/poison.h>
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#include <linux/memblock.h>
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#include <linux/hugetlb.h>
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#include <linux/slab.h>
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#include <asm/pgalloc.h>
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#include <asm/page.h>
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#include <asm/prom.h>
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#include <asm/rtas.h>
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#include <asm/io.h>
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#include <asm/mmu_context.h>
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#include <asm/pgtable.h>
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#include <asm/mmu.h>
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#include <asm/uaccess.h>
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#include <asm/smp.h>
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#include <asm/machdep.h>
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#include <asm/tlb.h>
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#include <asm/eeh.h>
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#include <asm/processor.h>
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#include <asm/mmzone.h>
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#include <asm/cputable.h>
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#include <asm/sections.h>
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#include <asm/iommu.h>
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#include <asm/vdso.h>
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#include "mmu_decl.h"
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#ifdef CONFIG_PPC_STD_MMU_64
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#if PGTABLE_RANGE > USER_VSID_RANGE
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#warning Limited user VSID range means pagetable space is wasted
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#endif
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#if (TASK_SIZE_USER64 < PGTABLE_RANGE) && (TASK_SIZE_USER64 < USER_VSID_RANGE)
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#warning TASK_SIZE is smaller than it needs to be.
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#endif
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#endif /* CONFIG_PPC_STD_MMU_64 */
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phys_addr_t memstart_addr = ~0;
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EXPORT_SYMBOL_GPL(memstart_addr);
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phys_addr_t kernstart_addr;
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EXPORT_SYMBOL_GPL(kernstart_addr);
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static void pgd_ctor(void *addr)
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{
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memset(addr, 0, PGD_TABLE_SIZE);
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}
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static void pmd_ctor(void *addr)
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{
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memset(addr, 0, PMD_TABLE_SIZE);
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}
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struct kmem_cache *pgtable_cache[MAX_PGTABLE_INDEX_SIZE];
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/*
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* Create a kmem_cache() for pagetables. This is not used for PTE
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* pages - they're linked to struct page, come from the normal free
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* pages pool and have a different entry size (see real_pte_t) to
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* everything else. Caches created by this function are used for all
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* the higher level pagetables, and for hugepage pagetables.
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*/
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void pgtable_cache_add(unsigned shift, void (*ctor)(void *))
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{
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char *name;
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unsigned long table_size = sizeof(void *) << shift;
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unsigned long align = table_size;
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/* When batching pgtable pointers for RCU freeing, we store
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* the index size in the low bits. Table alignment must be
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* big enough to fit it.
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*
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* Likewise, hugeapge pagetable pointers contain a (different)
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* shift value in the low bits. All tables must be aligned so
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* as to leave enough 0 bits in the address to contain it. */
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unsigned long minalign = max(MAX_PGTABLE_INDEX_SIZE + 1,
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HUGEPD_SHIFT_MASK + 1);
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struct kmem_cache *new;
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/* It would be nice if this was a BUILD_BUG_ON(), but at the
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* moment, gcc doesn't seem to recognize is_power_of_2 as a
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* constant expression, so so much for that. */
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BUG_ON(!is_power_of_2(minalign));
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BUG_ON((shift < 1) || (shift > MAX_PGTABLE_INDEX_SIZE));
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if (PGT_CACHE(shift))
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return; /* Already have a cache of this size */
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align = max_t(unsigned long, align, minalign);
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name = kasprintf(GFP_KERNEL, "pgtable-2^%d", shift);
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new = kmem_cache_create(name, table_size, align, 0, ctor);
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pgtable_cache[shift - 1] = new;
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pr_debug("Allocated pgtable cache for order %d\n", shift);
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}
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void pgtable_cache_init(void)
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{
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pgtable_cache_add(PGD_INDEX_SIZE, pgd_ctor);
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pgtable_cache_add(PMD_INDEX_SIZE, pmd_ctor);
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if (!PGT_CACHE(PGD_INDEX_SIZE) || !PGT_CACHE(PMD_INDEX_SIZE))
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panic("Couldn't allocate pgtable caches");
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/* In all current configs, when the PUD index exists it's the
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* same size as either the pgd or pmd index. Verify that the
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* initialization above has also created a PUD cache. This
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* will need re-examiniation if we add new possibilities for
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* the pagetable layout. */
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BUG_ON(PUD_INDEX_SIZE && !PGT_CACHE(PUD_INDEX_SIZE));
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}
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#ifdef CONFIG_SPARSEMEM_VMEMMAP
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/*
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* Given an address within the vmemmap, determine the pfn of the page that
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* represents the start of the section it is within. Note that we have to
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* do this by hand as the proffered address may not be correctly aligned.
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* Subtraction of non-aligned pointers produces undefined results.
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*/
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static unsigned long __meminit vmemmap_section_start(unsigned long page)
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{
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unsigned long offset = page - ((unsigned long)(vmemmap));
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/* Return the pfn of the start of the section. */
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return (offset / sizeof(struct page)) & PAGE_SECTION_MASK;
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}
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/*
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* Check if this vmemmap page is already initialised. If any section
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* which overlaps this vmemmap page is initialised then this page is
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* initialised already.
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*/
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static int __meminit vmemmap_populated(unsigned long start, int page_size)
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{
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unsigned long end = start + page_size;
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for (; start < end; start += (PAGES_PER_SECTION * sizeof(struct page)))
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if (pfn_valid(vmemmap_section_start(start)))
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return 1;
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return 0;
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}
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/* On hash-based CPUs, the vmemmap is bolted in the hash table.
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*
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* On Book3E CPUs, the vmemmap is currently mapped in the top half of
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* the vmalloc space using normal page tables, though the size of
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* pages encoded in the PTEs can be different
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*/
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#ifdef CONFIG_PPC_BOOK3E
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static void __meminit vmemmap_create_mapping(unsigned long start,
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unsigned long page_size,
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unsigned long phys)
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{
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/* Create a PTE encoding without page size */
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unsigned long i, flags = _PAGE_PRESENT | _PAGE_ACCESSED |
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_PAGE_KERNEL_RW;
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/* PTEs only contain page size encodings up to 32M */
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BUG_ON(mmu_psize_defs[mmu_vmemmap_psize].enc > 0xf);
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/* Encode the size in the PTE */
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flags |= mmu_psize_defs[mmu_vmemmap_psize].enc << 8;
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/* For each PTE for that area, map things. Note that we don't
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* increment phys because all PTEs are of the large size and
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* thus must have the low bits clear
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*/
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for (i = 0; i < page_size; i += PAGE_SIZE)
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BUG_ON(map_kernel_page(start + i, phys, flags));
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}
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#else /* CONFIG_PPC_BOOK3E */
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static void __meminit vmemmap_create_mapping(unsigned long start,
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unsigned long page_size,
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unsigned long phys)
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{
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int mapped = htab_bolt_mapping(start, start + page_size, phys,
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PAGE_KERNEL, mmu_vmemmap_psize,
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mmu_kernel_ssize);
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BUG_ON(mapped < 0);
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}
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#endif /* CONFIG_PPC_BOOK3E */
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struct vmemmap_backing *vmemmap_list;
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static __meminit struct vmemmap_backing * vmemmap_list_alloc(int node)
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{
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static struct vmemmap_backing *next;
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static int num_left;
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/* allocate a page when required and hand out chunks */
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if (!next || !num_left) {
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next = vmemmap_alloc_block(PAGE_SIZE, node);
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if (unlikely(!next)) {
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WARN_ON(1);
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return NULL;
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}
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num_left = PAGE_SIZE / sizeof(struct vmemmap_backing);
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}
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num_left--;
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return next++;
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}
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static __meminit void vmemmap_list_populate(unsigned long phys,
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unsigned long start,
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int node)
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{
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struct vmemmap_backing *vmem_back;
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vmem_back = vmemmap_list_alloc(node);
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if (unlikely(!vmem_back)) {
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WARN_ON(1);
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return;
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}
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vmem_back->phys = phys;
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vmem_back->virt_addr = start;
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vmem_back->list = vmemmap_list;
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vmemmap_list = vmem_back;
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}
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int __meminit vmemmap_populate(unsigned long start, unsigned long end, int node)
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{
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unsigned long page_size = 1 << mmu_psize_defs[mmu_vmemmap_psize].shift;
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/* Align to the page size of the linear mapping. */
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start = _ALIGN_DOWN(start, page_size);
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pr_debug("vmemmap_populate %lx..%lx, node %d\n", start, end, node);
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for (; start < end; start += page_size) {
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void *p;
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if (vmemmap_populated(start, page_size))
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continue;
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p = vmemmap_alloc_block(page_size, node);
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if (!p)
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return -ENOMEM;
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vmemmap_list_populate(__pa(p), start, node);
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pr_debug(" * %016lx..%016lx allocated at %p\n",
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start, start + page_size, p);
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vmemmap_create_mapping(start, page_size, __pa(p));
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}
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return 0;
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}
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void vmemmap_free(unsigned long start, unsigned long end)
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{
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}
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#endif /* CONFIG_SPARSEMEM_VMEMMAP */
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