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percpu.h is included by sched.h and module.h and thus ends up being included when building most .c files. percpu.h includes slab.h which in turn includes gfp.h making everything defined by the two files universally available and complicating inclusion dependencies. percpu.h -> slab.h dependency is about to be removed. Prepare for this change by updating users of gfp and slab facilities include those headers directly instead of assuming availability. As this conversion needs to touch large number of source files, the following script is used as the basis of conversion. http://userweb.kernel.org/~tj/misc/slabh-sweep.py The script does the followings. * Scan files for gfp and slab usages and update includes such that only the necessary includes are there. ie. if only gfp is used, gfp.h, if slab is used, slab.h. * When the script inserts a new include, it looks at the include blocks and try to put the new include such that its order conforms to its surrounding. It's put in the include block which contains core kernel includes, in the same order that the rest are ordered - alphabetical, Christmas tree, rev-Xmas-tree or at the end if there doesn't seem to be any matching order. * If the script can't find a place to put a new include (mostly because the file doesn't have fitting include block), it prints out an error message indicating which .h file needs to be added to the file. The conversion was done in the following steps. 1. The initial automatic conversion of all .c files updated slightly over 4000 files, deleting around 700 includes and adding ~480 gfp.h and ~3000 slab.h inclusions. The script emitted errors for ~400 files. 2. Each error was manually checked. Some didn't need the inclusion, some needed manual addition while adding it to implementation .h or embedding .c file was more appropriate for others. This step added inclusions to around 150 files. 3. The script was run again and the output was compared to the edits from #2 to make sure no file was left behind. 4. Several build tests were done and a couple of problems were fixed. e.g. lib/decompress_*.c used malloc/free() wrappers around slab APIs requiring slab.h to be added manually. 5. The script was run on all .h files but without automatically editing them as sprinkling gfp.h and slab.h inclusions around .h files could easily lead to inclusion dependency hell. Most gfp.h inclusion directives were ignored as stuff from gfp.h was usually wildly available and often used in preprocessor macros. Each slab.h inclusion directive was examined and added manually as necessary. 6. percpu.h was updated not to include slab.h. 7. Build test were done on the following configurations and failures were fixed. CONFIG_GCOV_KERNEL was turned off for all tests (as my distributed build env didn't work with gcov compiles) and a few more options had to be turned off depending on archs to make things build (like ipr on powerpc/64 which failed due to missing writeq). * x86 and x86_64 UP and SMP allmodconfig and a custom test config. * powerpc and powerpc64 SMP allmodconfig * sparc and sparc64 SMP allmodconfig * ia64 SMP allmodconfig * s390 SMP allmodconfig * alpha SMP allmodconfig * um on x86_64 SMP allmodconfig 8. percpu.h modifications were reverted so that it could be applied as a separate patch and serve as bisection point. Given the fact that I had only a couple of failures from tests on step 6, I'm fairly confident about the coverage of this conversion patch. If there is a breakage, it's likely to be something in one of the arch headers which should be easily discoverable easily on most builds of the specific arch. Signed-off-by: Tejun Heo <tj@kernel.org> Guess-its-ok-by: Christoph Lameter <cl@linux-foundation.org> Cc: Ingo Molnar <mingo@redhat.com> Cc: Lee Schermerhorn <Lee.Schermerhorn@hp.com>
704 lines
14 KiB
C
704 lines
14 KiB
C
/*!***************************************************************************
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*!
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*! FILE NAME : i2c.c
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*!
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*! DESCRIPTION: implements an interface for IIC/I2C, both directly from other
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*! kernel modules (i2c_writereg/readreg) and from userspace using
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*! ioctl()'s
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*!
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*! (C) Copyright 1999-2007 Axis Communications AB, LUND, SWEDEN
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*!
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*!***************************************************************************/
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/****************** INCLUDE FILES SECTION ***********************************/
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#include <linux/module.h>
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#include <linux/sched.h>
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#include <linux/smp_lock.h>
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#include <linux/errno.h>
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#include <linux/kernel.h>
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#include <linux/fs.h>
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#include <linux/string.h>
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#include <linux/init.h>
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#include <asm/etraxi2c.h>
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#include <asm/system.h>
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#include <arch/svinto.h>
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#include <asm/io.h>
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#include <asm/delay.h>
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#include <arch/io_interface_mux.h>
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#include "i2c.h"
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/****************** I2C DEFINITION SECTION *************************/
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#define D(x)
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#define I2C_MAJOR 123 /* LOCAL/EXPERIMENTAL */
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static const char i2c_name[] = "i2c";
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#define CLOCK_LOW_TIME 8
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#define CLOCK_HIGH_TIME 8
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#define START_CONDITION_HOLD_TIME 8
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#define STOP_CONDITION_HOLD_TIME 8
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#define ENABLE_OUTPUT 0x01
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#define ENABLE_INPUT 0x00
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#define I2C_CLOCK_HIGH 1
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#define I2C_CLOCK_LOW 0
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#define I2C_DATA_HIGH 1
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#define I2C_DATA_LOW 0
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#ifdef CONFIG_ETRAX_I2C_USES_PB_NOT_PB_I2C
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/* Use PB and not PB_I2C */
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#ifndef CONFIG_ETRAX_I2C_DATA_PORT
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#define CONFIG_ETRAX_I2C_DATA_PORT 0
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#endif
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#ifndef CONFIG_ETRAX_I2C_CLK_PORT
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#define CONFIG_ETRAX_I2C_CLK_PORT 1
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#endif
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#define SDABIT CONFIG_ETRAX_I2C_DATA_PORT
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#define SCLBIT CONFIG_ETRAX_I2C_CLK_PORT
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#define i2c_enable()
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#define i2c_disable()
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/* enable or disable output-enable, to select output or input on the i2c bus */
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#define i2c_dir_out() \
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REG_SHADOW_SET(R_PORT_PB_DIR, port_pb_dir_shadow, SDABIT, 1)
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#define i2c_dir_in() \
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REG_SHADOW_SET(R_PORT_PB_DIR, port_pb_dir_shadow, SDABIT, 0)
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/* control the i2c clock and data signals */
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#define i2c_clk(x) \
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REG_SHADOW_SET(R_PORT_PB_DATA, port_pb_data_shadow, SCLBIT, x)
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#define i2c_data(x) \
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REG_SHADOW_SET(R_PORT_PB_DATA, port_pb_data_shadow, SDABIT, x)
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/* read a bit from the i2c interface */
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#define i2c_getbit() (((*R_PORT_PB_READ & (1 << SDABIT))) >> SDABIT)
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#else
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/* enable or disable the i2c interface */
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#define i2c_enable() *R_PORT_PB_I2C = (port_pb_i2c_shadow |= IO_MASK(R_PORT_PB_I2C, i2c_en))
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#define i2c_disable() *R_PORT_PB_I2C = (port_pb_i2c_shadow &= ~IO_MASK(R_PORT_PB_I2C, i2c_en))
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/* enable or disable output-enable, to select output or input on the i2c bus */
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#define i2c_dir_out() \
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*R_PORT_PB_I2C = (port_pb_i2c_shadow &= ~IO_MASK(R_PORT_PB_I2C, i2c_oe_)); \
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REG_SHADOW_SET(R_PORT_PB_DIR, port_pb_dir_shadow, 0, 1);
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#define i2c_dir_in() \
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*R_PORT_PB_I2C = (port_pb_i2c_shadow |= IO_MASK(R_PORT_PB_I2C, i2c_oe_)); \
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REG_SHADOW_SET(R_PORT_PB_DIR, port_pb_dir_shadow, 0, 0);
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/* control the i2c clock and data signals */
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#define i2c_clk(x) \
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*R_PORT_PB_I2C = (port_pb_i2c_shadow = (port_pb_i2c_shadow & \
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~IO_MASK(R_PORT_PB_I2C, i2c_clk)) | IO_FIELD(R_PORT_PB_I2C, i2c_clk, (x))); \
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REG_SHADOW_SET(R_PORT_PB_DATA, port_pb_data_shadow, 1, x);
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#define i2c_data(x) \
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*R_PORT_PB_I2C = (port_pb_i2c_shadow = (port_pb_i2c_shadow & \
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~IO_MASK(R_PORT_PB_I2C, i2c_d)) | IO_FIELD(R_PORT_PB_I2C, i2c_d, (x))); \
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REG_SHADOW_SET(R_PORT_PB_DATA, port_pb_data_shadow, 0, x);
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/* read a bit from the i2c interface */
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#define i2c_getbit() (*R_PORT_PB_READ & 0x1)
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#endif
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/* use the kernels delay routine */
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#define i2c_delay(usecs) udelay(usecs)
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static DEFINE_SPINLOCK(i2c_lock); /* Protect directions etc */
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/****************** FUNCTION DEFINITION SECTION *************************/
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/* generate i2c start condition */
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void
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i2c_start(void)
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{
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/*
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* SCL=1 SDA=1
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*/
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i2c_dir_out();
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i2c_delay(CLOCK_HIGH_TIME/6);
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i2c_data(I2C_DATA_HIGH);
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i2c_clk(I2C_CLOCK_HIGH);
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i2c_delay(CLOCK_HIGH_TIME);
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/*
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* SCL=1 SDA=0
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*/
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i2c_data(I2C_DATA_LOW);
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i2c_delay(START_CONDITION_HOLD_TIME);
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/*
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* SCL=0 SDA=0
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*/
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i2c_clk(I2C_CLOCK_LOW);
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i2c_delay(CLOCK_LOW_TIME);
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}
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/* generate i2c stop condition */
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void
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i2c_stop(void)
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{
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i2c_dir_out();
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/*
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* SCL=0 SDA=0
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*/
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i2c_clk(I2C_CLOCK_LOW);
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i2c_data(I2C_DATA_LOW);
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i2c_delay(CLOCK_LOW_TIME*2);
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/*
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* SCL=1 SDA=0
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*/
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i2c_clk(I2C_CLOCK_HIGH);
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i2c_delay(CLOCK_HIGH_TIME*2);
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/*
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* SCL=1 SDA=1
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*/
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i2c_data(I2C_DATA_HIGH);
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i2c_delay(STOP_CONDITION_HOLD_TIME);
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i2c_dir_in();
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}
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/* write a byte to the i2c interface */
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void
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i2c_outbyte(unsigned char x)
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{
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int i;
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i2c_dir_out();
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for (i = 0; i < 8; i++) {
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if (x & 0x80) {
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i2c_data(I2C_DATA_HIGH);
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} else {
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i2c_data(I2C_DATA_LOW);
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}
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i2c_delay(CLOCK_LOW_TIME/2);
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i2c_clk(I2C_CLOCK_HIGH);
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i2c_delay(CLOCK_HIGH_TIME);
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i2c_clk(I2C_CLOCK_LOW);
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i2c_delay(CLOCK_LOW_TIME/2);
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x <<= 1;
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}
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i2c_data(I2C_DATA_LOW);
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i2c_delay(CLOCK_LOW_TIME/2);
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/*
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* enable input
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*/
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i2c_dir_in();
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}
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/* read a byte from the i2c interface */
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unsigned char
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i2c_inbyte(void)
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{
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unsigned char aBitByte = 0;
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int i;
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/* Switch off I2C to get bit */
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i2c_disable();
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i2c_dir_in();
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i2c_delay(CLOCK_HIGH_TIME/2);
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/* Get bit */
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aBitByte |= i2c_getbit();
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/* Enable I2C */
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i2c_enable();
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i2c_delay(CLOCK_LOW_TIME/2);
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for (i = 1; i < 8; i++) {
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aBitByte <<= 1;
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/* Clock pulse */
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i2c_clk(I2C_CLOCK_HIGH);
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i2c_delay(CLOCK_HIGH_TIME);
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i2c_clk(I2C_CLOCK_LOW);
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i2c_delay(CLOCK_LOW_TIME);
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/* Switch off I2C to get bit */
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i2c_disable();
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i2c_dir_in();
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i2c_delay(CLOCK_HIGH_TIME/2);
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/* Get bit */
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aBitByte |= i2c_getbit();
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/* Enable I2C */
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i2c_enable();
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i2c_delay(CLOCK_LOW_TIME/2);
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}
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i2c_clk(I2C_CLOCK_HIGH);
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i2c_delay(CLOCK_HIGH_TIME);
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/*
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* we leave the clock low, getbyte is usually followed
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* by sendack/nack, they assume the clock to be low
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*/
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i2c_clk(I2C_CLOCK_LOW);
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return aBitByte;
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}
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/*#---------------------------------------------------------------------------
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*#
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*# FUNCTION NAME: i2c_getack
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*#
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*# DESCRIPTION : checks if ack was received from ic2
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*#
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*#--------------------------------------------------------------------------*/
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int
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i2c_getack(void)
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{
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int ack = 1;
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/*
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* enable output
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*/
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i2c_dir_out();
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/*
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* Release data bus by setting
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* data high
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*/
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i2c_data(I2C_DATA_HIGH);
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/*
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* enable input
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*/
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i2c_dir_in();
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i2c_delay(CLOCK_HIGH_TIME/4);
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/*
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* generate ACK clock pulse
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*/
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i2c_clk(I2C_CLOCK_HIGH);
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/*
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* Use PORT PB instead of I2C
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* for input. (I2C not working)
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*/
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i2c_clk(1);
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i2c_data(1);
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/*
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* switch off I2C
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*/
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i2c_data(1);
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i2c_disable();
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i2c_dir_in();
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/*
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* now wait for ack
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*/
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i2c_delay(CLOCK_HIGH_TIME/2);
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/*
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* check for ack
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*/
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if(i2c_getbit())
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ack = 0;
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i2c_delay(CLOCK_HIGH_TIME/2);
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if(!ack){
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if(!i2c_getbit()) /* receiver pulld SDA low */
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ack = 1;
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i2c_delay(CLOCK_HIGH_TIME/2);
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}
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/*
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* our clock is high now, make sure data is low
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* before we enable our output. If we keep data high
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* and enable output, we would generate a stop condition.
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*/
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i2c_data(I2C_DATA_LOW);
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/*
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* end clock pulse
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*/
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i2c_enable();
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i2c_dir_out();
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i2c_clk(I2C_CLOCK_LOW);
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i2c_delay(CLOCK_HIGH_TIME/4);
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/*
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* enable output
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*/
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i2c_dir_out();
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/*
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* remove ACK clock pulse
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*/
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i2c_data(I2C_DATA_HIGH);
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i2c_delay(CLOCK_LOW_TIME/2);
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return ack;
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}
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/*#---------------------------------------------------------------------------
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*#
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*# FUNCTION NAME: I2C::sendAck
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*#
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*# DESCRIPTION : Send ACK on received data
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*#
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*#--------------------------------------------------------------------------*/
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void
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i2c_sendack(void)
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{
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/*
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* enable output
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*/
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i2c_delay(CLOCK_LOW_TIME);
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i2c_dir_out();
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/*
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* set ack pulse high
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*/
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i2c_data(I2C_DATA_LOW);
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/*
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* generate clock pulse
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*/
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i2c_delay(CLOCK_HIGH_TIME/6);
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i2c_clk(I2C_CLOCK_HIGH);
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i2c_delay(CLOCK_HIGH_TIME);
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i2c_clk(I2C_CLOCK_LOW);
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i2c_delay(CLOCK_LOW_TIME/6);
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/*
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* reset data out
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*/
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i2c_data(I2C_DATA_HIGH);
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i2c_delay(CLOCK_LOW_TIME);
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i2c_dir_in();
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}
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/*#---------------------------------------------------------------------------
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*#
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*# FUNCTION NAME: i2c_sendnack
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*#
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*# DESCRIPTION : Sends NACK on received data
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*#
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*#--------------------------------------------------------------------------*/
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void
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i2c_sendnack(void)
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{
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/*
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* enable output
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*/
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i2c_delay(CLOCK_LOW_TIME);
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i2c_dir_out();
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/*
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* set data high
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*/
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i2c_data(I2C_DATA_HIGH);
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/*
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* generate clock pulse
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*/
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i2c_delay(CLOCK_HIGH_TIME/6);
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i2c_clk(I2C_CLOCK_HIGH);
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i2c_delay(CLOCK_HIGH_TIME);
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i2c_clk(I2C_CLOCK_LOW);
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i2c_delay(CLOCK_LOW_TIME);
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i2c_dir_in();
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}
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/*#---------------------------------------------------------------------------
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*#
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*# FUNCTION NAME: i2c_writereg
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*#
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*# DESCRIPTION : Writes a value to an I2C device
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*#
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*#--------------------------------------------------------------------------*/
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int
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i2c_writereg(unsigned char theSlave, unsigned char theReg,
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unsigned char theValue)
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{
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int error, cntr = 3;
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unsigned long flags;
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spin_lock(&i2c_lock);
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do {
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error = 0;
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/*
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* we don't like to be interrupted
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*/
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local_irq_save(flags);
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i2c_start();
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/*
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* send slave address
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*/
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i2c_outbyte((theSlave & 0xfe));
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/*
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* wait for ack
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*/
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if(!i2c_getack())
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error = 1;
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/*
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* now select register
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*/
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i2c_dir_out();
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i2c_outbyte(theReg);
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/*
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* now it's time to wait for ack
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*/
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if(!i2c_getack())
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error |= 2;
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/*
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* send register register data
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*/
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i2c_outbyte(theValue);
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/*
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* now it's time to wait for ack
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*/
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if(!i2c_getack())
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error |= 4;
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/*
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* end byte stream
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*/
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i2c_stop();
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/*
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* enable interrupt again
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*/
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local_irq_restore(flags);
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} while(error && cntr--);
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i2c_delay(CLOCK_LOW_TIME);
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spin_unlock(&i2c_lock);
|
|
|
|
return -error;
|
|
}
|
|
|
|
/*#---------------------------------------------------------------------------
|
|
*#
|
|
*# FUNCTION NAME: i2c_readreg
|
|
*#
|
|
*# DESCRIPTION : Reads a value from the decoder registers.
|
|
*#
|
|
*#--------------------------------------------------------------------------*/
|
|
unsigned char
|
|
i2c_readreg(unsigned char theSlave, unsigned char theReg)
|
|
{
|
|
unsigned char b = 0;
|
|
int error, cntr = 3;
|
|
unsigned long flags;
|
|
|
|
spin_lock(&i2c_lock);
|
|
|
|
do {
|
|
error = 0;
|
|
/*
|
|
* we don't like to be interrupted
|
|
*/
|
|
local_irq_save(flags);
|
|
/*
|
|
* generate start condition
|
|
*/
|
|
i2c_start();
|
|
|
|
/*
|
|
* send slave address
|
|
*/
|
|
i2c_outbyte((theSlave & 0xfe));
|
|
/*
|
|
* wait for ack
|
|
*/
|
|
if(!i2c_getack())
|
|
error = 1;
|
|
/*
|
|
* now select register
|
|
*/
|
|
i2c_dir_out();
|
|
i2c_outbyte(theReg);
|
|
/*
|
|
* now it's time to wait for ack
|
|
*/
|
|
if(!i2c_getack())
|
|
error = 1;
|
|
/*
|
|
* repeat start condition
|
|
*/
|
|
i2c_delay(CLOCK_LOW_TIME);
|
|
i2c_start();
|
|
/*
|
|
* send slave address
|
|
*/
|
|
i2c_outbyte(theSlave | 0x01);
|
|
/*
|
|
* wait for ack
|
|
*/
|
|
if(!i2c_getack())
|
|
error = 1;
|
|
/*
|
|
* fetch register
|
|
*/
|
|
b = i2c_inbyte();
|
|
/*
|
|
* last received byte needs to be nacked
|
|
* instead of acked
|
|
*/
|
|
i2c_sendnack();
|
|
/*
|
|
* end sequence
|
|
*/
|
|
i2c_stop();
|
|
/*
|
|
* enable interrupt again
|
|
*/
|
|
local_irq_restore(flags);
|
|
|
|
} while(error && cntr--);
|
|
|
|
spin_unlock(&i2c_lock);
|
|
|
|
return b;
|
|
}
|
|
|
|
static int
|
|
i2c_open(struct inode *inode, struct file *filp)
|
|
{
|
|
cycle_kernel_lock();
|
|
return 0;
|
|
}
|
|
|
|
static int
|
|
i2c_release(struct inode *inode, struct file *filp)
|
|
{
|
|
return 0;
|
|
}
|
|
|
|
/* Main device API. ioctl's to write or read to/from i2c registers.
|
|
*/
|
|
|
|
static int
|
|
i2c_ioctl(struct inode *inode, struct file *file,
|
|
unsigned int cmd, unsigned long arg)
|
|
{
|
|
if(_IOC_TYPE(cmd) != ETRAXI2C_IOCTYPE) {
|
|
return -EINVAL;
|
|
}
|
|
|
|
switch (_IOC_NR(cmd)) {
|
|
case I2C_WRITEREG:
|
|
/* write to an i2c slave */
|
|
D(printk("i2cw %d %d %d\n",
|
|
I2C_ARGSLAVE(arg),
|
|
I2C_ARGREG(arg),
|
|
I2C_ARGVALUE(arg)));
|
|
|
|
return i2c_writereg(I2C_ARGSLAVE(arg),
|
|
I2C_ARGREG(arg),
|
|
I2C_ARGVALUE(arg));
|
|
case I2C_READREG:
|
|
{
|
|
unsigned char val;
|
|
/* read from an i2c slave */
|
|
D(printk("i2cr %d %d ",
|
|
I2C_ARGSLAVE(arg),
|
|
I2C_ARGREG(arg)));
|
|
val = i2c_readreg(I2C_ARGSLAVE(arg), I2C_ARGREG(arg));
|
|
D(printk("= %d\n", val));
|
|
return val;
|
|
}
|
|
default:
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static const struct file_operations i2c_fops = {
|
|
.owner = THIS_MODULE,
|
|
.ioctl = i2c_ioctl,
|
|
.open = i2c_open,
|
|
.release = i2c_release,
|
|
};
|
|
|
|
int __init
|
|
i2c_init(void)
|
|
{
|
|
static int res = 0;
|
|
static int first = 1;
|
|
|
|
if (!first) {
|
|
return res;
|
|
}
|
|
first = 0;
|
|
|
|
/* Setup and enable the Port B I2C interface */
|
|
|
|
#ifndef CONFIG_ETRAX_I2C_USES_PB_NOT_PB_I2C
|
|
if ((res = cris_request_io_interface(if_i2c, "I2C"))) {
|
|
printk(KERN_CRIT "i2c_init: Failed to get IO interface\n");
|
|
return res;
|
|
}
|
|
|
|
*R_PORT_PB_I2C = port_pb_i2c_shadow |=
|
|
IO_STATE(R_PORT_PB_I2C, i2c_en, on) |
|
|
IO_FIELD(R_PORT_PB_I2C, i2c_d, 1) |
|
|
IO_FIELD(R_PORT_PB_I2C, i2c_clk, 1) |
|
|
IO_STATE(R_PORT_PB_I2C, i2c_oe_, enable);
|
|
|
|
port_pb_dir_shadow &= ~IO_MASK(R_PORT_PB_DIR, dir0);
|
|
port_pb_dir_shadow &= ~IO_MASK(R_PORT_PB_DIR, dir1);
|
|
|
|
*R_PORT_PB_DIR = (port_pb_dir_shadow |=
|
|
IO_STATE(R_PORT_PB_DIR, dir0, input) |
|
|
IO_STATE(R_PORT_PB_DIR, dir1, output));
|
|
#else
|
|
if ((res = cris_io_interface_allocate_pins(if_i2c,
|
|
'b',
|
|
CONFIG_ETRAX_I2C_DATA_PORT,
|
|
CONFIG_ETRAX_I2C_DATA_PORT))) {
|
|
printk(KERN_WARNING "i2c_init: Failed to get IO pin for I2C data port\n");
|
|
return res;
|
|
} else if ((res = cris_io_interface_allocate_pins(if_i2c,
|
|
'b',
|
|
CONFIG_ETRAX_I2C_CLK_PORT,
|
|
CONFIG_ETRAX_I2C_CLK_PORT))) {
|
|
cris_io_interface_free_pins(if_i2c,
|
|
'b',
|
|
CONFIG_ETRAX_I2C_DATA_PORT,
|
|
CONFIG_ETRAX_I2C_DATA_PORT);
|
|
printk(KERN_WARNING "i2c_init: Failed to get IO pin for I2C clk port\n");
|
|
}
|
|
#endif
|
|
|
|
return res;
|
|
}
|
|
|
|
static int __init
|
|
i2c_register(void)
|
|
{
|
|
int res;
|
|
|
|
res = i2c_init();
|
|
if (res < 0)
|
|
return res;
|
|
res = register_chrdev(I2C_MAJOR, i2c_name, &i2c_fops);
|
|
if(res < 0) {
|
|
printk(KERN_ERR "i2c: couldn't get a major number.\n");
|
|
return res;
|
|
}
|
|
|
|
printk(KERN_INFO "I2C driver v2.2, (c) 1999-2004 Axis Communications AB\n");
|
|
|
|
return 0;
|
|
}
|
|
|
|
/* this makes sure that i2c_register is called during boot */
|
|
|
|
module_init(i2c_register);
|
|
|
|
/****************** END OF FILE i2c.c ********************************/
|