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847264fb7e
This patch expands the VA_BITS to 42 when the 64K page configuration is enabled allowing 2TB kernel linear mapping. Linux still uses 2 levels of page tables in this configuration with pgd now being a full page. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Acked-by: Will Deacon <will.deacon@arm.com> Acked-by: Marc Zyngier <marc.zyngier@arm.com>
44 lines
1.4 KiB
C
44 lines
1.4 KiB
C
/*
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* Copyright (C) 2012 ARM Ltd.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef __ASM_PGTABLE_2LEVEL_HWDEF_H
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#define __ASM_PGTABLE_2LEVEL_HWDEF_H
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/*
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* With LPAE and 64KB pages, there are 2 levels of page tables. Each level has
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* 8192 entries of 8 bytes each, occupying a 64KB page. Levels 0 and 1 are not
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* used. The 2nd level table (PGD for Linux) can cover a range of 4TB, each
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* entry representing 512MB. The user and kernel address spaces are limited to
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* 4TB in the 64KB page configuration.
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*/
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#define PTRS_PER_PTE 8192
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#define PTRS_PER_PGD 8192
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/*
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* PGDIR_SHIFT determines the size a top-level page table entry can map.
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*/
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#define PGDIR_SHIFT 29
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#define PGDIR_SIZE (_AC(1, UL) << PGDIR_SHIFT)
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#define PGDIR_MASK (~(PGDIR_SIZE-1))
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/*
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* section address mask and size definitions.
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*/
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#define SECTION_SHIFT 29
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#define SECTION_SIZE (_AC(1, UL) << SECTION_SHIFT)
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#define SECTION_MASK (~(SECTION_SIZE-1))
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#endif
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