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cf93feb3a0
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com> Signed-off-by: Bob Liu <lliubbo@gmail.com>
1271 lines
28 KiB
C
1271 lines
28 KiB
C
/*
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* Copyright 2004-2009 Analog Devices Inc.
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* 2008-2009 Bluetechnix
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* 2005 National ICT Australia (NICTA)
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* Aidan Williams <aidan@nicta.com.au>
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*
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* Licensed under the GPL-2 or later.
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*/
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#include <linux/device.h>
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#include <linux/platform_device.h>
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#include <linux/mtd/mtd.h>
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#include <linux/mtd/partitions.h>
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#include <linux/mtd/physmap.h>
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#include <linux/spi/spi.h>
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#include <linux/spi/flash.h>
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#include <linux/irq.h>
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#include <linux/interrupt.h>
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#include <linux/usb/musb.h>
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#include <asm/bfin5xx_spi.h>
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#include <asm/dma.h>
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#include <asm/gpio.h>
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#include <asm/nand.h>
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#include <asm/portmux.h>
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#include <asm/bfin_sdh.h>
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#include <mach/bf54x_keys.h>
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#include <asm/dpmc.h>
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#include <linux/input.h>
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#include <linux/spi/ad7877.h>
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/*
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* Name the Board for the /proc/cpuinfo
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*/
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const char bfin_board_name[] = "Bluetechnix CM-BF548";
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/*
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* Driver needs to know address, irq and flag pin.
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*/
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#if defined(CONFIG_FB_BF54X_LQ043) || defined(CONFIG_FB_BF54X_LQ043_MODULE)
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#include <mach/bf54x-lq043.h>
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static struct bfin_bf54xfb_mach_info bf54x_lq043_data = {
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.width = 480,
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.height = 272,
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.xres = {480, 480, 480},
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.yres = {272, 272, 272},
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.bpp = {24, 24, 24},
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.disp = GPIO_PE3,
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};
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static struct resource bf54x_lq043_resources[] = {
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{
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.start = IRQ_EPPI0_ERR,
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.end = IRQ_EPPI0_ERR,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct platform_device bf54x_lq043_device = {
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.name = "bf54x-lq043",
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.id = -1,
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.num_resources = ARRAY_SIZE(bf54x_lq043_resources),
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.resource = bf54x_lq043_resources,
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.dev = {
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.platform_data = &bf54x_lq043_data,
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},
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};
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#endif
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#if defined(CONFIG_KEYBOARD_BFIN) || defined(CONFIG_KEYBOARD_BFIN_MODULE)
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static unsigned int bf548_keymap[] = {
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KEYVAL(0, 0, KEY_ENTER),
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KEYVAL(0, 1, KEY_HELP),
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KEYVAL(0, 2, KEY_0),
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KEYVAL(0, 3, KEY_BACKSPACE),
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KEYVAL(1, 0, KEY_TAB),
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KEYVAL(1, 1, KEY_9),
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KEYVAL(1, 2, KEY_8),
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KEYVAL(1, 3, KEY_7),
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KEYVAL(2, 0, KEY_DOWN),
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KEYVAL(2, 1, KEY_6),
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KEYVAL(2, 2, KEY_5),
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KEYVAL(2, 3, KEY_4),
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KEYVAL(3, 0, KEY_UP),
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KEYVAL(3, 1, KEY_3),
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KEYVAL(3, 2, KEY_2),
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KEYVAL(3, 3, KEY_1),
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};
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static struct bfin_kpad_platform_data bf54x_kpad_data = {
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.rows = 4,
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.cols = 4,
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.keymap = bf548_keymap,
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.keymapsize = ARRAY_SIZE(bf548_keymap),
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.repeat = 0,
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.debounce_time = 5000, /* ns (5ms) */
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.coldrive_time = 1000, /* ns (1ms) */
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.keyup_test_interval = 50, /* ms (50ms) */
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};
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static struct resource bf54x_kpad_resources[] = {
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{
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.start = IRQ_KEY,
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.end = IRQ_KEY,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct platform_device bf54x_kpad_device = {
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.name = "bf54x-keys",
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.id = -1,
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.num_resources = ARRAY_SIZE(bf54x_kpad_resources),
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.resource = bf54x_kpad_resources,
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.dev = {
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.platform_data = &bf54x_kpad_data,
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},
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};
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#endif
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#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
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static struct platform_device rtc_device = {
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.name = "rtc-bfin",
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.id = -1,
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};
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#endif
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#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
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#ifdef CONFIG_SERIAL_BFIN_UART0
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static struct resource bfin_uart0_resources[] = {
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{
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.start = UART0_DLL,
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.end = UART0_RBR+2,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = IRQ_UART0_TX,
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.end = IRQ_UART0_TX,
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.flags = IORESOURCE_IRQ,
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},
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{
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.start = IRQ_UART0_RX,
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.end = IRQ_UART0_RX,
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.flags = IORESOURCE_IRQ,
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},
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{
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.start = IRQ_UART0_ERROR,
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.end = IRQ_UART0_ERROR,
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.flags = IORESOURCE_IRQ,
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},
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{
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.start = CH_UART0_TX,
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.end = CH_UART0_TX,
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.flags = IORESOURCE_DMA,
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},
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{
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.start = CH_UART0_RX,
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.end = CH_UART0_RX,
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.flags = IORESOURCE_DMA,
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},
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};
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static unsigned short bfin_uart0_peripherals[] = {
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P_UART0_TX, P_UART0_RX, 0
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};
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static struct platform_device bfin_uart0_device = {
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.name = "bfin-uart",
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.id = 0,
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.num_resources = ARRAY_SIZE(bfin_uart0_resources),
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.resource = bfin_uart0_resources,
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.dev = {
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.platform_data = &bfin_uart0_peripherals, /* Passed to driver */
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},
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};
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#endif
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#ifdef CONFIG_SERIAL_BFIN_UART1
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static struct resource bfin_uart1_resources[] = {
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{
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.start = UART1_DLL,
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.end = UART1_RBR+2,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = IRQ_UART1_TX,
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.end = IRQ_UART1_TX,
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.flags = IORESOURCE_IRQ,
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},
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{
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.start = IRQ_UART1_RX,
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.end = IRQ_UART1_RX,
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.flags = IORESOURCE_IRQ,
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},
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{
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.start = IRQ_UART1_ERROR,
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.end = IRQ_UART1_ERROR,
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.flags = IORESOURCE_IRQ,
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},
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{
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.start = CH_UART1_TX,
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.end = CH_UART1_TX,
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.flags = IORESOURCE_DMA,
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},
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{
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.start = CH_UART1_RX,
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.end = CH_UART1_RX,
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.flags = IORESOURCE_DMA,
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},
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#ifdef CONFIG_BFIN_UART1_CTSRTS
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{ /* CTS pin -- 0 means not supported */
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.start = GPIO_PE10,
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.end = GPIO_PE10,
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.flags = IORESOURCE_IO,
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},
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{ /* RTS pin -- 0 means not supported */
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.start = GPIO_PE9,
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.end = GPIO_PE9,
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.flags = IORESOURCE_IO,
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},
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#endif
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};
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static unsigned short bfin_uart1_peripherals[] = {
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P_UART1_TX, P_UART1_RX,
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#ifdef CONFIG_BFIN_UART1_CTSRTS
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P_UART1_RTS, P_UART1_CTS,
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#endif
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0
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};
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static struct platform_device bfin_uart1_device = {
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.name = "bfin-uart",
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.id = 1,
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.num_resources = ARRAY_SIZE(bfin_uart1_resources),
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.resource = bfin_uart1_resources,
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.dev = {
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.platform_data = &bfin_uart1_peripherals, /* Passed to driver */
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},
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};
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#endif
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#ifdef CONFIG_SERIAL_BFIN_UART2
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static struct resource bfin_uart2_resources[] = {
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{
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.start = UART2_DLL,
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.end = UART2_RBR+2,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = IRQ_UART2_TX,
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.end = IRQ_UART2_TX,
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.flags = IORESOURCE_IRQ,
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},
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{
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.start = IRQ_UART2_RX,
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.end = IRQ_UART2_RX,
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.flags = IORESOURCE_IRQ,
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},
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{
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.start = IRQ_UART2_ERROR,
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.end = IRQ_UART2_ERROR,
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.flags = IORESOURCE_IRQ,
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},
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{
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.start = CH_UART2_TX,
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.end = CH_UART2_TX,
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.flags = IORESOURCE_DMA,
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},
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{
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.start = CH_UART2_RX,
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.end = CH_UART2_RX,
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.flags = IORESOURCE_DMA,
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},
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};
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static unsigned short bfin_uart2_peripherals[] = {
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P_UART2_TX, P_UART2_RX, 0
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};
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static struct platform_device bfin_uart2_device = {
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.name = "bfin-uart",
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.id = 2,
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.num_resources = ARRAY_SIZE(bfin_uart2_resources),
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.resource = bfin_uart2_resources,
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.dev = {
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.platform_data = &bfin_uart2_peripherals, /* Passed to driver */
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},
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};
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#endif
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#ifdef CONFIG_SERIAL_BFIN_UART3
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static struct resource bfin_uart3_resources[] = {
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{
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.start = UART3_DLL,
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.end = UART3_RBR+2,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = IRQ_UART3_TX,
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.end = IRQ_UART3_TX,
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.flags = IORESOURCE_IRQ,
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},
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{
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.start = IRQ_UART3_RX,
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.end = IRQ_UART3_RX,
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.flags = IORESOURCE_IRQ,
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},
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{
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.start = IRQ_UART3_ERROR,
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.end = IRQ_UART3_ERROR,
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.flags = IORESOURCE_IRQ,
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},
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{
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.start = CH_UART3_TX,
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.end = CH_UART3_TX,
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.flags = IORESOURCE_DMA,
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},
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{
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.start = CH_UART3_RX,
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.end = CH_UART3_RX,
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.flags = IORESOURCE_DMA,
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},
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#ifdef CONFIG_BFIN_UART3_CTSRTS
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{ /* CTS pin -- 0 means not supported */
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.start = GPIO_PB3,
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.end = GPIO_PB3,
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.flags = IORESOURCE_IO,
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},
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{ /* RTS pin -- 0 means not supported */
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.start = GPIO_PB2,
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.end = GPIO_PB2,
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.flags = IORESOURCE_IO,
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},
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#endif
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};
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static unsigned short bfin_uart3_peripherals[] = {
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P_UART3_TX, P_UART3_RX,
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#ifdef CONFIG_BFIN_UART3_CTSRTS
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P_UART3_RTS, P_UART3_CTS,
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#endif
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0
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};
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static struct platform_device bfin_uart3_device = {
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.name = "bfin-uart",
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.id = 3,
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.num_resources = ARRAY_SIZE(bfin_uart3_resources),
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.resource = bfin_uart3_resources,
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.dev = {
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.platform_data = &bfin_uart3_peripherals, /* Passed to driver */
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},
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};
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#endif
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#endif
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#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
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#ifdef CONFIG_BFIN_SIR0
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static struct resource bfin_sir0_resources[] = {
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{
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.start = 0xFFC00400,
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.end = 0xFFC004FF,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = IRQ_UART0_RX,
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.end = IRQ_UART0_RX+1,
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.flags = IORESOURCE_IRQ,
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},
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{
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.start = CH_UART0_RX,
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.end = CH_UART0_RX+1,
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.flags = IORESOURCE_DMA,
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},
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};
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static struct platform_device bfin_sir0_device = {
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.name = "bfin_sir",
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.id = 0,
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.num_resources = ARRAY_SIZE(bfin_sir0_resources),
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.resource = bfin_sir0_resources,
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};
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#endif
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#ifdef CONFIG_BFIN_SIR1
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static struct resource bfin_sir1_resources[] = {
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{
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.start = 0xFFC02000,
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.end = 0xFFC020FF,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = IRQ_UART1_RX,
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.end = IRQ_UART1_RX+1,
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.flags = IORESOURCE_IRQ,
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},
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{
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.start = CH_UART1_RX,
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.end = CH_UART1_RX+1,
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.flags = IORESOURCE_DMA,
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},
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};
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static struct platform_device bfin_sir1_device = {
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.name = "bfin_sir",
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.id = 1,
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.num_resources = ARRAY_SIZE(bfin_sir1_resources),
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.resource = bfin_sir1_resources,
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};
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#endif
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#ifdef CONFIG_BFIN_SIR2
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static struct resource bfin_sir2_resources[] = {
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{
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.start = 0xFFC02100,
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.end = 0xFFC021FF,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = IRQ_UART2_RX,
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.end = IRQ_UART2_RX+1,
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.flags = IORESOURCE_IRQ,
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},
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{
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.start = CH_UART2_RX,
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.end = CH_UART2_RX+1,
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.flags = IORESOURCE_DMA,
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},
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};
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static struct platform_device bfin_sir2_device = {
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.name = "bfin_sir",
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.id = 2,
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.num_resources = ARRAY_SIZE(bfin_sir2_resources),
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.resource = bfin_sir2_resources,
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};
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#endif
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#ifdef CONFIG_BFIN_SIR3
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static struct resource bfin_sir3_resources[] = {
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{
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.start = 0xFFC03100,
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.end = 0xFFC031FF,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = IRQ_UART3_RX,
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.end = IRQ_UART3_RX+1,
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.flags = IORESOURCE_IRQ,
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},
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{
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.start = CH_UART3_RX,
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.end = CH_UART3_RX+1,
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.flags = IORESOURCE_DMA,
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},
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};
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static struct platform_device bfin_sir3_device = {
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.name = "bfin_sir",
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.id = 3,
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.num_resources = ARRAY_SIZE(bfin_sir3_resources),
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.resource = bfin_sir3_resources,
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};
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#endif
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#endif
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#if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE)
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#include <linux/smsc911x.h>
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static struct resource smsc911x_resources[] = {
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{
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.name = "smsc911x-memory",
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.start = 0x24000000,
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.end = 0x24000000 + 0xFF,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = IRQ_PE6,
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.end = IRQ_PE6,
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.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
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},
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};
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static struct smsc911x_platform_config smsc911x_config = {
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.flags = SMSC911X_USE_16BIT,
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.irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
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.irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN,
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.phy_interface = PHY_INTERFACE_MODE_MII,
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};
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static struct platform_device smsc911x_device = {
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.name = "smsc911x",
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.id = 0,
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.num_resources = ARRAY_SIZE(smsc911x_resources),
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.resource = smsc911x_resources,
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.dev = {
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.platform_data = &smsc911x_config,
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},
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};
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#endif
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|
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#if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
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static struct resource musb_resources[] = {
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[0] = {
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.start = 0xFFC03C00,
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.end = 0xFFC040FF,
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.flags = IORESOURCE_MEM,
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},
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[1] = { /* general IRQ */
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.start = IRQ_USB_INT0,
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.end = IRQ_USB_INT0,
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.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
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.name = "mc"
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},
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[2] = { /* DMA IRQ */
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.start = IRQ_USB_DMA,
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.end = IRQ_USB_DMA,
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.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
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.name = "dma"
|
|
},
|
|
};
|
|
|
|
static struct musb_hdrc_config musb_config = {
|
|
.multipoint = 0,
|
|
.dyn_fifo = 0,
|
|
.soft_con = 1,
|
|
.dma = 1,
|
|
.num_eps = 8,
|
|
.dma_channels = 8,
|
|
.gpio_vrsel = GPIO_PH6,
|
|
/* Some custom boards need to be active low, just set it to "0"
|
|
* if it is the case.
|
|
*/
|
|
.gpio_vrsel_active = 1,
|
|
.clkin = 24, /* musb CLKIN in MHZ */
|
|
};
|
|
|
|
static struct musb_hdrc_platform_data musb_plat = {
|
|
#if defined(CONFIG_USB_MUSB_OTG)
|
|
.mode = MUSB_OTG,
|
|
#elif defined(CONFIG_USB_MUSB_HDRC_HCD)
|
|
.mode = MUSB_HOST,
|
|
#elif defined(CONFIG_USB_GADGET_MUSB_HDRC)
|
|
.mode = MUSB_PERIPHERAL,
|
|
#endif
|
|
.config = &musb_config,
|
|
};
|
|
|
|
static u64 musb_dmamask = ~(u32)0;
|
|
|
|
static struct platform_device musb_device = {
|
|
.name = "musb-blackfin",
|
|
.id = 0,
|
|
.dev = {
|
|
.dma_mask = &musb_dmamask,
|
|
.coherent_dma_mask = 0xffffffff,
|
|
.platform_data = &musb_plat,
|
|
},
|
|
.num_resources = ARRAY_SIZE(musb_resources),
|
|
.resource = musb_resources,
|
|
};
|
|
#endif
|
|
|
|
#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
|
|
#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
|
|
static struct resource bfin_sport0_uart_resources[] = {
|
|
{
|
|
.start = SPORT0_TCR1,
|
|
.end = SPORT0_MRCS3+4,
|
|
.flags = IORESOURCE_MEM,
|
|
},
|
|
{
|
|
.start = IRQ_SPORT0_RX,
|
|
.end = IRQ_SPORT0_RX+1,
|
|
.flags = IORESOURCE_IRQ,
|
|
},
|
|
{
|
|
.start = IRQ_SPORT0_ERROR,
|
|
.end = IRQ_SPORT0_ERROR,
|
|
.flags = IORESOURCE_IRQ,
|
|
},
|
|
};
|
|
|
|
static unsigned short bfin_sport0_peripherals[] = {
|
|
P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
|
|
P_SPORT0_DRPRI, P_SPORT0_RSCLK, 0
|
|
};
|
|
|
|
static struct platform_device bfin_sport0_uart_device = {
|
|
.name = "bfin-sport-uart",
|
|
.id = 0,
|
|
.num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
|
|
.resource = bfin_sport0_uart_resources,
|
|
.dev = {
|
|
.platform_data = &bfin_sport0_peripherals, /* Passed to driver */
|
|
},
|
|
};
|
|
#endif
|
|
#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
|
|
static struct resource bfin_sport1_uart_resources[] = {
|
|
{
|
|
.start = SPORT1_TCR1,
|
|
.end = SPORT1_MRCS3+4,
|
|
.flags = IORESOURCE_MEM,
|
|
},
|
|
{
|
|
.start = IRQ_SPORT1_RX,
|
|
.end = IRQ_SPORT1_RX+1,
|
|
.flags = IORESOURCE_IRQ,
|
|
},
|
|
{
|
|
.start = IRQ_SPORT1_ERROR,
|
|
.end = IRQ_SPORT1_ERROR,
|
|
.flags = IORESOURCE_IRQ,
|
|
},
|
|
};
|
|
|
|
static unsigned short bfin_sport1_peripherals[] = {
|
|
P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
|
|
P_SPORT1_DRPRI, P_SPORT1_RSCLK, 0
|
|
};
|
|
|
|
static struct platform_device bfin_sport1_uart_device = {
|
|
.name = "bfin-sport-uart",
|
|
.id = 1,
|
|
.num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
|
|
.resource = bfin_sport1_uart_resources,
|
|
.dev = {
|
|
.platform_data = &bfin_sport1_peripherals, /* Passed to driver */
|
|
},
|
|
};
|
|
#endif
|
|
#ifdef CONFIG_SERIAL_BFIN_SPORT2_UART
|
|
static struct resource bfin_sport2_uart_resources[] = {
|
|
{
|
|
.start = SPORT2_TCR1,
|
|
.end = SPORT2_MRCS3+4,
|
|
.flags = IORESOURCE_MEM,
|
|
},
|
|
{
|
|
.start = IRQ_SPORT2_RX,
|
|
.end = IRQ_SPORT2_RX+1,
|
|
.flags = IORESOURCE_IRQ,
|
|
},
|
|
{
|
|
.start = IRQ_SPORT2_ERROR,
|
|
.end = IRQ_SPORT2_ERROR,
|
|
.flags = IORESOURCE_IRQ,
|
|
},
|
|
};
|
|
|
|
static unsigned short bfin_sport2_peripherals[] = {
|
|
P_SPORT2_TFS, P_SPORT2_DTPRI, P_SPORT2_TSCLK, P_SPORT2_RFS,
|
|
P_SPORT2_DRPRI, P_SPORT2_RSCLK, P_SPORT2_DRSEC, P_SPORT2_DTSEC, 0
|
|
};
|
|
|
|
static struct platform_device bfin_sport2_uart_device = {
|
|
.name = "bfin-sport-uart",
|
|
.id = 2,
|
|
.num_resources = ARRAY_SIZE(bfin_sport2_uart_resources),
|
|
.resource = bfin_sport2_uart_resources,
|
|
.dev = {
|
|
.platform_data = &bfin_sport2_peripherals, /* Passed to driver */
|
|
},
|
|
};
|
|
#endif
|
|
#ifdef CONFIG_SERIAL_BFIN_SPORT3_UART
|
|
static struct resource bfin_sport3_uart_resources[] = {
|
|
{
|
|
.start = SPORT3_TCR1,
|
|
.end = SPORT3_MRCS3+4,
|
|
.flags = IORESOURCE_MEM,
|
|
},
|
|
{
|
|
.start = IRQ_SPORT3_RX,
|
|
.end = IRQ_SPORT3_RX+1,
|
|
.flags = IORESOURCE_IRQ,
|
|
},
|
|
{
|
|
.start = IRQ_SPORT3_ERROR,
|
|
.end = IRQ_SPORT3_ERROR,
|
|
.flags = IORESOURCE_IRQ,
|
|
},
|
|
};
|
|
|
|
static unsigned short bfin_sport3_peripherals[] = {
|
|
P_SPORT3_TFS, P_SPORT3_DTPRI, P_SPORT3_TSCLK, P_SPORT3_RFS,
|
|
P_SPORT3_DRPRI, P_SPORT3_RSCLK, P_SPORT3_DRSEC, P_SPORT3_DTSEC, 0
|
|
};
|
|
|
|
static struct platform_device bfin_sport3_uart_device = {
|
|
.name = "bfin-sport-uart",
|
|
.id = 3,
|
|
.num_resources = ARRAY_SIZE(bfin_sport3_uart_resources),
|
|
.resource = bfin_sport3_uart_resources,
|
|
.dev = {
|
|
.platform_data = &bfin_sport3_peripherals, /* Passed to driver */
|
|
},
|
|
};
|
|
#endif
|
|
#endif
|
|
|
|
#if defined(CONFIG_PATA_BF54X) || defined(CONFIG_PATA_BF54X_MODULE)
|
|
static struct resource bfin_atapi_resources[] = {
|
|
{
|
|
.start = 0xFFC03800,
|
|
.end = 0xFFC0386F,
|
|
.flags = IORESOURCE_MEM,
|
|
},
|
|
{
|
|
.start = IRQ_ATAPI_ERR,
|
|
.end = IRQ_ATAPI_ERR,
|
|
.flags = IORESOURCE_IRQ,
|
|
},
|
|
};
|
|
|
|
static struct platform_device bfin_atapi_device = {
|
|
.name = "pata-bf54x",
|
|
.id = -1,
|
|
.num_resources = ARRAY_SIZE(bfin_atapi_resources),
|
|
.resource = bfin_atapi_resources,
|
|
};
|
|
#endif
|
|
|
|
#if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
|
|
static struct mtd_partition partition_info[] = {
|
|
{
|
|
.name = "linux kernel(nand)",
|
|
.offset = 0,
|
|
.size = 4 * 1024 * 1024,
|
|
},
|
|
{
|
|
.name = "file system(nand)",
|
|
.offset = 4 * 1024 * 1024,
|
|
.size = (256 - 4) * 1024 * 1024,
|
|
},
|
|
};
|
|
|
|
static struct bf5xx_nand_platform bf5xx_nand_platform = {
|
|
.data_width = NFC_NWIDTH_8,
|
|
.partitions = partition_info,
|
|
.nr_partitions = ARRAY_SIZE(partition_info),
|
|
.rd_dly = 3,
|
|
.wr_dly = 3,
|
|
};
|
|
|
|
static struct resource bf5xx_nand_resources[] = {
|
|
{
|
|
.start = 0xFFC03B00,
|
|
.end = 0xFFC03B4F,
|
|
.flags = IORESOURCE_MEM,
|
|
},
|
|
{
|
|
.start = CH_NFC,
|
|
.end = CH_NFC,
|
|
.flags = IORESOURCE_IRQ,
|
|
},
|
|
};
|
|
|
|
static struct platform_device bf5xx_nand_device = {
|
|
.name = "bf5xx-nand",
|
|
.id = 0,
|
|
.num_resources = ARRAY_SIZE(bf5xx_nand_resources),
|
|
.resource = bf5xx_nand_resources,
|
|
.dev = {
|
|
.platform_data = &bf5xx_nand_platform,
|
|
},
|
|
};
|
|
#endif
|
|
|
|
#if defined(CONFIG_SDH_BFIN) || defined(CONFIG_SDH_BFIN_MODULE)
|
|
static struct bfin_sd_host bfin_sdh_data = {
|
|
.dma_chan = CH_SDH,
|
|
.irq_int0 = IRQ_SDH_MASK0,
|
|
.pin_req = {P_SD_D0, P_SD_D1, P_SD_D2, P_SD_D3, P_SD_CLK, P_SD_CMD, 0},
|
|
};
|
|
|
|
static struct platform_device bf54x_sdh_device = {
|
|
.name = "bfin-sdh",
|
|
.id = 0,
|
|
.dev = {
|
|
.platform_data = &bfin_sdh_data,
|
|
},
|
|
};
|
|
#endif
|
|
|
|
#if defined(CONFIG_CAN_BFIN) || defined(CONFIG_CAN_BFIN_MODULE)
|
|
static unsigned short bfin_can_peripherals[] = {
|
|
P_CAN0_RX, P_CAN0_TX, 0
|
|
};
|
|
|
|
static struct resource bfin_can_resources[] = {
|
|
{
|
|
.start = 0xFFC02A00,
|
|
.end = 0xFFC02FFF,
|
|
.flags = IORESOURCE_MEM,
|
|
},
|
|
{
|
|
.start = IRQ_CAN0_RX,
|
|
.end = IRQ_CAN0_RX,
|
|
.flags = IORESOURCE_IRQ,
|
|
},
|
|
{
|
|
.start = IRQ_CAN0_TX,
|
|
.end = IRQ_CAN0_TX,
|
|
.flags = IORESOURCE_IRQ,
|
|
},
|
|
{
|
|
.start = IRQ_CAN0_ERROR,
|
|
.end = IRQ_CAN0_ERROR,
|
|
.flags = IORESOURCE_IRQ,
|
|
},
|
|
};
|
|
|
|
static struct platform_device bfin_can_device = {
|
|
.name = "bfin_can",
|
|
.num_resources = ARRAY_SIZE(bfin_can_resources),
|
|
.resource = bfin_can_resources,
|
|
.dev = {
|
|
.platform_data = &bfin_can_peripherals, /* Passed to driver */
|
|
},
|
|
};
|
|
#endif
|
|
|
|
#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
|
|
static struct mtd_partition para_partitions[] = {
|
|
{
|
|
.name = "bootloader(nor)",
|
|
.size = 0x40000,
|
|
.offset = 0,
|
|
}, {
|
|
.name = "linux kernel(nor)",
|
|
.size = 0x100000,
|
|
.offset = MTDPART_OFS_APPEND,
|
|
}, {
|
|
.name = "file system(nor)",
|
|
.size = MTDPART_SIZ_FULL,
|
|
.offset = MTDPART_OFS_APPEND,
|
|
}
|
|
};
|
|
|
|
static struct physmap_flash_data para_flash_data = {
|
|
.width = 2,
|
|
.parts = para_partitions,
|
|
.nr_parts = ARRAY_SIZE(para_partitions),
|
|
};
|
|
|
|
static struct resource para_flash_resource = {
|
|
.start = 0x20000000,
|
|
.end = 0x207fffff,
|
|
.flags = IORESOURCE_MEM,
|
|
};
|
|
|
|
static struct platform_device para_flash_device = {
|
|
.name = "physmap-flash",
|
|
.id = 0,
|
|
.dev = {
|
|
.platform_data = ¶_flash_data,
|
|
},
|
|
.num_resources = 1,
|
|
.resource = ¶_flash_resource,
|
|
};
|
|
#endif
|
|
|
|
#if defined(CONFIG_SPI_BFIN5XX) || defined(CONFIG_SPI_BFIN5XX_MODULE)
|
|
/* all SPI peripherals info goes here */
|
|
#if defined(CONFIG_MTD_M25P80) \
|
|
|| defined(CONFIG_MTD_M25P80_MODULE)
|
|
/* SPI flash chip (m25p16) */
|
|
static struct mtd_partition bfin_spi_flash_partitions[] = {
|
|
{
|
|
.name = "bootloader(spi)",
|
|
.size = 0x00040000,
|
|
.offset = 0,
|
|
.mask_flags = MTD_CAP_ROM
|
|
}, {
|
|
.name = "linux kernel(spi)",
|
|
.size = 0x1c0000,
|
|
.offset = 0x40000
|
|
}
|
|
};
|
|
|
|
static struct flash_platform_data bfin_spi_flash_data = {
|
|
.name = "m25p80",
|
|
.parts = bfin_spi_flash_partitions,
|
|
.nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
|
|
.type = "m25p16",
|
|
};
|
|
|
|
static struct bfin5xx_spi_chip spi_flash_chip_info = {
|
|
.enable_dma = 0, /* use dma transfer with this chip*/
|
|
};
|
|
#endif
|
|
|
|
#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
|
|
static const struct ad7877_platform_data bfin_ad7877_ts_info = {
|
|
.model = 7877,
|
|
.vref_delay_usecs = 50, /* internal, no capacitor */
|
|
.x_plate_ohms = 419,
|
|
.y_plate_ohms = 486,
|
|
.pressure_max = 1000,
|
|
.pressure_min = 0,
|
|
.stopacq_polarity = 1,
|
|
.first_conversion_delay = 3,
|
|
.acquisition_time = 1,
|
|
.averaging = 1,
|
|
.pen_down_acc_interval = 1,
|
|
};
|
|
#endif
|
|
|
|
static struct spi_board_info bf54x_spi_board_info[] __initdata = {
|
|
#if defined(CONFIG_MTD_M25P80) \
|
|
|| defined(CONFIG_MTD_M25P80_MODULE)
|
|
{
|
|
/* the modalias must be the same as spi device driver name */
|
|
.modalias = "m25p80", /* Name of spi_driver for this device */
|
|
.max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
|
|
.bus_num = 0, /* Framework bus number */
|
|
.chip_select = 1, /* SPI_SSEL1*/
|
|
.platform_data = &bfin_spi_flash_data,
|
|
.controller_data = &spi_flash_chip_info,
|
|
.mode = SPI_MODE_3,
|
|
},
|
|
#endif
|
|
#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
|
|
{
|
|
.modalias = "ad7877",
|
|
.platform_data = &bfin_ad7877_ts_info,
|
|
.irq = IRQ_PJ11,
|
|
.max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
|
|
.bus_num = 0,
|
|
.chip_select = 2,
|
|
},
|
|
#endif
|
|
#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
|
|
{
|
|
.modalias = "spidev",
|
|
.max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
|
|
.bus_num = 0,
|
|
.chip_select = 1,
|
|
},
|
|
#endif
|
|
};
|
|
|
|
/* SPI (0) */
|
|
static struct resource bfin_spi0_resource[] = {
|
|
[0] = {
|
|
.start = SPI0_REGBASE,
|
|
.end = SPI0_REGBASE + 0xFF,
|
|
.flags = IORESOURCE_MEM,
|
|
},
|
|
[1] = {
|
|
.start = CH_SPI0,
|
|
.end = CH_SPI0,
|
|
.flags = IORESOURCE_DMA,
|
|
},
|
|
[2] = {
|
|
.start = IRQ_SPI0,
|
|
.end = IRQ_SPI0,
|
|
.flags = IORESOURCE_IRQ,
|
|
}
|
|
};
|
|
|
|
/* SPI (1) */
|
|
static struct resource bfin_spi1_resource[] = {
|
|
[0] = {
|
|
.start = SPI1_REGBASE,
|
|
.end = SPI1_REGBASE + 0xFF,
|
|
.flags = IORESOURCE_MEM,
|
|
},
|
|
[1] = {
|
|
.start = CH_SPI1,
|
|
.end = CH_SPI1,
|
|
.flags = IORESOURCE_DMA,
|
|
},
|
|
[2] = {
|
|
.start = IRQ_SPI1,
|
|
.end = IRQ_SPI1,
|
|
.flags = IORESOURCE_IRQ,
|
|
}
|
|
};
|
|
|
|
/* SPI controller data */
|
|
static struct bfin5xx_spi_master bf54x_spi_master_info0 = {
|
|
.num_chipselect = 4,
|
|
.enable_dma = 1, /* master has the ability to do dma transfer */
|
|
.pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
|
|
};
|
|
|
|
static struct platform_device bf54x_spi_master0 = {
|
|
.name = "bfin-spi",
|
|
.id = 0, /* Bus number */
|
|
.num_resources = ARRAY_SIZE(bfin_spi0_resource),
|
|
.resource = bfin_spi0_resource,
|
|
.dev = {
|
|
.platform_data = &bf54x_spi_master_info0, /* Passed to driver */
|
|
},
|
|
};
|
|
|
|
static struct bfin5xx_spi_master bf54x_spi_master_info1 = {
|
|
.num_chipselect = 4,
|
|
.enable_dma = 1, /* master has the ability to do dma transfer */
|
|
.pin_req = {P_SPI1_SCK, P_SPI1_MISO, P_SPI1_MOSI, 0},
|
|
};
|
|
|
|
static struct platform_device bf54x_spi_master1 = {
|
|
.name = "bfin-spi",
|
|
.id = 1, /* Bus number */
|
|
.num_resources = ARRAY_SIZE(bfin_spi1_resource),
|
|
.resource = bfin_spi1_resource,
|
|
.dev = {
|
|
.platform_data = &bf54x_spi_master_info1, /* Passed to driver */
|
|
},
|
|
};
|
|
#endif /* spi master and devices */
|
|
|
|
#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
|
|
static const u16 bfin_twi0_pins[] = {P_TWI0_SCL, P_TWI0_SDA, 0};
|
|
|
|
static struct resource bfin_twi0_resource[] = {
|
|
[0] = {
|
|
.start = TWI0_REGBASE,
|
|
.end = TWI0_REGBASE + 0xFF,
|
|
.flags = IORESOURCE_MEM,
|
|
},
|
|
[1] = {
|
|
.start = IRQ_TWI0,
|
|
.end = IRQ_TWI0,
|
|
.flags = IORESOURCE_IRQ,
|
|
},
|
|
};
|
|
|
|
static struct platform_device i2c_bfin_twi0_device = {
|
|
.name = "i2c-bfin-twi",
|
|
.id = 0,
|
|
.num_resources = ARRAY_SIZE(bfin_twi0_resource),
|
|
.resource = bfin_twi0_resource,
|
|
.dev = {
|
|
.platform_data = &bfin_twi0_pins,
|
|
},
|
|
};
|
|
|
|
#if !defined(CONFIG_BF542) /* The BF542 only has 1 TWI */
|
|
static const u16 bfin_twi1_pins[] = {P_TWI1_SCL, P_TWI1_SDA, 0};
|
|
|
|
static struct resource bfin_twi1_resource[] = {
|
|
[0] = {
|
|
.start = TWI1_REGBASE,
|
|
.end = TWI1_REGBASE + 0xFF,
|
|
.flags = IORESOURCE_MEM,
|
|
},
|
|
[1] = {
|
|
.start = IRQ_TWI1,
|
|
.end = IRQ_TWI1,
|
|
.flags = IORESOURCE_IRQ,
|
|
},
|
|
};
|
|
|
|
static struct platform_device i2c_bfin_twi1_device = {
|
|
.name = "i2c-bfin-twi",
|
|
.id = 1,
|
|
.num_resources = ARRAY_SIZE(bfin_twi1_resource),
|
|
.resource = bfin_twi1_resource,
|
|
.dev = {
|
|
.platform_data = &bfin_twi1_pins,
|
|
},
|
|
};
|
|
#endif
|
|
#endif
|
|
|
|
#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
|
|
#include <linux/gpio_keys.h>
|
|
|
|
static struct gpio_keys_button bfin_gpio_keys_table[] = {
|
|
{BTN_0, GPIO_PH7, 1, "gpio-keys: BTN0"},
|
|
};
|
|
|
|
static struct gpio_keys_platform_data bfin_gpio_keys_data = {
|
|
.buttons = bfin_gpio_keys_table,
|
|
.nbuttons = ARRAY_SIZE(bfin_gpio_keys_table),
|
|
};
|
|
|
|
static struct platform_device bfin_device_gpiokeys = {
|
|
.name = "gpio-keys",
|
|
.dev = {
|
|
.platform_data = &bfin_gpio_keys_data,
|
|
},
|
|
};
|
|
#endif
|
|
|
|
static const unsigned int cclk_vlev_datasheet[] =
|
|
{
|
|
/*
|
|
* Internal VLEV BF54XSBBC1533
|
|
****temporarily using these values until data sheet is updated
|
|
*/
|
|
VRPAIR(VLEV_085, 150000000),
|
|
VRPAIR(VLEV_090, 250000000),
|
|
VRPAIR(VLEV_110, 276000000),
|
|
VRPAIR(VLEV_115, 301000000),
|
|
VRPAIR(VLEV_120, 525000000),
|
|
VRPAIR(VLEV_125, 550000000),
|
|
VRPAIR(VLEV_130, 600000000),
|
|
};
|
|
|
|
static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
|
|
.tuple_tab = cclk_vlev_datasheet,
|
|
.tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
|
|
.vr_settling_time = 25 /* us */,
|
|
};
|
|
|
|
static struct platform_device bfin_dpmc = {
|
|
.name = "bfin dpmc",
|
|
.dev = {
|
|
.platform_data = &bfin_dmpc_vreg_data,
|
|
},
|
|
};
|
|
|
|
static struct platform_device *cm_bf548_devices[] __initdata = {
|
|
|
|
&bfin_dpmc,
|
|
|
|
#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
|
|
&rtc_device,
|
|
#endif
|
|
|
|
#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
|
|
#ifdef CONFIG_SERIAL_BFIN_UART0
|
|
&bfin_uart0_device,
|
|
#endif
|
|
#ifdef CONFIG_SERIAL_BFIN_UART1
|
|
&bfin_uart1_device,
|
|
#endif
|
|
#ifdef CONFIG_SERIAL_BFIN_UART2
|
|
&bfin_uart2_device,
|
|
#endif
|
|
#ifdef CONFIG_SERIAL_BFIN_UART3
|
|
&bfin_uart3_device,
|
|
#endif
|
|
#endif
|
|
|
|
#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
|
|
#ifdef CONFIG_BFIN_SIR0
|
|
&bfin_sir0_device,
|
|
#endif
|
|
#ifdef CONFIG_BFIN_SIR1
|
|
&bfin_sir1_device,
|
|
#endif
|
|
#ifdef CONFIG_BFIN_SIR2
|
|
&bfin_sir2_device,
|
|
#endif
|
|
#ifdef CONFIG_BFIN_SIR3
|
|
&bfin_sir3_device,
|
|
#endif
|
|
#endif
|
|
|
|
#if defined(CONFIG_FB_BF54X_LQ043) || defined(CONFIG_FB_BF54X_LQ043_MODULE)
|
|
&bf54x_lq043_device,
|
|
#endif
|
|
|
|
#if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE)
|
|
&smsc911x_device,
|
|
#endif
|
|
|
|
#if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
|
|
&musb_device,
|
|
#endif
|
|
|
|
#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
|
|
#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
|
|
&bfin_sport0_uart_device,
|
|
#endif
|
|
#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
|
|
&bfin_sport1_uart_device,
|
|
#endif
|
|
#ifdef CONFIG_SERIAL_BFIN_SPORT2_UART
|
|
&bfin_sport2_uart_device,
|
|
#endif
|
|
#ifdef CONFIG_SERIAL_BFIN_SPORT3_UART
|
|
&bfin_sport3_uart_device,
|
|
#endif
|
|
#endif
|
|
|
|
#if defined(CONFIG_PATA_BF54X) || defined(CONFIG_PATA_BF54X_MODULE)
|
|
&bfin_atapi_device,
|
|
#endif
|
|
|
|
#if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
|
|
&bf5xx_nand_device,
|
|
#endif
|
|
|
|
#if defined(CONFIG_SDH_BFIN) || defined(CONFIG_SDH_BFIN_MODULE)
|
|
&bf54x_sdh_device,
|
|
#endif
|
|
|
|
#if defined(CONFIG_SPI_BFIN5XX) || defined(CONFIG_SPI_BFIN5XX_MODULE)
|
|
&bf54x_spi_master0,
|
|
&bf54x_spi_master1,
|
|
#endif
|
|
|
|
#if defined(CONFIG_KEYBOARD_BFIN) || defined(CONFIG_KEYBOARD_BFIN_MODULE)
|
|
&bf54x_kpad_device,
|
|
#endif
|
|
|
|
#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
|
|
&i2c_bfin_twi0_device,
|
|
#if !defined(CONFIG_BF542)
|
|
&i2c_bfin_twi1_device,
|
|
#endif
|
|
#endif
|
|
|
|
#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
|
|
&bfin_device_gpiokeys,
|
|
#endif
|
|
|
|
#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
|
|
¶_flash_device,
|
|
#endif
|
|
|
|
#if defined(CONFIG_CAN_BFIN) || defined(CONFIG_CAN_BFIN_MODULE)
|
|
&bfin_can_device,
|
|
#endif
|
|
|
|
};
|
|
|
|
static int __init cm_bf548_init(void)
|
|
{
|
|
printk(KERN_INFO "%s(): registering device resources\n", __func__);
|
|
platform_add_devices(cm_bf548_devices, ARRAY_SIZE(cm_bf548_devices));
|
|
|
|
#if defined(CONFIG_SPI_BFIN5XX) || defined(CONFIG_SPI_BFIN5XX_MODULE)
|
|
spi_register_board_info(bf54x_spi_board_info,
|
|
ARRAY_SIZE(bf54x_spi_board_info));
|
|
#endif
|
|
|
|
return 0;
|
|
}
|
|
|
|
arch_initcall(cm_bf548_init);
|
|
|
|
static struct platform_device *cm_bf548_early_devices[] __initdata = {
|
|
#if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
|
|
#ifdef CONFIG_SERIAL_BFIN_UART0
|
|
&bfin_uart0_device,
|
|
#endif
|
|
#ifdef CONFIG_SERIAL_BFIN_UART1
|
|
&bfin_uart1_device,
|
|
#endif
|
|
#ifdef CONFIG_SERIAL_BFIN_UART2
|
|
&bfin_uart2_device,
|
|
#endif
|
|
#ifdef CONFIG_SERIAL_BFIN_UART3
|
|
&bfin_uart3_device,
|
|
#endif
|
|
#endif
|
|
|
|
#if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
|
|
#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
|
|
&bfin_sport0_uart_device,
|
|
#endif
|
|
#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
|
|
&bfin_sport1_uart_device,
|
|
#endif
|
|
#ifdef CONFIG_SERIAL_BFIN_SPORT2_UART
|
|
&bfin_sport2_uart_device,
|
|
#endif
|
|
#ifdef CONFIG_SERIAL_BFIN_SPORT3_UART
|
|
&bfin_sport3_uart_device,
|
|
#endif
|
|
#endif
|
|
};
|
|
|
|
void __init native_machine_early_platform_add_devices(void)
|
|
{
|
|
printk(KERN_INFO "register early platform devices\n");
|
|
early_platform_add_devices(cm_bf548_early_devices,
|
|
ARRAY_SIZE(cm_bf548_early_devices));
|
|
}
|