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df24014abe
Currently, the notifiers are called once for each CPU of the policy->cpus cpumask. It would be more optimal if the notifier can be called only once and all the relevant information be provided to it. Out of the 23 drivers that register for the transition notifiers today, only 4 of them do per-cpu updates and the callback for the rest can be called only once for the policy without any impact. This would also avoid multiple function calls to the notifier callbacks and reduce multiple iterations of notifier core's code (which does locking as well). This patch adds pointer to the cpufreq policy to the struct cpufreq_freqs, so the notifier callback has all the information available to it with a single call. The five drivers which perform per-cpu updates are updated to use the cpufreq policy. The freqs->cpu field is redundant now and is removed. Acked-by: David S. Miller <davem@davemloft.net> (sparc) Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
900 lines
21 KiB
C
900 lines
21 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/* time.c: UltraSparc timer and TOD clock support.
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*
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* Copyright (C) 1997, 2008 David S. Miller (davem@davemloft.net)
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* Copyright (C) 1998 Eddie C. Dost (ecd@skynet.be)
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*
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* Based largely on code which is:
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*
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* Copyright (C) 1996 Thomas K. Dyas (tdyas@eden.rutgers.edu)
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*/
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#include <linux/errno.h>
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#include <linux/export.h>
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#include <linux/sched.h>
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#include <linux/kernel.h>
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#include <linux/param.h>
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#include <linux/string.h>
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#include <linux/mm.h>
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#include <linux/interrupt.h>
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#include <linux/time.h>
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#include <linux/timex.h>
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#include <linux/init.h>
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#include <linux/ioport.h>
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#include <linux/mc146818rtc.h>
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#include <linux/delay.h>
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#include <linux/profile.h>
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#include <linux/bcd.h>
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#include <linux/jiffies.h>
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#include <linux/cpufreq.h>
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#include <linux/percpu.h>
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#include <linux/rtc/m48t59.h>
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#include <linux/kernel_stat.h>
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#include <linux/clockchips.h>
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#include <linux/clocksource.h>
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#include <linux/platform_device.h>
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#include <linux/ftrace.h>
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#include <asm/oplib.h>
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#include <asm/timer.h>
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#include <asm/irq.h>
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#include <asm/io.h>
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#include <asm/prom.h>
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#include <asm/starfire.h>
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#include <asm/smp.h>
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#include <asm/sections.h>
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#include <asm/cpudata.h>
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#include <linux/uaccess.h>
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#include <asm/irq_regs.h>
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#include <asm/cacheflush.h>
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#include "entry.h"
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#include "kernel.h"
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DEFINE_SPINLOCK(rtc_lock);
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#ifdef CONFIG_SMP
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unsigned long profile_pc(struct pt_regs *regs)
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{
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unsigned long pc = instruction_pointer(regs);
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if (in_lock_functions(pc))
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return regs->u_regs[UREG_RETPC];
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return pc;
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}
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EXPORT_SYMBOL(profile_pc);
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#endif
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static void tick_disable_protection(void)
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{
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/* Set things up so user can access tick register for profiling
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* purposes. Also workaround BB_ERRATA_1 by doing a dummy
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* read back of %tick after writing it.
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*/
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__asm__ __volatile__(
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" ba,pt %%xcc, 1f\n"
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" nop\n"
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" .align 64\n"
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"1: rd %%tick, %%g2\n"
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" add %%g2, 6, %%g2\n"
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" andn %%g2, %0, %%g2\n"
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" wrpr %%g2, 0, %%tick\n"
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" rdpr %%tick, %%g0"
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: /* no outputs */
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: "r" (TICK_PRIV_BIT)
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: "g2");
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}
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static void tick_disable_irq(void)
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{
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__asm__ __volatile__(
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" ba,pt %%xcc, 1f\n"
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" nop\n"
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" .align 64\n"
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"1: wr %0, 0x0, %%tick_cmpr\n"
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" rd %%tick_cmpr, %%g0"
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: /* no outputs */
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: "r" (TICKCMP_IRQ_BIT));
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}
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static void tick_init_tick(void)
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{
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tick_disable_protection();
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tick_disable_irq();
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}
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static unsigned long long tick_get_tick(void)
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{
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unsigned long ret;
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__asm__ __volatile__("rd %%tick, %0\n\t"
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"mov %0, %0"
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: "=r" (ret));
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return ret & ~TICK_PRIV_BIT;
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}
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static int tick_add_compare(unsigned long adj)
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{
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unsigned long orig_tick, new_tick, new_compare;
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__asm__ __volatile__("rd %%tick, %0"
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: "=r" (orig_tick));
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orig_tick &= ~TICKCMP_IRQ_BIT;
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/* Workaround for Spitfire Errata (#54 I think??), I discovered
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* this via Sun BugID 4008234, mentioned in Solaris-2.5.1 patch
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* number 103640.
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*
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* On Blackbird writes to %tick_cmpr can fail, the
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* workaround seems to be to execute the wr instruction
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* at the start of an I-cache line, and perform a dummy
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* read back from %tick_cmpr right after writing to it. -DaveM
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*/
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__asm__ __volatile__("ba,pt %%xcc, 1f\n\t"
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" add %1, %2, %0\n\t"
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".align 64\n"
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"1:\n\t"
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"wr %0, 0, %%tick_cmpr\n\t"
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"rd %%tick_cmpr, %%g0\n\t"
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: "=r" (new_compare)
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: "r" (orig_tick), "r" (adj));
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__asm__ __volatile__("rd %%tick, %0"
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: "=r" (new_tick));
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new_tick &= ~TICKCMP_IRQ_BIT;
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return ((long)(new_tick - (orig_tick+adj))) > 0L;
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}
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static unsigned long tick_add_tick(unsigned long adj)
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{
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unsigned long new_tick;
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/* Also need to handle Blackbird bug here too. */
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__asm__ __volatile__("rd %%tick, %0\n\t"
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"add %0, %1, %0\n\t"
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"wrpr %0, 0, %%tick\n\t"
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: "=&r" (new_tick)
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: "r" (adj));
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return new_tick;
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}
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/* Searches for cpu clock frequency with given cpuid in OpenBoot tree */
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static unsigned long cpuid_to_freq(phandle node, int cpuid)
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{
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bool is_cpu_node = false;
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unsigned long freq = 0;
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char type[128];
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if (!node)
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return freq;
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if (prom_getproperty(node, "device_type", type, sizeof(type)) != -1)
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is_cpu_node = (strcmp(type, "cpu") == 0);
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/* try upa-portid then cpuid to get cpuid, see prom_64.c */
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if (is_cpu_node && (prom_getint(node, "upa-portid") == cpuid ||
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prom_getint(node, "cpuid") == cpuid))
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freq = prom_getintdefault(node, "clock-frequency", 0);
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if (!freq)
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freq = cpuid_to_freq(prom_getchild(node), cpuid);
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if (!freq)
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freq = cpuid_to_freq(prom_getsibling(node), cpuid);
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return freq;
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}
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static unsigned long tick_get_frequency(void)
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{
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return cpuid_to_freq(prom_root_node, hard_smp_processor_id());
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}
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static struct sparc64_tick_ops tick_operations __cacheline_aligned = {
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.name = "tick",
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.init_tick = tick_init_tick,
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.disable_irq = tick_disable_irq,
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.get_tick = tick_get_tick,
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.add_tick = tick_add_tick,
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.add_compare = tick_add_compare,
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.get_frequency = tick_get_frequency,
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.softint_mask = 1UL << 0,
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};
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struct sparc64_tick_ops *tick_ops __read_mostly = &tick_operations;
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EXPORT_SYMBOL(tick_ops);
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static void stick_disable_irq(void)
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{
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__asm__ __volatile__(
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"wr %0, 0x0, %%asr25"
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: /* no outputs */
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: "r" (TICKCMP_IRQ_BIT));
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}
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static void stick_init_tick(void)
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{
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/* Writes to the %tick and %stick register are not
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* allowed on sun4v. The Hypervisor controls that
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* bit, per-strand.
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*/
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if (tlb_type != hypervisor) {
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tick_disable_protection();
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tick_disable_irq();
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/* Let the user get at STICK too. */
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__asm__ __volatile__(
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" rd %%asr24, %%g2\n"
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" andn %%g2, %0, %%g2\n"
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" wr %%g2, 0, %%asr24"
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: /* no outputs */
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: "r" (TICK_PRIV_BIT)
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: "g1", "g2");
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}
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stick_disable_irq();
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}
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static unsigned long long stick_get_tick(void)
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{
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unsigned long ret;
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__asm__ __volatile__("rd %%asr24, %0"
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: "=r" (ret));
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return ret & ~TICK_PRIV_BIT;
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}
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static unsigned long stick_add_tick(unsigned long adj)
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{
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unsigned long new_tick;
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__asm__ __volatile__("rd %%asr24, %0\n\t"
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"add %0, %1, %0\n\t"
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"wr %0, 0, %%asr24\n\t"
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: "=&r" (new_tick)
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: "r" (adj));
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return new_tick;
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}
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static int stick_add_compare(unsigned long adj)
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{
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unsigned long orig_tick, new_tick;
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__asm__ __volatile__("rd %%asr24, %0"
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: "=r" (orig_tick));
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orig_tick &= ~TICKCMP_IRQ_BIT;
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__asm__ __volatile__("wr %0, 0, %%asr25"
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: /* no outputs */
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: "r" (orig_tick + adj));
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__asm__ __volatile__("rd %%asr24, %0"
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: "=r" (new_tick));
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new_tick &= ~TICKCMP_IRQ_BIT;
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return ((long)(new_tick - (orig_tick+adj))) > 0L;
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}
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static unsigned long stick_get_frequency(void)
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{
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return prom_getintdefault(prom_root_node, "stick-frequency", 0);
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}
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static struct sparc64_tick_ops stick_operations __read_mostly = {
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.name = "stick",
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.init_tick = stick_init_tick,
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.disable_irq = stick_disable_irq,
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.get_tick = stick_get_tick,
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.add_tick = stick_add_tick,
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.add_compare = stick_add_compare,
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.get_frequency = stick_get_frequency,
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.softint_mask = 1UL << 16,
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};
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/* On Hummingbird the STICK/STICK_CMPR register is implemented
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* in I/O space. There are two 64-bit registers each, the
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* first holds the low 32-bits of the value and the second holds
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* the high 32-bits.
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*
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* Since STICK is constantly updating, we have to access it carefully.
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*
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* The sequence we use to read is:
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* 1) read high
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* 2) read low
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* 3) read high again, if it rolled re-read both low and high again.
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*
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* Writing STICK safely is also tricky:
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* 1) write low to zero
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* 2) write high
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* 3) write low
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*/
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static unsigned long __hbird_read_stick(void)
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{
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unsigned long ret, tmp1, tmp2, tmp3;
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unsigned long addr = HBIRD_STICK_ADDR+8;
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__asm__ __volatile__("ldxa [%1] %5, %2\n"
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"1:\n\t"
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"sub %1, 0x8, %1\n\t"
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"ldxa [%1] %5, %3\n\t"
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"add %1, 0x8, %1\n\t"
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"ldxa [%1] %5, %4\n\t"
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"cmp %4, %2\n\t"
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"bne,a,pn %%xcc, 1b\n\t"
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" mov %4, %2\n\t"
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"sllx %4, 32, %4\n\t"
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"or %3, %4, %0\n\t"
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: "=&r" (ret), "=&r" (addr),
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"=&r" (tmp1), "=&r" (tmp2), "=&r" (tmp3)
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: "i" (ASI_PHYS_BYPASS_EC_E), "1" (addr));
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return ret;
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}
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static void __hbird_write_stick(unsigned long val)
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{
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unsigned long low = (val & 0xffffffffUL);
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unsigned long high = (val >> 32UL);
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unsigned long addr = HBIRD_STICK_ADDR;
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__asm__ __volatile__("stxa %%g0, [%0] %4\n\t"
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"add %0, 0x8, %0\n\t"
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"stxa %3, [%0] %4\n\t"
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"sub %0, 0x8, %0\n\t"
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"stxa %2, [%0] %4"
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: "=&r" (addr)
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: "0" (addr), "r" (low), "r" (high),
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"i" (ASI_PHYS_BYPASS_EC_E));
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}
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static void __hbird_write_compare(unsigned long val)
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{
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unsigned long low = (val & 0xffffffffUL);
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unsigned long high = (val >> 32UL);
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unsigned long addr = HBIRD_STICKCMP_ADDR + 0x8UL;
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__asm__ __volatile__("stxa %3, [%0] %4\n\t"
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"sub %0, 0x8, %0\n\t"
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"stxa %2, [%0] %4"
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: "=&r" (addr)
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: "0" (addr), "r" (low), "r" (high),
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"i" (ASI_PHYS_BYPASS_EC_E));
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}
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static void hbtick_disable_irq(void)
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{
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__hbird_write_compare(TICKCMP_IRQ_BIT);
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}
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static void hbtick_init_tick(void)
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{
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tick_disable_protection();
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/* XXX This seems to be necessary to 'jumpstart' Hummingbird
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* XXX into actually sending STICK interrupts. I think because
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* XXX of how we store %tick_cmpr in head.S this somehow resets the
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* XXX {TICK + STICK} interrupt mux. -DaveM
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*/
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__hbird_write_stick(__hbird_read_stick());
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hbtick_disable_irq();
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}
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static unsigned long long hbtick_get_tick(void)
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{
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return __hbird_read_stick() & ~TICK_PRIV_BIT;
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}
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static unsigned long hbtick_add_tick(unsigned long adj)
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{
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unsigned long val;
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val = __hbird_read_stick() + adj;
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__hbird_write_stick(val);
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return val;
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}
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static int hbtick_add_compare(unsigned long adj)
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{
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unsigned long val = __hbird_read_stick();
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unsigned long val2;
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val &= ~TICKCMP_IRQ_BIT;
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val += adj;
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__hbird_write_compare(val);
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val2 = __hbird_read_stick() & ~TICKCMP_IRQ_BIT;
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return ((long)(val2 - val)) > 0L;
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}
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static unsigned long hbtick_get_frequency(void)
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{
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return prom_getintdefault(prom_root_node, "stick-frequency", 0);
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}
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static struct sparc64_tick_ops hbtick_operations __read_mostly = {
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.name = "hbtick",
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.init_tick = hbtick_init_tick,
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.disable_irq = hbtick_disable_irq,
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.get_tick = hbtick_get_tick,
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.add_tick = hbtick_add_tick,
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.add_compare = hbtick_add_compare,
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.get_frequency = hbtick_get_frequency,
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.softint_mask = 1UL << 0,
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};
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unsigned long cmos_regs;
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EXPORT_SYMBOL(cmos_regs);
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static struct resource rtc_cmos_resource;
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static struct platform_device rtc_cmos_device = {
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.name = "rtc_cmos",
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.id = -1,
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.resource = &rtc_cmos_resource,
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.num_resources = 1,
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};
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static int rtc_probe(struct platform_device *op)
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{
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struct resource *r;
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printk(KERN_INFO "%pOF: RTC regs at 0x%llx\n",
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op->dev.of_node, op->resource[0].start);
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/* The CMOS RTC driver only accepts IORESOURCE_IO, so cons
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* up a fake resource so that the probe works for all cases.
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* When the RTC is behind an ISA bus it will have IORESOURCE_IO
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* already, whereas when it's behind EBUS is will be IORESOURCE_MEM.
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*/
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r = &rtc_cmos_resource;
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r->flags = IORESOURCE_IO;
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r->name = op->resource[0].name;
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r->start = op->resource[0].start;
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r->end = op->resource[0].end;
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cmos_regs = op->resource[0].start;
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return platform_device_register(&rtc_cmos_device);
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}
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static const struct of_device_id rtc_match[] = {
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{
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.name = "rtc",
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.compatible = "m5819",
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},
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{
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.name = "rtc",
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.compatible = "isa-m5819p",
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},
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{
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.name = "rtc",
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.compatible = "isa-m5823p",
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},
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{
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.name = "rtc",
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.compatible = "ds1287",
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},
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{},
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};
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static struct platform_driver rtc_driver = {
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.probe = rtc_probe,
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.driver = {
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.name = "rtc",
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.of_match_table = rtc_match,
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},
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};
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static struct platform_device rtc_bq4802_device = {
|
|
.name = "rtc-bq4802",
|
|
.id = -1,
|
|
.num_resources = 1,
|
|
};
|
|
|
|
static int bq4802_probe(struct platform_device *op)
|
|
{
|
|
|
|
printk(KERN_INFO "%pOF: BQ4802 regs at 0x%llx\n",
|
|
op->dev.of_node, op->resource[0].start);
|
|
|
|
rtc_bq4802_device.resource = &op->resource[0];
|
|
return platform_device_register(&rtc_bq4802_device);
|
|
}
|
|
|
|
static const struct of_device_id bq4802_match[] = {
|
|
{
|
|
.name = "rtc",
|
|
.compatible = "bq4802",
|
|
},
|
|
{},
|
|
};
|
|
|
|
static struct platform_driver bq4802_driver = {
|
|
.probe = bq4802_probe,
|
|
.driver = {
|
|
.name = "bq4802",
|
|
.of_match_table = bq4802_match,
|
|
},
|
|
};
|
|
|
|
static unsigned char mostek_read_byte(struct device *dev, u32 ofs)
|
|
{
|
|
struct platform_device *pdev = to_platform_device(dev);
|
|
void __iomem *regs = (void __iomem *) pdev->resource[0].start;
|
|
|
|
return readb(regs + ofs);
|
|
}
|
|
|
|
static void mostek_write_byte(struct device *dev, u32 ofs, u8 val)
|
|
{
|
|
struct platform_device *pdev = to_platform_device(dev);
|
|
void __iomem *regs = (void __iomem *) pdev->resource[0].start;
|
|
|
|
writeb(val, regs + ofs);
|
|
}
|
|
|
|
static struct m48t59_plat_data m48t59_data = {
|
|
.read_byte = mostek_read_byte,
|
|
.write_byte = mostek_write_byte,
|
|
};
|
|
|
|
static struct platform_device m48t59_rtc = {
|
|
.name = "rtc-m48t59",
|
|
.id = 0,
|
|
.num_resources = 1,
|
|
.dev = {
|
|
.platform_data = &m48t59_data,
|
|
},
|
|
};
|
|
|
|
static int mostek_probe(struct platform_device *op)
|
|
{
|
|
struct device_node *dp = op->dev.of_node;
|
|
|
|
/* On an Enterprise system there can be multiple mostek clocks.
|
|
* We should only match the one that is on the central FHC bus.
|
|
*/
|
|
if (of_node_name_eq(dp->parent, "fhc") &&
|
|
!of_node_name_eq(dp->parent->parent, "central"))
|
|
return -ENODEV;
|
|
|
|
printk(KERN_INFO "%pOF: Mostek regs at 0x%llx\n",
|
|
dp, op->resource[0].start);
|
|
|
|
m48t59_rtc.resource = &op->resource[0];
|
|
return platform_device_register(&m48t59_rtc);
|
|
}
|
|
|
|
static const struct of_device_id mostek_match[] = {
|
|
{
|
|
.name = "eeprom",
|
|
},
|
|
{},
|
|
};
|
|
|
|
static struct platform_driver mostek_driver = {
|
|
.probe = mostek_probe,
|
|
.driver = {
|
|
.name = "mostek",
|
|
.of_match_table = mostek_match,
|
|
},
|
|
};
|
|
|
|
static struct platform_device rtc_sun4v_device = {
|
|
.name = "rtc-sun4v",
|
|
.id = -1,
|
|
};
|
|
|
|
static struct platform_device rtc_starfire_device = {
|
|
.name = "rtc-starfire",
|
|
.id = -1,
|
|
};
|
|
|
|
static int __init clock_init(void)
|
|
{
|
|
if (this_is_starfire)
|
|
return platform_device_register(&rtc_starfire_device);
|
|
|
|
if (tlb_type == hypervisor)
|
|
return platform_device_register(&rtc_sun4v_device);
|
|
|
|
(void) platform_driver_register(&rtc_driver);
|
|
(void) platform_driver_register(&mostek_driver);
|
|
(void) platform_driver_register(&bq4802_driver);
|
|
|
|
return 0;
|
|
}
|
|
|
|
/* Must be after subsys_initcall() so that busses are probed. Must
|
|
* be before device_initcall() because things like the RTC driver
|
|
* need to see the clock registers.
|
|
*/
|
|
fs_initcall(clock_init);
|
|
|
|
/* Return true if this is Hummingbird, aka Ultra-IIe */
|
|
static bool is_hummingbird(void)
|
|
{
|
|
unsigned long ver, manuf, impl;
|
|
|
|
__asm__ __volatile__ ("rdpr %%ver, %0"
|
|
: "=&r" (ver));
|
|
manuf = ((ver >> 48) & 0xffff);
|
|
impl = ((ver >> 32) & 0xffff);
|
|
|
|
return (manuf == 0x17 && impl == 0x13);
|
|
}
|
|
|
|
struct freq_table {
|
|
unsigned long clock_tick_ref;
|
|
unsigned int ref_freq;
|
|
};
|
|
static DEFINE_PER_CPU(struct freq_table, sparc64_freq_table) = { 0, 0 };
|
|
|
|
unsigned long sparc64_get_clock_tick(unsigned int cpu)
|
|
{
|
|
struct freq_table *ft = &per_cpu(sparc64_freq_table, cpu);
|
|
|
|
if (ft->clock_tick_ref)
|
|
return ft->clock_tick_ref;
|
|
return cpu_data(cpu).clock_tick;
|
|
}
|
|
EXPORT_SYMBOL(sparc64_get_clock_tick);
|
|
|
|
#ifdef CONFIG_CPU_FREQ
|
|
|
|
static int sparc64_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
|
|
void *data)
|
|
{
|
|
struct cpufreq_freqs *freq = data;
|
|
unsigned int cpu;
|
|
struct freq_table *ft;
|
|
|
|
for_each_cpu(cpu, freq->policy->cpus) {
|
|
ft = &per_cpu(sparc64_freq_table, cpu);
|
|
|
|
if (!ft->ref_freq) {
|
|
ft->ref_freq = freq->old;
|
|
ft->clock_tick_ref = cpu_data(cpu).clock_tick;
|
|
}
|
|
|
|
if ((val == CPUFREQ_PRECHANGE && freq->old < freq->new) ||
|
|
(val == CPUFREQ_POSTCHANGE && freq->old > freq->new)) {
|
|
cpu_data(cpu).clock_tick =
|
|
cpufreq_scale(ft->clock_tick_ref, ft->ref_freq,
|
|
freq->new);
|
|
}
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static struct notifier_block sparc64_cpufreq_notifier_block = {
|
|
.notifier_call = sparc64_cpufreq_notifier
|
|
};
|
|
|
|
static int __init register_sparc64_cpufreq_notifier(void)
|
|
{
|
|
|
|
cpufreq_register_notifier(&sparc64_cpufreq_notifier_block,
|
|
CPUFREQ_TRANSITION_NOTIFIER);
|
|
return 0;
|
|
}
|
|
|
|
core_initcall(register_sparc64_cpufreq_notifier);
|
|
|
|
#endif /* CONFIG_CPU_FREQ */
|
|
|
|
static int sparc64_next_event(unsigned long delta,
|
|
struct clock_event_device *evt)
|
|
{
|
|
return tick_operations.add_compare(delta) ? -ETIME : 0;
|
|
}
|
|
|
|
static int sparc64_timer_shutdown(struct clock_event_device *evt)
|
|
{
|
|
tick_operations.disable_irq();
|
|
return 0;
|
|
}
|
|
|
|
static struct clock_event_device sparc64_clockevent = {
|
|
.features = CLOCK_EVT_FEAT_ONESHOT,
|
|
.set_state_shutdown = sparc64_timer_shutdown,
|
|
.set_next_event = sparc64_next_event,
|
|
.rating = 100,
|
|
.shift = 30,
|
|
.irq = -1,
|
|
};
|
|
static DEFINE_PER_CPU(struct clock_event_device, sparc64_events);
|
|
|
|
void __irq_entry timer_interrupt(int irq, struct pt_regs *regs)
|
|
{
|
|
struct pt_regs *old_regs = set_irq_regs(regs);
|
|
unsigned long tick_mask = tick_operations.softint_mask;
|
|
int cpu = smp_processor_id();
|
|
struct clock_event_device *evt = &per_cpu(sparc64_events, cpu);
|
|
|
|
clear_softint(tick_mask);
|
|
|
|
irq_enter();
|
|
|
|
local_cpu_data().irq0_irqs++;
|
|
kstat_incr_irq_this_cpu(0);
|
|
|
|
if (unlikely(!evt->event_handler)) {
|
|
printk(KERN_WARNING
|
|
"Spurious SPARC64 timer interrupt on cpu %d\n", cpu);
|
|
} else
|
|
evt->event_handler(evt);
|
|
|
|
irq_exit();
|
|
|
|
set_irq_regs(old_regs);
|
|
}
|
|
|
|
void setup_sparc64_timer(void)
|
|
{
|
|
struct clock_event_device *sevt;
|
|
unsigned long pstate;
|
|
|
|
/* Guarantee that the following sequences execute
|
|
* uninterrupted.
|
|
*/
|
|
__asm__ __volatile__("rdpr %%pstate, %0\n\t"
|
|
"wrpr %0, %1, %%pstate"
|
|
: "=r" (pstate)
|
|
: "i" (PSTATE_IE));
|
|
|
|
tick_operations.init_tick();
|
|
|
|
/* Restore PSTATE_IE. */
|
|
__asm__ __volatile__("wrpr %0, 0x0, %%pstate"
|
|
: /* no outputs */
|
|
: "r" (pstate));
|
|
|
|
sevt = this_cpu_ptr(&sparc64_events);
|
|
|
|
memcpy(sevt, &sparc64_clockevent, sizeof(*sevt));
|
|
sevt->cpumask = cpumask_of(smp_processor_id());
|
|
|
|
clockevents_register_device(sevt);
|
|
}
|
|
|
|
#define SPARC64_NSEC_PER_CYC_SHIFT 10UL
|
|
|
|
static struct clocksource clocksource_tick = {
|
|
.rating = 100,
|
|
.mask = CLOCKSOURCE_MASK(64),
|
|
.flags = CLOCK_SOURCE_IS_CONTINUOUS,
|
|
};
|
|
|
|
static unsigned long tb_ticks_per_usec __read_mostly;
|
|
|
|
void __delay(unsigned long loops)
|
|
{
|
|
unsigned long bclock = get_tick();
|
|
|
|
while ((get_tick() - bclock) < loops)
|
|
;
|
|
}
|
|
EXPORT_SYMBOL(__delay);
|
|
|
|
void udelay(unsigned long usecs)
|
|
{
|
|
__delay(tb_ticks_per_usec * usecs);
|
|
}
|
|
EXPORT_SYMBOL(udelay);
|
|
|
|
static u64 clocksource_tick_read(struct clocksource *cs)
|
|
{
|
|
return get_tick();
|
|
}
|
|
|
|
static void __init get_tick_patch(void)
|
|
{
|
|
unsigned int *addr, *instr, i;
|
|
struct get_tick_patch *p;
|
|
|
|
if (tlb_type == spitfire && is_hummingbird())
|
|
return;
|
|
|
|
for (p = &__get_tick_patch; p < &__get_tick_patch_end; p++) {
|
|
instr = (tlb_type == spitfire) ? p->tick : p->stick;
|
|
addr = (unsigned int *)(unsigned long)p->addr;
|
|
for (i = 0; i < GET_TICK_NINSTR; i++) {
|
|
addr[i] = instr[i];
|
|
/* ensure that address is modified before flush */
|
|
wmb();
|
|
flushi(&addr[i]);
|
|
}
|
|
}
|
|
}
|
|
|
|
static void __init init_tick_ops(struct sparc64_tick_ops *ops)
|
|
{
|
|
unsigned long freq, quotient, tick;
|
|
|
|
freq = ops->get_frequency();
|
|
quotient = clocksource_hz2mult(freq, SPARC64_NSEC_PER_CYC_SHIFT);
|
|
tick = ops->get_tick();
|
|
|
|
ops->offset = (tick * quotient) >> SPARC64_NSEC_PER_CYC_SHIFT;
|
|
ops->ticks_per_nsec_quotient = quotient;
|
|
ops->frequency = freq;
|
|
tick_operations = *ops;
|
|
get_tick_patch();
|
|
}
|
|
|
|
void __init time_init_early(void)
|
|
{
|
|
if (tlb_type == spitfire) {
|
|
if (is_hummingbird()) {
|
|
init_tick_ops(&hbtick_operations);
|
|
clocksource_tick.archdata.vclock_mode = VCLOCK_NONE;
|
|
} else {
|
|
init_tick_ops(&tick_operations);
|
|
clocksource_tick.archdata.vclock_mode = VCLOCK_TICK;
|
|
}
|
|
} else {
|
|
init_tick_ops(&stick_operations);
|
|
clocksource_tick.archdata.vclock_mode = VCLOCK_STICK;
|
|
}
|
|
}
|
|
|
|
void __init time_init(void)
|
|
{
|
|
unsigned long freq;
|
|
|
|
freq = tick_operations.frequency;
|
|
tb_ticks_per_usec = freq / USEC_PER_SEC;
|
|
|
|
clocksource_tick.name = tick_operations.name;
|
|
clocksource_tick.read = clocksource_tick_read;
|
|
|
|
clocksource_register_hz(&clocksource_tick, freq);
|
|
printk("clocksource: mult[%x] shift[%d]\n",
|
|
clocksource_tick.mult, clocksource_tick.shift);
|
|
|
|
sparc64_clockevent.name = tick_operations.name;
|
|
clockevents_calc_mult_shift(&sparc64_clockevent, freq, 4);
|
|
|
|
sparc64_clockevent.max_delta_ns =
|
|
clockevent_delta2ns(0x7fffffffffffffffUL, &sparc64_clockevent);
|
|
sparc64_clockevent.max_delta_ticks = 0x7fffffffffffffffUL;
|
|
sparc64_clockevent.min_delta_ns =
|
|
clockevent_delta2ns(0xF, &sparc64_clockevent);
|
|
sparc64_clockevent.min_delta_ticks = 0xF;
|
|
|
|
printk("clockevent: mult[%x] shift[%d]\n",
|
|
sparc64_clockevent.mult, sparc64_clockevent.shift);
|
|
|
|
setup_sparc64_timer();
|
|
}
|
|
|
|
unsigned long long sched_clock(void)
|
|
{
|
|
unsigned long quotient = tick_operations.ticks_per_nsec_quotient;
|
|
unsigned long offset = tick_operations.offset;
|
|
|
|
/* Use barrier so the compiler emits the loads first and overlaps load
|
|
* latency with reading tick, because reading %tick/%stick is a
|
|
* post-sync instruction that will flush and restart subsequent
|
|
* instructions after it commits.
|
|
*/
|
|
barrier();
|
|
|
|
return ((get_tick() * quotient) >> SPARC64_NSEC_PER_CYC_SHIFT) - offset;
|
|
}
|
|
|
|
int read_current_timer(unsigned long *timer_val)
|
|
{
|
|
*timer_val = get_tick();
|
|
return 0;
|
|
}
|