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040b323b50
Now that the constant divisor optimization is made generic, adapt the ARM case to it. Signed-off-by: Nicolas Pitre <nico@linaro.org>
131 lines
3.1 KiB
C
131 lines
3.1 KiB
C
#ifndef __ASM_ARM_DIV64
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#define __ASM_ARM_DIV64
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#include <linux/types.h>
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#include <asm/compiler.h>
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/*
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* The semantics of __div64_32() are:
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*
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* uint32_t __div64_32(uint64_t *n, uint32_t base)
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* {
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* uint32_t remainder = *n % base;
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* *n = *n / base;
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* return remainder;
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* }
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*
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* In other words, a 64-bit dividend with a 32-bit divisor producing
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* a 64-bit result and a 32-bit remainder. To accomplish this optimally
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* we override the generic version in lib/div64.c to call our __do_div64
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* assembly implementation with completely non standard calling convention
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* for arguments and results (beware).
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*/
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#ifdef __ARMEB__
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#define __xh "r0"
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#define __xl "r1"
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#else
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#define __xl "r0"
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#define __xh "r1"
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#endif
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static inline uint32_t __div64_32(uint64_t *n, uint32_t base)
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{
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register unsigned int __base asm("r4") = base;
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register unsigned long long __n asm("r0") = *n;
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register unsigned long long __res asm("r2");
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register unsigned int __rem asm(__xh);
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asm( __asmeq("%0", __xh)
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__asmeq("%1", "r2")
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__asmeq("%2", "r0")
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__asmeq("%3", "r4")
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"bl __do_div64"
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: "=r" (__rem), "=r" (__res)
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: "r" (__n), "r" (__base)
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: "ip", "lr", "cc");
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*n = __res;
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return __rem;
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}
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#define __div64_32 __div64_32
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#if !defined(CONFIG_AEABI)
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/*
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* In OABI configurations, some uses of the do_div function
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* cause gcc to run out of registers. To work around that,
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* we can force the use of the out-of-line version for
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* configurations that build a OABI kernel.
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*/
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#define do_div(n, base) __div64_32(&(n), base)
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#else
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/*
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* gcc versions earlier than 4.0 are simply too problematic for the
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* __div64_const32() code in asm-generic/div64.h. First there is
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* gcc PR 15089 that tend to trig on more complex constructs, spurious
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* .global __udivsi3 are inserted even if none of those symbols are
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* referenced in the generated code, and those gcc versions are not able
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* to do constant propagation on long long values anyway.
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*/
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#define __div64_const32_is_OK (__GNUC__ >= 4)
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static inline uint64_t __arch_xprod_64(uint64_t m, uint64_t n, bool bias)
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{
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unsigned long long res;
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unsigned int tmp = 0;
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if (!bias) {
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asm ( "umull %Q0, %R0, %Q1, %Q2\n\t"
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"mov %Q0, #0"
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: "=&r" (res)
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: "r" (m), "r" (n)
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: "cc");
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} else if (!(m & ((1ULL << 63) | (1ULL << 31)))) {
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res = m;
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asm ( "umlal %Q0, %R0, %Q1, %Q2\n\t"
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"mov %Q0, #0"
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: "+&r" (res)
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: "r" (m), "r" (n)
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: "cc");
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} else {
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asm ( "umull %Q0, %R0, %Q1, %Q2\n\t"
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"cmn %Q0, %Q1\n\t"
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"adcs %R0, %R0, %R1\n\t"
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"adc %Q0, %3, #0"
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: "=&r" (res)
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: "r" (m), "r" (n), "r" (tmp)
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: "cc");
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}
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if (!(m & ((1ULL << 63) | (1ULL << 31)))) {
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asm ( "umlal %R0, %Q0, %R1, %Q2\n\t"
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"umlal %R0, %Q0, %Q1, %R2\n\t"
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"mov %R0, #0\n\t"
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"umlal %Q0, %R0, %R1, %R2"
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: "+&r" (res)
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: "r" (m), "r" (n)
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: "cc");
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} else {
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asm ( "umlal %R0, %Q0, %R2, %Q3\n\t"
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"umlal %R0, %1, %Q2, %R3\n\t"
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"mov %R0, #0\n\t"
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"adds %Q0, %1, %Q0\n\t"
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"adc %R0, %R0, #0\n\t"
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"umlal %Q0, %R0, %R2, %R3"
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: "+&r" (res), "+&r" (tmp)
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: "r" (m), "r" (n)
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: "cc");
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}
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return res;
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}
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#define __arch_xprod_64 __arch_xprod_64
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#include <asm-generic/div64.h>
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#endif
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#endif
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