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c66d039197
OMAP NAND driver currently supports multiple flavours of 1-bit Hamming ecc-scheme, like: - OMAP_ECC_HAMMING_CODE_DEFAULT 1-bit hamming ecc code using software library - OMAP_ECC_HAMMING_CODE_HW 1-bit hamming ecc-code using GPMC h/w engine - OMAP_ECC_HAMMING_CODE_HW_ROMCODE 1-bit hamming ecc-code using GPMC h/w engin with ecc-layout compatible to ROM code. This patch combines above multiple ecc-schemes into single implementation: - OMAP_ECC_HAM1_CODE_HW 1-bit hamming ecc-code using GPMC h/w engine with ROM-code compatible ecc-layout. Signed-off-by: Pekon Gupta <pekon@ti.com> Reviewed-by: Felipe Balbi <balbi@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Tested-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
93 lines
2.6 KiB
Plaintext
93 lines
2.6 KiB
Plaintext
Device tree bindings for GPMC connected NANDs
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GPMC connected NAND (found on OMAP boards) are represented as child nodes of
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the GPMC controller with a name of "nand".
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All timing relevant properties as well as generic gpmc child properties are
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explained in a separate documents - please refer to
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Documentation/devicetree/bindings/bus/ti-gpmc.txt
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For NAND specific properties such as ECC modes or bus width, please refer to
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Documentation/devicetree/bindings/mtd/nand.txt
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Required properties:
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- reg: The CS line the peripheral is connected to
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Optional properties:
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- nand-bus-width: Set this numeric value to 16 if the hardware
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is wired that way. If not specified, a bus
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width of 8 is assumed.
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- ti,nand-ecc-opt: A string setting the ECC layout to use. One of:
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"sw" <deprecated> use "ham1" instead
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"hw" <deprecated> use "ham1" instead
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"hw-romcode" <deprecated> use "ham1" instead
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"ham1" 1-bit Hamming ecc code
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"bch4" 4-bit BCH ecc code
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"bch8" 8-bit BCH ecc code
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- ti,nand-xfer-type: A string setting the data transfer type. One of:
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"prefetch-polled" Prefetch polled mode (default)
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"polled" Polled mode, without prefetch
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"prefetch-dma" Prefetch enabled sDMA mode
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"prefetch-irq" Prefetch enabled irq mode
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- elm_id: <deprecated> use "ti,elm-id" instead
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- ti,elm-id: Specifies phandle of the ELM devicetree node.
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ELM is an on-chip hardware engine on TI SoC which is used for
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locating ECC errors for BCHx algorithms. SoC devices which have
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ELM hardware engines should specify this device node in .dtsi
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Using ELM for ECC error correction frees some CPU cycles.
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For inline partiton table parsing (optional):
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- #address-cells: should be set to 1
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- #size-cells: should be set to 1
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Example for an AM33xx board:
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gpmc: gpmc@50000000 {
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compatible = "ti,am3352-gpmc";
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ti,hwmods = "gpmc";
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reg = <0x50000000 0x1000000>;
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interrupts = <100>;
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gpmc,num-cs = <8>;
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gpmc,num-waitpins = <2>;
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#address-cells = <2>;
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#size-cells = <1>;
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ranges = <0 0 0x08000000 0x2000>; /* CS0: NAND */
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elm_id = <&elm>;
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nand@0,0 {
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reg = <0 0 0>; /* CS0, offset 0 */
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nand-bus-width = <16>;
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ti,nand-ecc-opt = "bch8";
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ti,nand-xfer-type = "polled";
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gpmc,sync-clk-ps = <0>;
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gpmc,cs-on-ns = <0>;
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gpmc,cs-rd-off-ns = <44>;
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gpmc,cs-wr-off-ns = <44>;
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gpmc,adv-on-ns = <6>;
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gpmc,adv-rd-off-ns = <34>;
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gpmc,adv-wr-off-ns = <44>;
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gpmc,we-off-ns = <40>;
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gpmc,oe-off-ns = <54>;
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gpmc,access-ns = <64>;
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gpmc,rd-cycle-ns = <82>;
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gpmc,wr-cycle-ns = <82>;
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gpmc,wr-access-ns = <40>;
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gpmc,wr-data-mux-bus-ns = <0>;
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#address-cells = <1>;
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#size-cells = <1>;
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/* partitions go here */
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};
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};
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