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65360944c1
clk_prepare_enable() can fail here and we must check its return value. Signed-off-by: Arvind Yadav <arvind.yadav.cs@gmail.com> Reviewed-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
272 lines
7.9 KiB
C
272 lines
7.9 KiB
C
/*
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* This file is provided under a dual BSD/GPLv2 license. When using or
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* redistributing this file, you may do so under either license.
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*
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* GPL LICENSE SUMMARY
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*
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* Copyright (c) 2016 BayLibre, SAS.
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* Author: Neil Armstrong <narmstrong@baylibre.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, see <http://www.gnu.org/licenses/>.
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* The full GNU General Public License is included in this distribution
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* in the file called COPYING.
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*
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* BSD LICENSE
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*
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* Copyright (c) 2016 BayLibre, SAS.
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* Author: Neil Armstrong <narmstrong@baylibre.com>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* * Neither the name of Intel Corporation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <linux/clk.h>
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#include <linux/err.h>
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#include <linux/io.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/platform_device.h>
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#include <linux/slab.h>
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#include <linux/types.h>
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#include <linux/watchdog.h>
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#define DEFAULT_TIMEOUT 30 /* seconds */
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#define GXBB_WDT_CTRL_REG 0x0
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#define GXBB_WDT_TCNT_REG 0x8
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#define GXBB_WDT_RSET_REG 0xc
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#define GXBB_WDT_CTRL_CLKDIV_EN BIT(25)
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#define GXBB_WDT_CTRL_CLK_EN BIT(24)
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#define GXBB_WDT_CTRL_EE_RESET BIT(21)
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#define GXBB_WDT_CTRL_EN BIT(18)
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#define GXBB_WDT_CTRL_DIV_MASK (BIT(18) - 1)
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#define GXBB_WDT_TCNT_SETUP_MASK (BIT(16) - 1)
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#define GXBB_WDT_TCNT_CNT_SHIFT 16
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struct meson_gxbb_wdt {
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void __iomem *reg_base;
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struct watchdog_device wdt_dev;
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struct clk *clk;
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};
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static int meson_gxbb_wdt_start(struct watchdog_device *wdt_dev)
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{
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struct meson_gxbb_wdt *data = watchdog_get_drvdata(wdt_dev);
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writel(readl(data->reg_base + GXBB_WDT_CTRL_REG) | GXBB_WDT_CTRL_EN,
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data->reg_base + GXBB_WDT_CTRL_REG);
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return 0;
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}
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static int meson_gxbb_wdt_stop(struct watchdog_device *wdt_dev)
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{
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struct meson_gxbb_wdt *data = watchdog_get_drvdata(wdt_dev);
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writel(readl(data->reg_base + GXBB_WDT_CTRL_REG) & ~GXBB_WDT_CTRL_EN,
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data->reg_base + GXBB_WDT_CTRL_REG);
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return 0;
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}
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static int meson_gxbb_wdt_ping(struct watchdog_device *wdt_dev)
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{
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struct meson_gxbb_wdt *data = watchdog_get_drvdata(wdt_dev);
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writel(0, data->reg_base + GXBB_WDT_RSET_REG);
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return 0;
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}
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static int meson_gxbb_wdt_set_timeout(struct watchdog_device *wdt_dev,
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unsigned int timeout)
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{
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struct meson_gxbb_wdt *data = watchdog_get_drvdata(wdt_dev);
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unsigned long tcnt = timeout * 1000;
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if (tcnt > GXBB_WDT_TCNT_SETUP_MASK)
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tcnt = GXBB_WDT_TCNT_SETUP_MASK;
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wdt_dev->timeout = timeout;
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meson_gxbb_wdt_ping(wdt_dev);
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writel(tcnt, data->reg_base + GXBB_WDT_TCNT_REG);
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return 0;
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}
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static unsigned int meson_gxbb_wdt_get_timeleft(struct watchdog_device *wdt_dev)
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{
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struct meson_gxbb_wdt *data = watchdog_get_drvdata(wdt_dev);
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unsigned long reg;
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reg = readl(data->reg_base + GXBB_WDT_TCNT_REG);
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return ((reg >> GXBB_WDT_TCNT_CNT_SHIFT) -
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(reg & GXBB_WDT_TCNT_SETUP_MASK)) / 1000;
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}
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static const struct watchdog_ops meson_gxbb_wdt_ops = {
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.start = meson_gxbb_wdt_start,
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.stop = meson_gxbb_wdt_stop,
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.ping = meson_gxbb_wdt_ping,
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.set_timeout = meson_gxbb_wdt_set_timeout,
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.get_timeleft = meson_gxbb_wdt_get_timeleft,
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};
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static const struct watchdog_info meson_gxbb_wdt_info = {
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.identity = "Meson GXBB Watchdog",
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.options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING | WDIOF_MAGICCLOSE,
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};
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static int __maybe_unused meson_gxbb_wdt_resume(struct device *dev)
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{
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struct meson_gxbb_wdt *data = dev_get_drvdata(dev);
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if (watchdog_active(&data->wdt_dev))
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meson_gxbb_wdt_start(&data->wdt_dev);
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return 0;
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}
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static int __maybe_unused meson_gxbb_wdt_suspend(struct device *dev)
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{
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struct meson_gxbb_wdt *data = dev_get_drvdata(dev);
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if (watchdog_active(&data->wdt_dev))
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meson_gxbb_wdt_stop(&data->wdt_dev);
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return 0;
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}
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static const struct dev_pm_ops meson_gxbb_wdt_pm_ops = {
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SET_SYSTEM_SLEEP_PM_OPS(meson_gxbb_wdt_suspend, meson_gxbb_wdt_resume)
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};
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static const struct of_device_id meson_gxbb_wdt_dt_ids[] = {
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{ .compatible = "amlogic,meson-gxbb-wdt", },
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{ /* sentinel */ },
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};
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MODULE_DEVICE_TABLE(of, meson_gxbb_wdt_dt_ids);
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static int meson_gxbb_wdt_probe(struct platform_device *pdev)
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{
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struct meson_gxbb_wdt *data;
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struct resource *res;
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int ret;
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data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL);
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if (!data)
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return -ENOMEM;
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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data->reg_base = devm_ioremap_resource(&pdev->dev, res);
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if (IS_ERR(data->reg_base))
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return PTR_ERR(data->reg_base);
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data->clk = devm_clk_get(&pdev->dev, NULL);
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if (IS_ERR(data->clk))
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return PTR_ERR(data->clk);
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ret = clk_prepare_enable(data->clk);
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if (ret)
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return ret;
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platform_set_drvdata(pdev, data);
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data->wdt_dev.parent = &pdev->dev;
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data->wdt_dev.info = &meson_gxbb_wdt_info;
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data->wdt_dev.ops = &meson_gxbb_wdt_ops;
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data->wdt_dev.max_hw_heartbeat_ms = GXBB_WDT_TCNT_SETUP_MASK;
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data->wdt_dev.min_timeout = 1;
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data->wdt_dev.timeout = DEFAULT_TIMEOUT;
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watchdog_set_drvdata(&data->wdt_dev, data);
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/* Setup with 1ms timebase */
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writel(((clk_get_rate(data->clk) / 1000) & GXBB_WDT_CTRL_DIV_MASK) |
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GXBB_WDT_CTRL_EE_RESET |
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GXBB_WDT_CTRL_CLK_EN |
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GXBB_WDT_CTRL_CLKDIV_EN,
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data->reg_base + GXBB_WDT_CTRL_REG);
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meson_gxbb_wdt_set_timeout(&data->wdt_dev, data->wdt_dev.timeout);
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ret = watchdog_register_device(&data->wdt_dev);
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if (ret) {
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clk_disable_unprepare(data->clk);
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return ret;
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}
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return 0;
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}
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static int meson_gxbb_wdt_remove(struct platform_device *pdev)
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{
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struct meson_gxbb_wdt *data = platform_get_drvdata(pdev);
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watchdog_unregister_device(&data->wdt_dev);
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clk_disable_unprepare(data->clk);
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return 0;
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}
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static void meson_gxbb_wdt_shutdown(struct platform_device *pdev)
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{
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struct meson_gxbb_wdt *data = platform_get_drvdata(pdev);
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meson_gxbb_wdt_stop(&data->wdt_dev);
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}
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static struct platform_driver meson_gxbb_wdt_driver = {
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.probe = meson_gxbb_wdt_probe,
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.remove = meson_gxbb_wdt_remove,
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.shutdown = meson_gxbb_wdt_shutdown,
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.driver = {
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.name = "meson-gxbb-wdt",
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.pm = &meson_gxbb_wdt_pm_ops,
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.of_match_table = meson_gxbb_wdt_dt_ids,
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},
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};
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module_platform_driver(meson_gxbb_wdt_driver);
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MODULE_AUTHOR("Neil Armstrong <narmstrong@baylibre.com>");
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MODULE_DESCRIPTION("Amlogic Meson GXBB Watchdog timer driver");
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MODULE_LICENSE("Dual BSD/GPL");
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