Sakari Ailus 585e17c984 media: ccs: Add support for lane speed model ... Convey the relevant PLL flags to the PLL calculator. Also the lane speed model affects how the link rate is calculated on the CSI-2 bus, as the rate is total of all lanes. Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com> Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>		2020-12-07 15:53:05 +01:00
..
ccs-core.c	media: ccs: Add support for lane speed model	2020-12-07 15:53:05 +01:00
ccs-data-defs.h	media: ccs: Add CCS static data parser library	2020-12-03 12:27:28 +01:00
ccs-data.c	media: ccs: Add CCS static data parser library	2020-12-03 12:27:28 +01:00
ccs-data.h	media: ccs: Add CCS static data parser library	2020-12-03 12:27:28 +01:00
ccs-limits.c
ccs-limits.h
ccs-quirk.c	media: ccs: Change my e-mail address	2020-12-03 12:27:31 +01:00
ccs-quirk.h	media: ccs: Change my e-mail address	2020-12-03 12:27:31 +01:00
ccs-reg-access.c	media: ccs: Use static data read-only registers	2020-12-03 12:27:32 +01:00
ccs-reg-access.h	media: ccs: Add support for manufacturer regs from sensor and module files	2020-12-03 12:27:32 +01:00
ccs-regs.h
ccs.h	media: ccs: Use all regulators	2020-12-03 12:27:32 +01:00
Kconfig	media: smiapp-pll: Rename as ccs-pll	2020-12-03 12:27:31 +01:00
Makefile	media: ccs: Add CCS static data parser library	2020-12-03 12:27:28 +01:00
smiapp-reg-defs.h