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c7212b7136
Allow to set wl_active_time and wl_qc_time for SOC chips, also adjust bt_time_extend and bt_first_slot_time. Signed-off-by: Miaoqing Pan <miaoqing@codeaurora.org> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
140 lines
3.8 KiB
C
140 lines
3.8 KiB
C
/*
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* Copyright (c) 2009-2011 Atheros Communications Inc.
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*
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* Permission to use, copy, modify, and/or distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*/
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#ifndef BTCOEX_H
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#define BTCOEX_H
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#include "hw.h"
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#define ATH_WLANACTIVE_GPIO_9280 5
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#define ATH_BTACTIVE_GPIO_9280 6
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#define ATH_BTPRIORITY_GPIO_9285 7
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#define ATH_WLANACTIVE_GPIO_9300 5
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#define ATH_BTACTIVE_GPIO_9300 4
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#define ATH_BTPRIORITY_GPIO_9300 8
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#define ATH_BTCOEX_DEF_BT_PERIOD 45
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#define ATH_BTCOEX_DEF_DUTY_CYCLE 55
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#define ATH_BTCOEX_BTSCAN_DUTY_CYCLE 90
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#define ATH_BTCOEX_BMISS_THRESH 50
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#define ATH_BT_PRIORITY_TIME_THRESHOLD 1000 /* ms */
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#define ATH_BT_CNT_THRESHOLD 3
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#define ATH_BT_CNT_SCAN_THRESHOLD 15
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#define ATH_BTCOEX_RX_WAIT_TIME 100
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#define ATH_BTCOEX_STOMP_FTP_THRESH 5
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#define ATH_BTCOEX_HT20_MAX_TXPOWER 0x14
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#define ATH_BTCOEX_HT40_MAX_TXPOWER 0x10
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#define AR9300_NUM_BT_WEIGHTS 4
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#define AR9300_NUM_WLAN_WEIGHTS 4
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#define ATH_AIC_MAX_BT_CHANNEL 79
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/* Defines the BT AR_BT_COEX_WGHT used */
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enum ath_stomp_type {
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ATH_BTCOEX_STOMP_ALL,
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ATH_BTCOEX_STOMP_LOW,
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ATH_BTCOEX_STOMP_NONE,
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ATH_BTCOEX_STOMP_LOW_FTP,
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ATH_BTCOEX_STOMP_AUDIO,
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ATH_BTCOEX_STOMP_MAX
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};
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enum ath_btcoex_scheme {
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ATH_BTCOEX_CFG_NONE,
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ATH_BTCOEX_CFG_2WIRE,
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ATH_BTCOEX_CFG_3WIRE,
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ATH_BTCOEX_CFG_MCI,
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};
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struct ath9k_hw_mci {
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u32 raw_intr;
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u32 rx_msg_intr;
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u32 cont_status;
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u32 gpm_addr;
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u32 gpm_len;
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u32 gpm_idx;
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u32 sched_addr;
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u32 wlan_channels[4];
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u32 wlan_cal_seq;
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u32 wlan_cal_done;
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u32 config;
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u8 *gpm_buf;
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bool ready;
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bool update_2g5g;
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bool is_2g;
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bool query_bt;
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bool unhalt_bt_gpm; /* need send UNHALT */
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bool halted_bt_gpm; /* HALT sent */
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bool need_flush_btinfo;
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bool bt_version_known;
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bool wlan_channels_update;
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u8 wlan_ver_major;
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u8 wlan_ver_minor;
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u8 bt_ver_major;
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u8 bt_ver_minor;
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u8 bt_state;
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u8 stomp_ftp;
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bool concur_tx;
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u32 last_recovery;
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};
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struct ath9k_hw_aic {
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bool aic_enabled;
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u8 aic_cal_state;
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u8 aic_caled_chan;
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u32 aic_sram[ATH_AIC_MAX_BT_CHANNEL];
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u32 aic_cal_start_time;
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};
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struct ath_btcoex_hw {
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enum ath_btcoex_scheme scheme;
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struct ath9k_hw_mci mci;
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struct ath9k_hw_aic aic;
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bool enabled;
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u8 wlanactive_gpio;
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u8 btactive_gpio;
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u8 btpriority_gpio;
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u32 bt_coex_mode; /* Register setting for AR_BT_COEX_MODE */
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u32 bt_coex_weights; /* Register setting for AR_BT_COEX_WEIGHT */
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u32 bt_coex_mode2; /* Register setting for AR_BT_COEX_MODE2 */
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u32 bt_coex_mode3; /* Register setting for AR_BT_COEX_MODE3 */
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u32 bt_weight[AR9300_NUM_BT_WEIGHTS];
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u32 wlan_weight[AR9300_NUM_WLAN_WEIGHTS];
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u8 tx_prio[ATH_BTCOEX_STOMP_MAX];
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};
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void ath9k_hw_btcoex_init_scheme(struct ath_hw *ah);
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void ath9k_hw_btcoex_init_2wire(struct ath_hw *ah);
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void ath9k_hw_btcoex_init_3wire(struct ath_hw *ah);
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void ath9k_hw_btcoex_deinit(struct ath_hw *ah);
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void ath9k_hw_btcoex_init_mci(struct ath_hw *ah);
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void ath9k_hw_init_btcoex_hw(struct ath_hw *ah, int qnum);
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void ath9k_hw_btcoex_set_weight(struct ath_hw *ah,
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u32 bt_weight,
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u32 wlan_weight,
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enum ath_stomp_type stomp_type);
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void ath9k_hw_btcoex_disable(struct ath_hw *ah);
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void ath9k_hw_btcoex_bt_stomp(struct ath_hw *ah,
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enum ath_stomp_type stomp_type);
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void ath9k_hw_btcoex_set_concur_txprio(struct ath_hw *ah, u8 *stomp_txprio);
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#endif
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