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176d138811
To provide option for selecting different bit-per-sample than just the maximum one, use the new format calculation mechanism. Acked-by: Mark Brown <broonie@kernel.org> Signed-off-by: Cezary Rojewski <cezary.rojewski@intel.com> Acked-by: Jaroslav Kysela <perex@perex.cz> Link: https://lore.kernel.org/r/20231117120610.1755254-13-cezary.rojewski@intel.com Signed-off-by: Takashi Iwai <tiwai@suse.de>
663 lines
19 KiB
C
663 lines
19 KiB
C
// SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
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//
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// This file is provided under a dual BSD/GPLv2 license. When using or
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// redistributing this file, you may do so under either license.
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//
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// Copyright(c) 2022 Intel Corporation. All rights reserved.
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#include <sound/pcm_params.h>
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#include <sound/hdaudio_ext.h>
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#include <sound/hda-mlink.h>
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#include <sound/sof/ipc4/header.h>
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#include <uapi/sound/sof/header.h>
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#include "../ipc4-priv.h"
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#include "../ipc4-topology.h"
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#include "../sof-priv.h"
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#include "../sof-audio.h"
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#include "hda.h"
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/* These ops are only applicable for the HDA DAI's in their current form */
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#if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA_LINK)
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/*
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* This function checks if the host dma channel corresponding
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* to the link DMA stream_tag argument is assigned to one
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* of the FEs connected to the BE DAI.
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*/
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static bool hda_check_fes(struct snd_soc_pcm_runtime *rtd,
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int dir, int stream_tag)
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{
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struct snd_pcm_substream *fe_substream;
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struct hdac_stream *fe_hstream;
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struct snd_soc_dpcm *dpcm;
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for_each_dpcm_fe(rtd, dir, dpcm) {
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fe_substream = snd_soc_dpcm_get_substream(dpcm->fe, dir);
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fe_hstream = fe_substream->runtime->private_data;
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if (fe_hstream->stream_tag == stream_tag)
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return true;
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}
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return false;
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}
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static struct hdac_ext_stream *
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hda_link_stream_assign(struct hdac_bus *bus, struct snd_pcm_substream *substream)
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{
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struct snd_soc_pcm_runtime *rtd = snd_soc_substream_to_rtd(substream);
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struct sof_intel_hda_stream *hda_stream;
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const struct sof_intel_dsp_desc *chip;
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struct snd_sof_dev *sdev;
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struct hdac_ext_stream *res = NULL;
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struct hdac_stream *hstream = NULL;
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int stream_dir = substream->stream;
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if (!bus->ppcap) {
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dev_err(bus->dev, "stream type not supported\n");
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return NULL;
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}
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spin_lock_irq(&bus->reg_lock);
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list_for_each_entry(hstream, &bus->stream_list, list) {
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struct hdac_ext_stream *hext_stream =
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stream_to_hdac_ext_stream(hstream);
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if (hstream->direction != substream->stream)
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continue;
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hda_stream = hstream_to_sof_hda_stream(hext_stream);
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sdev = hda_stream->sdev;
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chip = get_chip_info(sdev->pdata);
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/* check if link is available */
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if (!hext_stream->link_locked) {
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/*
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* choose the first available link for platforms that do not have the
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* PROCEN_FMT_QUIRK set.
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*/
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if (!(chip->quirks & SOF_INTEL_PROCEN_FMT_QUIRK)) {
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res = hext_stream;
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break;
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}
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if (hstream->opened) {
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/*
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* check if the stream tag matches the stream
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* tag of one of the connected FEs
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*/
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if (hda_check_fes(rtd, stream_dir,
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hstream->stream_tag)) {
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res = hext_stream;
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break;
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}
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} else {
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res = hext_stream;
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/*
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* This must be a hostless stream.
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* So reserve the host DMA channel.
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*/
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hda_stream->host_reserved = 1;
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break;
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}
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}
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}
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if (res) {
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/* Make sure that host and link DMA is decoupled. */
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snd_hdac_ext_stream_decouple_locked(bus, res, true);
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res->link_locked = 1;
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res->link_substream = substream;
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}
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spin_unlock_irq(&bus->reg_lock);
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return res;
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}
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static struct hdac_ext_stream *hda_get_hext_stream(struct snd_sof_dev *sdev,
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struct snd_soc_dai *cpu_dai,
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struct snd_pcm_substream *substream)
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{
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return snd_soc_dai_get_dma_data(cpu_dai, substream);
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}
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static struct hdac_ext_stream *hda_ipc4_get_hext_stream(struct snd_sof_dev *sdev,
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struct snd_soc_dai *cpu_dai,
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struct snd_pcm_substream *substream)
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{
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struct snd_sof_widget *pipe_widget;
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struct sof_ipc4_pipeline *pipeline;
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struct snd_sof_widget *swidget;
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struct snd_soc_dapm_widget *w;
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w = snd_soc_dai_get_widget(cpu_dai, substream->stream);
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swidget = w->dobj.private;
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pipe_widget = swidget->spipe->pipe_widget;
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pipeline = pipe_widget->private;
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/* mark pipeline so that it can be skipped during FE trigger */
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pipeline->skip_during_fe_trigger = true;
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return snd_soc_dai_get_dma_data(cpu_dai, substream);
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}
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static struct hdac_ext_stream *hda_assign_hext_stream(struct snd_sof_dev *sdev,
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struct snd_soc_dai *cpu_dai,
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struct snd_pcm_substream *substream)
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{
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struct snd_soc_pcm_runtime *rtd = snd_soc_substream_to_rtd(substream);
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struct snd_soc_dai *dai;
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struct hdac_ext_stream *hext_stream;
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/* only allocate a stream_tag for the first DAI in the dailink */
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dai = snd_soc_rtd_to_cpu(rtd, 0);
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if (dai == cpu_dai)
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hext_stream = hda_link_stream_assign(sof_to_bus(sdev), substream);
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else
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hext_stream = snd_soc_dai_get_dma_data(dai, substream);
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if (!hext_stream)
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return NULL;
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snd_soc_dai_set_dma_data(cpu_dai, substream, (void *)hext_stream);
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return hext_stream;
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}
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static void hda_release_hext_stream(struct snd_sof_dev *sdev, struct snd_soc_dai *cpu_dai,
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struct snd_pcm_substream *substream)
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{
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struct hdac_ext_stream *hext_stream = hda_get_hext_stream(sdev, cpu_dai, substream);
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struct snd_soc_pcm_runtime *rtd = snd_soc_substream_to_rtd(substream);
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struct snd_soc_dai *dai;
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/* only release a stream_tag for the first DAI in the dailink */
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dai = snd_soc_rtd_to_cpu(rtd, 0);
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if (dai == cpu_dai)
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snd_hdac_ext_stream_release(hext_stream, HDAC_EXT_STREAM_TYPE_LINK);
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snd_soc_dai_set_dma_data(cpu_dai, substream, NULL);
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}
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static void hda_setup_hext_stream(struct snd_sof_dev *sdev, struct hdac_ext_stream *hext_stream,
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unsigned int format_val)
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{
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snd_hdac_ext_stream_setup(hext_stream, format_val);
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}
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static void hda_reset_hext_stream(struct snd_sof_dev *sdev, struct hdac_ext_stream *hext_stream)
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{
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snd_hdac_ext_stream_reset(hext_stream);
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}
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static void hda_codec_dai_set_stream(struct snd_sof_dev *sdev,
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struct snd_pcm_substream *substream,
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struct hdac_stream *hstream)
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{
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struct snd_soc_pcm_runtime *rtd = snd_soc_substream_to_rtd(substream);
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struct snd_soc_dai *codec_dai = snd_soc_rtd_to_codec(rtd, 0);
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/* set the hdac_stream in the codec dai */
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snd_soc_dai_set_stream(codec_dai, hstream, substream->stream);
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}
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static unsigned int hda_calc_stream_format(struct snd_sof_dev *sdev,
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struct snd_pcm_substream *substream,
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struct snd_pcm_hw_params *params)
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{
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struct snd_soc_pcm_runtime *rtd = snd_soc_substream_to_rtd(substream);
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struct snd_soc_dai *codec_dai = snd_soc_rtd_to_codec(rtd, 0);
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unsigned int link_bps;
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unsigned int format_val;
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unsigned int bits;
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if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
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link_bps = codec_dai->driver->playback.sig_bits;
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else
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link_bps = codec_dai->driver->capture.sig_bits;
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bits = snd_hdac_stream_format_bits(params_format(params), SNDRV_PCM_SUBFORMAT_STD,
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link_bps);
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format_val = snd_hdac_stream_format(params_channels(params), bits, params_rate(params));
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dev_dbg(sdev->dev, "format_val=%#x, rate=%d, ch=%d, format=%d\n", format_val,
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params_rate(params), params_channels(params), params_format(params));
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return format_val;
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}
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static struct hdac_ext_link *hda_get_hlink(struct snd_sof_dev *sdev,
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struct snd_pcm_substream *substream)
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{
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struct snd_soc_pcm_runtime *rtd = snd_soc_substream_to_rtd(substream);
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struct snd_soc_dai *codec_dai = snd_soc_rtd_to_codec(rtd, 0);
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struct hdac_bus *bus = sof_to_bus(sdev);
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return snd_hdac_ext_bus_get_hlink_by_name(bus, codec_dai->component->name);
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}
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static unsigned int generic_calc_stream_format(struct snd_sof_dev *sdev,
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struct snd_pcm_substream *substream,
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struct snd_pcm_hw_params *params)
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{
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unsigned int format_val;
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unsigned int bits;
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bits = snd_hdac_stream_format_bits(params_format(params), SNDRV_PCM_SUBFORMAT_STD,
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params_physical_width(params));
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format_val = snd_hdac_stream_format(params_channels(params), bits, params_rate(params));
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dev_dbg(sdev->dev, "format_val=%#x, rate=%d, ch=%d, format=%d\n", format_val,
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params_rate(params), params_channels(params), params_format(params));
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return format_val;
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}
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static unsigned int dmic_calc_stream_format(struct snd_sof_dev *sdev,
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struct snd_pcm_substream *substream,
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struct snd_pcm_hw_params *params)
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{
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unsigned int format_val;
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snd_pcm_format_t format;
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unsigned int channels;
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unsigned int width;
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unsigned int bits;
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channels = params_channels(params);
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format = params_format(params);
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width = params_physical_width(params);
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if (format == SNDRV_PCM_FORMAT_S16_LE) {
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format = SNDRV_PCM_FORMAT_S32_LE;
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channels /= 2;
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width = 32;
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}
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bits = snd_hdac_stream_format_bits(format, SNDRV_PCM_SUBFORMAT_STD, width);
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format_val = snd_hdac_stream_format(channels, bits, params_rate(params));
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dev_dbg(sdev->dev, "format_val=%#x, rate=%d, ch=%d, format=%d\n", format_val,
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params_rate(params), channels, format);
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return format_val;
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}
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static struct hdac_ext_link *ssp_get_hlink(struct snd_sof_dev *sdev,
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struct snd_pcm_substream *substream)
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{
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struct hdac_bus *bus = sof_to_bus(sdev);
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return hdac_bus_eml_ssp_get_hlink(bus);
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}
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static struct hdac_ext_link *dmic_get_hlink(struct snd_sof_dev *sdev,
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struct snd_pcm_substream *substream)
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{
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struct hdac_bus *bus = sof_to_bus(sdev);
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return hdac_bus_eml_dmic_get_hlink(bus);
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}
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static struct hdac_ext_link *sdw_get_hlink(struct snd_sof_dev *sdev,
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struct snd_pcm_substream *substream)
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{
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struct hdac_bus *bus = sof_to_bus(sdev);
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return hdac_bus_eml_sdw_get_hlink(bus);
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}
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static int hda_ipc4_pre_trigger(struct snd_sof_dev *sdev, struct snd_soc_dai *cpu_dai,
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struct snd_pcm_substream *substream, int cmd)
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{
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struct sof_ipc4_fw_data *ipc4_data = sdev->private;
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struct snd_sof_widget *pipe_widget;
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struct sof_ipc4_pipeline *pipeline;
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struct snd_sof_widget *swidget;
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struct snd_soc_dapm_widget *w;
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int ret = 0;
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w = snd_soc_dai_get_widget(cpu_dai, substream->stream);
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swidget = w->dobj.private;
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pipe_widget = swidget->spipe->pipe_widget;
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pipeline = pipe_widget->private;
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if (pipe_widget->instance_id < 0)
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return 0;
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mutex_lock(&ipc4_data->pipeline_state_mutex);
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switch (cmd) {
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case SNDRV_PCM_TRIGGER_START:
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case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
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break;
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case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
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case SNDRV_PCM_TRIGGER_SUSPEND:
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case SNDRV_PCM_TRIGGER_STOP:
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ret = sof_ipc4_set_pipeline_state(sdev, pipe_widget->instance_id,
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SOF_IPC4_PIPE_PAUSED);
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if (ret < 0)
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goto out;
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pipeline->state = SOF_IPC4_PIPE_PAUSED;
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break;
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default:
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dev_err(sdev->dev, "unknown trigger command %d\n", cmd);
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ret = -EINVAL;
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}
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out:
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mutex_unlock(&ipc4_data->pipeline_state_mutex);
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return ret;
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}
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static int hda_trigger(struct snd_sof_dev *sdev, struct snd_soc_dai *cpu_dai,
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struct snd_pcm_substream *substream, int cmd)
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{
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struct hdac_ext_stream *hext_stream = snd_soc_dai_get_dma_data(cpu_dai, substream);
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switch (cmd) {
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case SNDRV_PCM_TRIGGER_START:
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case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
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snd_hdac_ext_stream_start(hext_stream);
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break;
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case SNDRV_PCM_TRIGGER_SUSPEND:
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case SNDRV_PCM_TRIGGER_STOP:
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case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
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snd_hdac_ext_stream_clear(hext_stream);
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break;
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default:
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dev_err(sdev->dev, "unknown trigger command %d\n", cmd);
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return -EINVAL;
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}
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return 0;
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}
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static int hda_ipc4_post_trigger(struct snd_sof_dev *sdev, struct snd_soc_dai *cpu_dai,
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struct snd_pcm_substream *substream, int cmd)
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{
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struct sof_ipc4_fw_data *ipc4_data = sdev->private;
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struct snd_sof_widget *pipe_widget;
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struct sof_ipc4_pipeline *pipeline;
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struct snd_sof_widget *swidget;
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struct snd_soc_dapm_widget *w;
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int ret = 0;
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w = snd_soc_dai_get_widget(cpu_dai, substream->stream);
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swidget = w->dobj.private;
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pipe_widget = swidget->spipe->pipe_widget;
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pipeline = pipe_widget->private;
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if (pipe_widget->instance_id < 0)
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return 0;
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mutex_lock(&ipc4_data->pipeline_state_mutex);
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switch (cmd) {
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case SNDRV_PCM_TRIGGER_START:
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if (pipeline->state != SOF_IPC4_PIPE_PAUSED) {
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ret = sof_ipc4_set_pipeline_state(sdev, pipe_widget->instance_id,
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SOF_IPC4_PIPE_PAUSED);
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if (ret < 0)
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goto out;
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pipeline->state = SOF_IPC4_PIPE_PAUSED;
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}
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ret = sof_ipc4_set_pipeline_state(sdev, pipe_widget->instance_id,
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SOF_IPC4_PIPE_RUNNING);
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if (ret < 0)
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goto out;
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pipeline->state = SOF_IPC4_PIPE_RUNNING;
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swidget->spipe->started_count++;
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break;
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case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
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ret = sof_ipc4_set_pipeline_state(sdev, pipe_widget->instance_id,
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SOF_IPC4_PIPE_RUNNING);
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if (ret < 0)
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goto out;
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pipeline->state = SOF_IPC4_PIPE_RUNNING;
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break;
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case SNDRV_PCM_TRIGGER_SUSPEND:
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case SNDRV_PCM_TRIGGER_STOP:
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/*
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* STOP/SUSPEND trigger is invoked only once when all users of this pipeline have
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* been stopped. So, clear the started_count so that the pipeline can be reset
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*/
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swidget->spipe->started_count = 0;
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break;
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case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
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break;
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default:
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dev_err(sdev->dev, "unknown trigger command %d\n", cmd);
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ret = -EINVAL;
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break;
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}
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out:
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mutex_unlock(&ipc4_data->pipeline_state_mutex);
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return ret;
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}
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static struct hdac_ext_stream *sdw_hda_ipc4_get_hext_stream(struct snd_sof_dev *sdev,
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struct snd_soc_dai *cpu_dai,
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struct snd_pcm_substream *substream)
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{
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struct snd_soc_dapm_widget *w = snd_soc_dai_get_widget(cpu_dai, substream->stream);
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struct snd_sof_widget *swidget = w->dobj.private;
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struct snd_sof_dai *dai = swidget->private;
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struct sof_ipc4_copier *ipc4_copier = dai->private;
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struct sof_ipc4_alh_configuration_blob *blob;
|
|
|
|
blob = (struct sof_ipc4_alh_configuration_blob *)ipc4_copier->copier_config;
|
|
|
|
/*
|
|
* Starting with ACE_2_0, re-setting the device_count is mandatory to avoid using
|
|
* the multi-gateway firmware configuration. The DMA hardware can take care of
|
|
* multiple links without needing any firmware assistance
|
|
*/
|
|
blob->alh_cfg.device_count = 1;
|
|
|
|
return hda_ipc4_get_hext_stream(sdev, cpu_dai, substream);
|
|
}
|
|
|
|
static const struct hda_dai_widget_dma_ops hda_ipc4_dma_ops = {
|
|
.get_hext_stream = hda_ipc4_get_hext_stream,
|
|
.assign_hext_stream = hda_assign_hext_stream,
|
|
.release_hext_stream = hda_release_hext_stream,
|
|
.setup_hext_stream = hda_setup_hext_stream,
|
|
.reset_hext_stream = hda_reset_hext_stream,
|
|
.pre_trigger = hda_ipc4_pre_trigger,
|
|
.trigger = hda_trigger,
|
|
.post_trigger = hda_ipc4_post_trigger,
|
|
.codec_dai_set_stream = hda_codec_dai_set_stream,
|
|
.calc_stream_format = hda_calc_stream_format,
|
|
.get_hlink = hda_get_hlink,
|
|
};
|
|
|
|
static const struct hda_dai_widget_dma_ops ssp_ipc4_dma_ops = {
|
|
.get_hext_stream = hda_ipc4_get_hext_stream,
|
|
.assign_hext_stream = hda_assign_hext_stream,
|
|
.release_hext_stream = hda_release_hext_stream,
|
|
.setup_hext_stream = hda_setup_hext_stream,
|
|
.reset_hext_stream = hda_reset_hext_stream,
|
|
.pre_trigger = hda_ipc4_pre_trigger,
|
|
.trigger = hda_trigger,
|
|
.post_trigger = hda_ipc4_post_trigger,
|
|
.calc_stream_format = generic_calc_stream_format,
|
|
.get_hlink = ssp_get_hlink,
|
|
};
|
|
|
|
static const struct hda_dai_widget_dma_ops dmic_ipc4_dma_ops = {
|
|
.get_hext_stream = hda_ipc4_get_hext_stream,
|
|
.assign_hext_stream = hda_assign_hext_stream,
|
|
.release_hext_stream = hda_release_hext_stream,
|
|
.setup_hext_stream = hda_setup_hext_stream,
|
|
.reset_hext_stream = hda_reset_hext_stream,
|
|
.pre_trigger = hda_ipc4_pre_trigger,
|
|
.trigger = hda_trigger,
|
|
.post_trigger = hda_ipc4_post_trigger,
|
|
.calc_stream_format = dmic_calc_stream_format,
|
|
.get_hlink = dmic_get_hlink,
|
|
};
|
|
|
|
static const struct hda_dai_widget_dma_ops sdw_ipc4_dma_ops = {
|
|
.get_hext_stream = sdw_hda_ipc4_get_hext_stream,
|
|
.assign_hext_stream = hda_assign_hext_stream,
|
|
.release_hext_stream = hda_release_hext_stream,
|
|
.setup_hext_stream = hda_setup_hext_stream,
|
|
.reset_hext_stream = hda_reset_hext_stream,
|
|
.pre_trigger = hda_ipc4_pre_trigger,
|
|
.trigger = hda_trigger,
|
|
.post_trigger = hda_ipc4_post_trigger,
|
|
.calc_stream_format = generic_calc_stream_format,
|
|
.get_hlink = sdw_get_hlink,
|
|
};
|
|
|
|
static const struct hda_dai_widget_dma_ops hda_ipc4_chain_dma_ops = {
|
|
.get_hext_stream = hda_get_hext_stream,
|
|
.assign_hext_stream = hda_assign_hext_stream,
|
|
.release_hext_stream = hda_release_hext_stream,
|
|
.setup_hext_stream = hda_setup_hext_stream,
|
|
.reset_hext_stream = hda_reset_hext_stream,
|
|
.trigger = hda_trigger,
|
|
.codec_dai_set_stream = hda_codec_dai_set_stream,
|
|
.calc_stream_format = hda_calc_stream_format,
|
|
.get_hlink = hda_get_hlink,
|
|
};
|
|
|
|
static int hda_ipc3_post_trigger(struct snd_sof_dev *sdev, struct snd_soc_dai *cpu_dai,
|
|
struct snd_pcm_substream *substream, int cmd)
|
|
{
|
|
struct hdac_ext_stream *hext_stream = hda_get_hext_stream(sdev, cpu_dai, substream);
|
|
struct snd_soc_dapm_widget *w = snd_soc_dai_get_widget(cpu_dai, substream->stream);
|
|
|
|
switch (cmd) {
|
|
case SNDRV_PCM_TRIGGER_SUSPEND:
|
|
case SNDRV_PCM_TRIGGER_STOP:
|
|
{
|
|
struct snd_sof_dai_config_data data = { 0 };
|
|
int ret;
|
|
|
|
data.dai_data = DMA_CHAN_INVALID;
|
|
ret = hda_dai_config(w, SOF_DAI_CONFIG_FLAGS_HW_FREE, &data);
|
|
if (ret < 0)
|
|
return ret;
|
|
|
|
if (cmd == SNDRV_PCM_TRIGGER_STOP)
|
|
return hda_link_dma_cleanup(substream, hext_stream, cpu_dai);
|
|
|
|
break;
|
|
}
|
|
case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
|
|
return hda_dai_config(w, SOF_DAI_CONFIG_FLAGS_PAUSE, NULL);
|
|
default:
|
|
break;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static const struct hda_dai_widget_dma_ops hda_ipc3_dma_ops = {
|
|
.get_hext_stream = hda_get_hext_stream,
|
|
.assign_hext_stream = hda_assign_hext_stream,
|
|
.release_hext_stream = hda_release_hext_stream,
|
|
.setup_hext_stream = hda_setup_hext_stream,
|
|
.reset_hext_stream = hda_reset_hext_stream,
|
|
.trigger = hda_trigger,
|
|
.post_trigger = hda_ipc3_post_trigger,
|
|
.codec_dai_set_stream = hda_codec_dai_set_stream,
|
|
.calc_stream_format = hda_calc_stream_format,
|
|
.get_hlink = hda_get_hlink,
|
|
};
|
|
|
|
static struct hdac_ext_stream *
|
|
hda_dspless_get_hext_stream(struct snd_sof_dev *sdev, struct snd_soc_dai *cpu_dai,
|
|
struct snd_pcm_substream *substream)
|
|
{
|
|
struct hdac_stream *hstream = substream->runtime->private_data;
|
|
|
|
return stream_to_hdac_ext_stream(hstream);
|
|
}
|
|
|
|
static void hda_dspless_setup_hext_stream(struct snd_sof_dev *sdev,
|
|
struct hdac_ext_stream *hext_stream,
|
|
unsigned int format_val)
|
|
{
|
|
/*
|
|
* Save the format_val which was adjusted by the maxbps of the codec.
|
|
* This information is not available on the FE side since there we are
|
|
* using dummy_codec.
|
|
*/
|
|
hext_stream->hstream.format_val = format_val;
|
|
}
|
|
|
|
static const struct hda_dai_widget_dma_ops hda_dspless_dma_ops = {
|
|
.get_hext_stream = hda_dspless_get_hext_stream,
|
|
.setup_hext_stream = hda_dspless_setup_hext_stream,
|
|
.codec_dai_set_stream = hda_codec_dai_set_stream,
|
|
.calc_stream_format = hda_calc_stream_format,
|
|
.get_hlink = hda_get_hlink,
|
|
};
|
|
|
|
#endif
|
|
|
|
const struct hda_dai_widget_dma_ops *
|
|
hda_select_dai_widget_ops(struct snd_sof_dev *sdev, struct snd_sof_widget *swidget)
|
|
{
|
|
#if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA_LINK)
|
|
struct snd_sof_dai *sdai;
|
|
|
|
if (sdev->dspless_mode_selected)
|
|
return &hda_dspless_dma_ops;
|
|
|
|
sdai = swidget->private;
|
|
|
|
switch (sdev->pdata->ipc_type) {
|
|
case SOF_IPC_TYPE_3:
|
|
{
|
|
struct sof_dai_private_data *private = sdai->private;
|
|
|
|
if (private->dai_config->type == SOF_DAI_INTEL_HDA)
|
|
return &hda_ipc3_dma_ops;
|
|
break;
|
|
}
|
|
case SOF_IPC_TYPE_4:
|
|
{
|
|
struct sof_ipc4_copier *ipc4_copier = sdai->private;
|
|
const struct sof_intel_dsp_desc *chip;
|
|
|
|
chip = get_chip_info(sdev->pdata);
|
|
|
|
switch (ipc4_copier->dai_type) {
|
|
case SOF_DAI_INTEL_HDA:
|
|
{
|
|
struct snd_sof_widget *pipe_widget = swidget->spipe->pipe_widget;
|
|
struct sof_ipc4_pipeline *pipeline = pipe_widget->private;
|
|
|
|
if (pipeline->use_chain_dma)
|
|
return &hda_ipc4_chain_dma_ops;
|
|
|
|
return &hda_ipc4_dma_ops;
|
|
}
|
|
case SOF_DAI_INTEL_SSP:
|
|
if (chip->hw_ip_version < SOF_INTEL_ACE_2_0)
|
|
return NULL;
|
|
return &ssp_ipc4_dma_ops;
|
|
case SOF_DAI_INTEL_DMIC:
|
|
if (chip->hw_ip_version < SOF_INTEL_ACE_2_0)
|
|
return NULL;
|
|
return &dmic_ipc4_dma_ops;
|
|
case SOF_DAI_INTEL_ALH:
|
|
if (chip->hw_ip_version < SOF_INTEL_ACE_2_0)
|
|
return NULL;
|
|
return &sdw_ipc4_dma_ops;
|
|
|
|
default:
|
|
break;
|
|
}
|
|
break;
|
|
}
|
|
default:
|
|
break;
|
|
}
|
|
#endif
|
|
return NULL;
|
|
}
|