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Based on 3 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license as published by the free software foundation either version 2 of the license or at your option any later version this program is distributed in the hope that it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details this program is free software you can redistribute it and or modify it under the terms of the gnu general public license as published by the free software foundation either version 2 of the license or at your option any later version [author] [kishon] [vijay] [abraham] [i] [kishon]@[ti] [com] this program is distributed in the hope that it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details this program is free software you can redistribute it and or modify it under the terms of the gnu general public license as published by the free software foundation either version 2 of the license or at your option any later version [author] [graeme] [gregory] [gg]@[slimlogic] [co] [uk] [author] [kishon] [vijay] [abraham] [i] [kishon]@[ti] [com] [based] [on] [twl6030]_[usb] [c] [author] [hema] [hk] [hemahk]@[ti] [com] this program is distributed in the hope that it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details extracted by the scancode license scanner the SPDX license identifier GPL-2.0-or-later has been chosen to replace the boilerplate/reference in 1105 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Allison Randal <allison@lohutok.net> Reviewed-by: Richard Fontana <rfontana@redhat.com> Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190527070033.202006027@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
450 lines
12 KiB
C
450 lines
12 KiB
C
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* Copyright (c) 2004 Evgeniy Polyakov <zbr@ioremap.net>
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*/
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#include <asm/io.h>
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#include <linux/delay.h>
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#include <linux/moduleparam.h>
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#include <linux/module.h>
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#include "w1_internal.h"
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static int w1_delay_parm = 1;
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module_param_named(delay_coef, w1_delay_parm, int, 0);
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static int w1_disable_irqs = 0;
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module_param_named(disable_irqs, w1_disable_irqs, int, 0);
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static u8 w1_crc8_table[] = {
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0, 94, 188, 226, 97, 63, 221, 131, 194, 156, 126, 32, 163, 253, 31, 65,
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157, 195, 33, 127, 252, 162, 64, 30, 95, 1, 227, 189, 62, 96, 130, 220,
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35, 125, 159, 193, 66, 28, 254, 160, 225, 191, 93, 3, 128, 222, 60, 98,
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190, 224, 2, 92, 223, 129, 99, 61, 124, 34, 192, 158, 29, 67, 161, 255,
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70, 24, 250, 164, 39, 121, 155, 197, 132, 218, 56, 102, 229, 187, 89, 7,
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219, 133, 103, 57, 186, 228, 6, 88, 25, 71, 165, 251, 120, 38, 196, 154,
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101, 59, 217, 135, 4, 90, 184, 230, 167, 249, 27, 69, 198, 152, 122, 36,
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248, 166, 68, 26, 153, 199, 37, 123, 58, 100, 134, 216, 91, 5, 231, 185,
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140, 210, 48, 110, 237, 179, 81, 15, 78, 16, 242, 172, 47, 113, 147, 205,
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17, 79, 173, 243, 112, 46, 204, 146, 211, 141, 111, 49, 178, 236, 14, 80,
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175, 241, 19, 77, 206, 144, 114, 44, 109, 51, 209, 143, 12, 82, 176, 238,
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50, 108, 142, 208, 83, 13, 239, 177, 240, 174, 76, 18, 145, 207, 45, 115,
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202, 148, 118, 40, 171, 245, 23, 73, 8, 86, 180, 234, 105, 55, 213, 139,
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87, 9, 235, 181, 54, 104, 138, 212, 149, 203, 41, 119, 244, 170, 72, 22,
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233, 183, 85, 11, 136, 214, 52, 106, 43, 117, 151, 201, 74, 20, 246, 168,
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116, 42, 200, 150, 21, 75, 169, 247, 182, 232, 10, 84, 215, 137, 107, 53
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};
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static void w1_delay(unsigned long tm)
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{
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udelay(tm * w1_delay_parm);
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}
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static void w1_write_bit(struct w1_master *dev, int bit);
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static u8 w1_read_bit(struct w1_master *dev);
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/**
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* w1_touch_bit() - Generates a write-0 or write-1 cycle and samples the level.
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* @dev: the master device
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* @bit: 0 - write a 0, 1 - write a 0 read the level
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*/
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u8 w1_touch_bit(struct w1_master *dev, int bit)
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{
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if (dev->bus_master->touch_bit)
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return dev->bus_master->touch_bit(dev->bus_master->data, bit);
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else if (bit)
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return w1_read_bit(dev);
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else {
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w1_write_bit(dev, 0);
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return 0;
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}
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}
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EXPORT_SYMBOL_GPL(w1_touch_bit);
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/**
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* w1_write_bit() - Generates a write-0 or write-1 cycle.
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* @dev: the master device
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* @bit: bit to write
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*
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* Only call if dev->bus_master->touch_bit is NULL
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*/
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static void w1_write_bit(struct w1_master *dev, int bit)
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{
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unsigned long flags = 0;
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if(w1_disable_irqs) local_irq_save(flags);
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if (bit) {
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dev->bus_master->write_bit(dev->bus_master->data, 0);
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w1_delay(6);
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dev->bus_master->write_bit(dev->bus_master->data, 1);
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w1_delay(64);
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} else {
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dev->bus_master->write_bit(dev->bus_master->data, 0);
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w1_delay(60);
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dev->bus_master->write_bit(dev->bus_master->data, 1);
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w1_delay(10);
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}
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if(w1_disable_irqs) local_irq_restore(flags);
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}
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/**
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* w1_pre_write() - pre-write operations
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* @dev: the master device
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*
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* Pre-write operation, currently only supporting strong pullups.
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* Program the hardware for a strong pullup, if one has been requested and
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* the hardware supports it.
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*/
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static void w1_pre_write(struct w1_master *dev)
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{
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if (dev->pullup_duration &&
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dev->enable_pullup && dev->bus_master->set_pullup) {
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dev->bus_master->set_pullup(dev->bus_master->data,
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dev->pullup_duration);
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}
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}
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/**
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* w1_post_write() - post-write options
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* @dev: the master device
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*
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* Post-write operation, currently only supporting strong pullups.
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* If a strong pullup was requested, clear it if the hardware supports
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* them, or execute the delay otherwise, in either case clear the request.
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*/
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static void w1_post_write(struct w1_master *dev)
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{
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if (dev->pullup_duration) {
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if (dev->enable_pullup && dev->bus_master->set_pullup)
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dev->bus_master->set_pullup(dev->bus_master->data, 0);
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else
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msleep(dev->pullup_duration);
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dev->pullup_duration = 0;
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}
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}
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/**
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* w1_write_8() - Writes 8 bits.
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* @dev: the master device
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* @byte: the byte to write
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*/
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void w1_write_8(struct w1_master *dev, u8 byte)
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{
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int i;
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if (dev->bus_master->write_byte) {
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w1_pre_write(dev);
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dev->bus_master->write_byte(dev->bus_master->data, byte);
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}
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else
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for (i = 0; i < 8; ++i) {
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if (i == 7)
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w1_pre_write(dev);
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w1_touch_bit(dev, (byte >> i) & 0x1);
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}
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w1_post_write(dev);
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}
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EXPORT_SYMBOL_GPL(w1_write_8);
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/**
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* w1_read_bit() - Generates a write-1 cycle and samples the level.
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* @dev: the master device
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*
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* Only call if dev->bus_master->touch_bit is NULL
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*/
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static u8 w1_read_bit(struct w1_master *dev)
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{
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int result;
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unsigned long flags = 0;
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/* sample timing is critical here */
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local_irq_save(flags);
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dev->bus_master->write_bit(dev->bus_master->data, 0);
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w1_delay(6);
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dev->bus_master->write_bit(dev->bus_master->data, 1);
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w1_delay(9);
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result = dev->bus_master->read_bit(dev->bus_master->data);
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local_irq_restore(flags);
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w1_delay(55);
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return result & 0x1;
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}
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/**
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* w1_triplet() - * Does a triplet - used for searching ROM addresses.
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* @dev: the master device
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* @bdir: the bit to write if both id_bit and comp_bit are 0
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*
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* Return bits:
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* bit 0 = id_bit
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* bit 1 = comp_bit
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* bit 2 = dir_taken
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*
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* If both bits 0 & 1 are set, the search should be restarted.
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*
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* Return: bit fields - see above
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*/
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u8 w1_triplet(struct w1_master *dev, int bdir)
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{
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if (dev->bus_master->triplet)
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return dev->bus_master->triplet(dev->bus_master->data, bdir);
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else {
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u8 id_bit = w1_touch_bit(dev, 1);
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u8 comp_bit = w1_touch_bit(dev, 1);
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u8 retval;
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if (id_bit && comp_bit)
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return 0x03; /* error */
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if (!id_bit && !comp_bit) {
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/* Both bits are valid, take the direction given */
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retval = bdir ? 0x04 : 0;
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} else {
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/* Only one bit is valid, take that direction */
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bdir = id_bit;
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retval = id_bit ? 0x05 : 0x02;
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}
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if (dev->bus_master->touch_bit)
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w1_touch_bit(dev, bdir);
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else
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w1_write_bit(dev, bdir);
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return retval;
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}
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}
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EXPORT_SYMBOL_GPL(w1_triplet);
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/**
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* w1_read_8() - Reads 8 bits.
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* @dev: the master device
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*
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* Return: the byte read
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*/
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u8 w1_read_8(struct w1_master *dev)
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{
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int i;
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u8 res = 0;
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if (dev->bus_master->read_byte)
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res = dev->bus_master->read_byte(dev->bus_master->data);
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else
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for (i = 0; i < 8; ++i)
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res |= (w1_touch_bit(dev,1) << i);
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return res;
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}
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EXPORT_SYMBOL_GPL(w1_read_8);
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/**
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* w1_write_block() - Writes a series of bytes.
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* @dev: the master device
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* @buf: pointer to the data to write
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* @len: the number of bytes to write
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*/
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void w1_write_block(struct w1_master *dev, const u8 *buf, int len)
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{
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int i;
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if (dev->bus_master->write_block) {
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w1_pre_write(dev);
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dev->bus_master->write_block(dev->bus_master->data, buf, len);
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}
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else
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for (i = 0; i < len; ++i)
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w1_write_8(dev, buf[i]); /* calls w1_pre_write */
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w1_post_write(dev);
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}
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EXPORT_SYMBOL_GPL(w1_write_block);
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/**
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* w1_touch_block() - Touches a series of bytes.
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* @dev: the master device
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* @buf: pointer to the data to write
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* @len: the number of bytes to write
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*/
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void w1_touch_block(struct w1_master *dev, u8 *buf, int len)
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{
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int i, j;
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u8 tmp;
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for (i = 0; i < len; ++i) {
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tmp = 0;
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for (j = 0; j < 8; ++j) {
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if (j == 7)
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w1_pre_write(dev);
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tmp |= w1_touch_bit(dev, (buf[i] >> j) & 0x1) << j;
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}
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buf[i] = tmp;
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}
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}
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EXPORT_SYMBOL_GPL(w1_touch_block);
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/**
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* w1_read_block() - Reads a series of bytes.
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* @dev: the master device
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* @buf: pointer to the buffer to fill
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* @len: the number of bytes to read
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* Return: the number of bytes read
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*/
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u8 w1_read_block(struct w1_master *dev, u8 *buf, int len)
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{
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int i;
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u8 ret;
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if (dev->bus_master->read_block)
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ret = dev->bus_master->read_block(dev->bus_master->data, buf, len);
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else {
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for (i = 0; i < len; ++i)
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buf[i] = w1_read_8(dev);
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ret = len;
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}
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return ret;
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}
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EXPORT_SYMBOL_GPL(w1_read_block);
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/**
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* w1_reset_bus() - Issues a reset bus sequence.
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* @dev: the master device
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* Return: 0=Device present, 1=No device present or error
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*/
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int w1_reset_bus(struct w1_master *dev)
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{
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int result;
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unsigned long flags = 0;
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if(w1_disable_irqs) local_irq_save(flags);
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if (dev->bus_master->reset_bus)
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result = dev->bus_master->reset_bus(dev->bus_master->data) & 0x1;
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else {
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dev->bus_master->write_bit(dev->bus_master->data, 0);
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/* minimum 480, max ? us
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* be nice and sleep, except 18b20 spec lists 960us maximum,
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* so until we can sleep with microsecond accuracy, spin.
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* Feel free to come up with some other way to give up the
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* cpu for such a short amount of time AND get it back in
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* the maximum amount of time.
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*/
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w1_delay(500);
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dev->bus_master->write_bit(dev->bus_master->data, 1);
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w1_delay(70);
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result = dev->bus_master->read_bit(dev->bus_master->data) & 0x1;
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/* minimum 70 (above) + 430 = 500 us
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* There aren't any timing requirements between a reset and
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* the following transactions. Sleeping is safe here.
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*/
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/* w1_delay(430); min required time */
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msleep(1);
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}
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if(w1_disable_irqs) local_irq_restore(flags);
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return result;
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}
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EXPORT_SYMBOL_GPL(w1_reset_bus);
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u8 w1_calc_crc8(u8 * data, int len)
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{
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u8 crc = 0;
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while (len--)
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crc = w1_crc8_table[crc ^ *data++];
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return crc;
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}
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EXPORT_SYMBOL_GPL(w1_calc_crc8);
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void w1_search_devices(struct w1_master *dev, u8 search_type, w1_slave_found_callback cb)
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{
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dev->attempts++;
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if (dev->bus_master->search)
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dev->bus_master->search(dev->bus_master->data, dev,
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search_type, cb);
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else
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w1_search(dev, search_type, cb);
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}
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/**
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* w1_reset_select_slave() - reset and select a slave
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* @sl: the slave to select
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*
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* Resets the bus and then selects the slave by sending either a skip rom
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* or a rom match. A skip rom is issued if there is only one device
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* registered on the bus.
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* The w1 master lock must be held.
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*
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* Return: 0=success, anything else=error
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*/
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int w1_reset_select_slave(struct w1_slave *sl)
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{
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if (w1_reset_bus(sl->master))
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return -1;
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if (sl->master->slave_count == 1)
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w1_write_8(sl->master, W1_SKIP_ROM);
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else {
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u8 match[9] = {W1_MATCH_ROM, };
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u64 rn = le64_to_cpu(*((u64*)&sl->reg_num));
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memcpy(&match[1], &rn, 8);
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w1_write_block(sl->master, match, 9);
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}
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return 0;
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}
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EXPORT_SYMBOL_GPL(w1_reset_select_slave);
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/**
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* w1_reset_resume_command() - resume instead of another match ROM
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* @dev: the master device
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*
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* When the workflow with a slave amongst many requires several
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* successive commands a reset between each, this function is similar
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* to doing a reset then a match ROM for the last matched ROM. The
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* advantage being that the matched ROM step is skipped in favor of the
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* resume command. The slave must support the command of course.
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*
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* If the bus has only one slave, traditionnaly the match ROM is skipped
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* and a "SKIP ROM" is done for efficiency. On multi-slave busses, this
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* doesn't work of course, but the resume command is the next best thing.
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*
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* The w1 master lock must be held.
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*/
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int w1_reset_resume_command(struct w1_master *dev)
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{
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if (w1_reset_bus(dev))
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return -1;
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w1_write_8(dev, dev->slave_count > 1 ? W1_RESUME_CMD : W1_SKIP_ROM);
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return 0;
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}
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EXPORT_SYMBOL_GPL(w1_reset_resume_command);
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/**
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* w1_next_pullup() - register for a strong pullup
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* @dev: the master device
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* @delay: time in milliseconds
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*
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* Put out a strong pull-up of the specified duration after the next write
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* operation. Not all hardware supports strong pullups. Hardware that
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* doesn't support strong pullups will sleep for the given time after the
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* write operation without a strong pullup. This is a one shot request for
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* the next write, specifying zero will clear a previous request.
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* The w1 master lock must be held.
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*
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* Return: 0=success, anything else=error
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*/
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void w1_next_pullup(struct w1_master *dev, int delay)
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{
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dev->pullup_duration = delay;
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}
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EXPORT_SYMBOL_GPL(w1_next_pullup);
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