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This tag contains the new features we'd like to incorporate into the RISC-V port for 4.17. We might have a bit more stuff land later in the merge window, but I wanted to get this out earlier just so everyone can see where we currently stand. A short summary of the changes is: * We've added support for dynamic ftrace on RISC-V targets. * There have been a handful of cleanups to our atomic and locking routines. They now more closely match the released RISC-V memory model draft. * Our module loading support has been cleaned up and is now enabled by default, despite some limitations still existing. * A patch to define COMMANDLINE_FORCE instead of COMMANDLINE_OVERRIDE so the generic device tree code picks up handling all our command line stuff. There's more information in the merge commits for each patch set. -----BEGIN PGP SIGNATURE----- iQJHBAABCAAxFiEEAM520YNJYN/OiG3470yhUCzLq0EFAlrDsOATHHBhbG1lckBk YWJiZWx0LmNvbQAKCRDvTKFQLMurQVDuD/9uBjfgzdyJ/C7+rcN6SgsmCOrDSmZz 9yx0xqJwuVe8b21Lt4fueDjIMpVfjgxbE4SWTQ/MqaGBcxknOtUpJdGzA98BO6oB VU/Mx0EJL2L0N+FNqWuE1KCa6h8PH8PB4pzl/dvwKRdtgViL2EGuzQebSDT2iwTg JpCsAzfAZjTT0StVj7vn9/7O3uP/9G9j+GeZFvCT+OxtPHYc5TkDKZuOCI66GokJ ppGrqa9MqrWADpqWVBUIYsYqRHrhBUWgBqN5CfgsiRFTQn0ISUpdl/qZbLBVsHfY o8i/d0RM1jc5U4+qgZLpB8nD9RYpr9GTQobhNkcjyVmKHJFdJirYDD/y3fi38IoT svTv1n3VIFBTv1+u5H/Rv+ABhJx5ofFjboD9IXB3j/82i/T06IMZ2IujAAwLQw4u 1hE/wKM67c6dR+gqMl8Zq1LuYoUGuc2MIX3eLYc4GmWloZkKg/N7rHjaPFfnZlwd ZFfrPl+ZTP3FYpr3yanrVNYwHZfFWPlTnXvPWNFi+A5HPVI7+ScR8++Eaqo1mb5h nFr4wS8GX2FbUmF20mf4W7RAkpnnUlo9HRNMqfExTmp+dPCbgVXIEfJTCYsamAPV nDQ2xG5aLMyRcUBSbQEi7tninMRFGXiBYbcn6LWhYibBpr5SFGwlSkmWxbDi3ark 6lsKCBK3qrNHBQ== =XrWX -----END PGP SIGNATURE----- Merge tag 'riscv-for-linus-4.17-mw0' of git://git.kernel.org/pub/scm/linux/kernel/git/palmer/riscv-linux Pull RISC-V updates from Palmer Dabbelt: "This contains the new features we'd like to incorporate into the RISC-V port for 4.17. We might have a bit more stuff land later in the merge window, but I wanted to get this out earlier just so everyone can see where we currently stand. A short summary of the changes is: - We've added support for dynamic ftrace on RISC-V targets. - There have been a handful of cleanups to our atomic and locking routines. They now more closely match the released RISC-V memory model draft. - Our module loading support has been cleaned up and is now enabled by default, despite some limitations still existing. - A patch to define COMMANDLINE_FORCE instead of COMMANDLINE_OVERRIDE so the generic device tree code picks up handling all our command line stuff. There's more information in the merge commits for each patch set" * tag 'riscv-for-linus-4.17-mw0' of git://git.kernel.org/pub/scm/linux/kernel/git/palmer/riscv-linux: (21 commits) RISC-V: Rename CONFIG_CMDLINE_OVERRIDE to CONFIG_CMDLINE_FORCE RISC-V: Add definition of relocation types RISC-V: Enable module support in defconfig RISC-V: Support SUB32 relocation type in kernel module RISC-V: Support ADD32 relocation type in kernel module RISC-V: Support ALIGN relocation type in kernel module RISC-V: Support RVC_BRANCH/JUMP relocation type in kernel modulewq RISC-V: Support HI20/LO12_I/LO12_S relocation type in kernel module RISC-V: Support CALL relocation type in kernel module RISC-V: Support GOT_HI20/CALL_PLT relocation type in kernel module RISC-V: Add section of GOT.PLT for kernel module RISC-V: Add sections of PLT and GOT for kernel module riscv/atomic: Strengthen implementations with fences riscv/spinlock: Strengthen implementations with fences riscv/barrier: Define __smp_{store_release,load_acquire} riscv/ftrace: Add HAVE_FUNCTION_GRAPH_RET_ADDR_PTR support riscv/ftrace: Add DYNAMIC_FTRACE_WITH_REGS support riscv/ftrace: Add ARCH_SUPPORTS_FTRACE_OPS support riscv/ftrace: Add dynamic function graph tracer support riscv/ftrace: Add dynamic function tracer support ... |
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