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e9093d045a
Among the bigger changes are two new Veyron boards, support for the dual-core cortex-a7 rk3036 soc and addition of support for the crypto engine of the rk3288. Smaller changes include some IR receivers, updates of thermal settings more reflecting real- life and testing-results. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQEcBAABCAAGBQJWYetUAAoJEPOmecmc0R2B4goIAIiVjdbuetKLxeEqDWmEdCnI AKlV+IM1CWt8ib2k5bCoaYmWwtujY6m/2oHhbJklHgv3+K32lltwgZMJPeJu7xi3 C02HCdq6DydsCb2154giKOXj+SMsNZ/c38Gk1sDFFPQCcwfgT9Hg+7HOXCim2Ac8 C/Ewi7z6bZKzkvwy28KrQVPDub2DB/JQAGp8DP9hfK9k23PtaQRoLhTExj68O6JK rRjB67hb1+xdKgf8ujXevIYvoacO1odW4fLnB7KC4ei/O2XycKK/4ohzrENe/zJ6 Y2wYnb1YGiLtjgx0DlpbPvaCE6/UyX+ZhVC4kUiB937/x1ZpCZX9ttLMT91gKx8= =F0Xt -----END PGP SIGNATURE----- Merge tag 'v4.5-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt Merge "rockchip dts32 changes for 4.5" from Heiko Stuebner: First round of arm devicetree changes. Among the bigger changes are two new Veyron boards, support for the dual-core cortex-a7 rk3036 soc and addition of support for the crypto engine of the rk3288. Smaller changes include some IR receivers, updates of thermal settings more reflecting real- life and testing-results. * tag 'v4.5-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: ARM: dts: rockchip: add gpio-ir-receiver to the R89 board ARM: dts: rockchip: add touchscreen node to veyron minnie ARM: dts: rockchip: add veyron-mickey board ARM: dts: rockchip: add veyron-brain board ARM: dts: rockchip: make sure edp_24m is associated to xin24m on veyron ARM: dts: rockchip: override thermal settings on veyron-speedy ARM: dts: rockchip: update the thermal management on rk3288 ARM: dts: rockchip: Add Crypto node for rk3288 ARM: dts: rockchip: add rk3036-evb board ARM: dts: rockchip: add core rk3036 dtsi clk: rockchip: add dt-binding header for rk3036 clk: rockchip: add an id for rk3288 crypto clk ARM: dts: rockchip: Add IR receiver to RK3288 Radxa Rock 2 Square ARM: dts: rockchip: add channels properties for i2s ARM: dts: rockchip: set system-power-controller property on rk3288-rock2 ARM: dts: rockchip: Setup rk3066/rk3188 ethernet0 alias for u-boot ARM: dts: rockchip: Setup rk3288 ethernet0 alias for u-boot
247 lines
6.0 KiB
Plaintext
247 lines
6.0 KiB
Plaintext
/*
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* Google Veyron Minnie Rev 0+ board device tree source
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*
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* Copyright 2015 Google, Inc
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*
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* This file is dual-licensed: you can use it either under the terms
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* of the GPL or the X11 license, at your option. Note that this dual
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* licensing only applies to this file, and not this project as a
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* whole.
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*
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* a) This file is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of the
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* License, or (at your option) any later version.
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*
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* This file is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* Or, alternatively,
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*
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* b) Permission is hereby granted, free of charge, to any person
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* obtaining a copy of this software and associated documentation
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* files (the "Software"), to deal in the Software without
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* restriction, including without limitation the rights to use,
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* copy, modify, merge, publish, distribute, sublicense, and/or
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* sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following
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* conditions:
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*
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* The above copyright notice and this permission notice shall be
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* included in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
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* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
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* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*/
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/dts-v1/;
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#include "rk3288-veyron-chromebook.dtsi"
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/ {
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model = "Google Minnie";
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compatible = "google,veyron-minnie-rev4", "google,veyron-minnie-rev3",
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"google,veyron-minnie-rev2", "google,veyron-minnie-rev1",
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"google,veyron-minnie-rev0", "google,veyron-minnie",
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"google,veyron", "rockchip,rk3288";
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backlight_regulator: backlight-regulator {
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compatible = "regulator-fixed";
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enable-active-high;
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gpio = <&gpio2 12 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&bl_pwr_en>;
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regulator-name = "backlight_regulator";
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vin-supply = <&vcc33_sys>;
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startup-delay-us = <15000>;
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};
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panel_regulator: panel-regulator {
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compatible = "regulator-fixed";
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enable-active-high;
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gpio = <&gpio7 14 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&lcd_enable_h>;
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regulator-name = "panel_regulator";
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vin-supply = <&vcc33_sys>;
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};
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vcc18_lcd: vcc18-lcd {
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compatible = "regulator-fixed";
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enable-active-high;
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gpio = <&gpio2 13 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&avdd_1v8_disp_en>;
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regulator-name = "vcc18_lcd";
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regulator-always-on;
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regulator-boot-on;
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vin-supply = <&vcc18_wl>;
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};
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};
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&emmc {
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/delete-property/mmc-hs200-1_8v;
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};
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&gpio_keys {
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pinctrl-0 = <&pwr_key_l &ap_lid_int_l &volum_down_l &volum_up_l>;
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volum_down {
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label = "Volum_down";
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gpios = <&gpio5 11 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_VOLUMEDOWN>;
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debounce-interval = <100>;
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};
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volum_up {
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label = "Volum_up";
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gpios = <&gpio5 10 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_VOLUMEUP>;
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debounce-interval = <100>;
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};
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};
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&i2c_tunnel {
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battery: bq27500@55 {
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compatible = "ti,bq27500";
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reg = <0x55>;
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};
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};
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&i2c3 {
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status = "okay";
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clock-frequency = <400000>;
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i2c-scl-falling-time-ns = <50>;
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i2c-scl-rising-time-ns = <300>;
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touchscreen@10 {
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compatible = "elan,ekth3500";
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reg = <0x10>;
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interrupt-parent = <&gpio2>;
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interrupts = <14 IRQ_TYPE_EDGE_FALLING>;
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pinctrl-names = "default";
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pinctrl-0 = <&touch_int &touch_rst>;
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reset-gpios = <&gpio2 15 GPIO_ACTIVE_LOW>;
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vcc33-supply = <&vcc33_touch>;
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vccio-supply = <&vcc33_touch>;
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};
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};
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&rk808 {
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pinctrl-names = "default";
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pinctrl-0 = <&pmic_int_l &dvs_1 &dvs_2>;
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regulators {
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vcc33_touch: LDO_REG2 {
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-name = "vcc33_touch";
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regulator-state-mem {
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regulator-off-in-suspend;
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};
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};
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vcc5v_touch: SWITCH_REG2 {
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regulator-name = "vcc5v_touch";
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regulator-state-mem {
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regulator-off-in-suspend;
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};
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};
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};
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};
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&sdmmc {
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disable-wp;
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pinctrl-names = "default";
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pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd_disabled &sdmmc_cd_gpio
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&sdmmc_bus4>;
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};
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&vcc_5v {
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enable-active-high;
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gpio = <&gpio7 21 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&drv_5v>;
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};
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&vcc50_hdmi {
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enable-active-high;
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gpio = <&gpio5 19 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&vcc50_hdmi_en>;
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};
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&pinctrl {
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backlight {
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bl_pwr_en: bl_pwr_en {
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rockchip,pins = <2 12 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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};
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buck-5v {
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drv_5v: drv-5v {
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rockchip,pins = <7 21 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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};
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buttons {
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volum_down_l: volum-down-l {
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rockchip,pins = <5 11 RK_FUNC_GPIO &pcfg_pull_up>;
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};
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volum_up_l: volum-up-l {
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rockchip,pins = <5 10 RK_FUNC_GPIO &pcfg_pull_up>;
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};
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};
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hdmi {
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vcc50_hdmi_en: vcc50-hdmi-en {
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rockchip,pins = <5 19 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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};
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lcd {
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lcd_enable_h: lcd-en {
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rockchip,pins = <7 14 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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avdd_1v8_disp_en: avdd-1v8-disp-en {
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rockchip,pins = <2 13 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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};
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pmic {
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dvs_1: dvs-1 {
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rockchip,pins = <7 12 RK_FUNC_GPIO &pcfg_pull_down>;
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};
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dvs_2: dvs-2 {
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rockchip,pins = <7 15 RK_FUNC_GPIO &pcfg_pull_down>;
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};
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};
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prochot {
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gpio_prochot: gpio-prochot {
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rockchip,pins = <2 8 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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};
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touchscreen {
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touch_int: touch-int {
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rockchip,pins = <2 14 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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touch_rst: touch-rst {
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rockchip,pins = <2 15 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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};
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};
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