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Increasing the per-request size maximum (max_sectors_kb) runs into the per-device DMA scatter gather list limit (max_segments) for users of the io vector system calls (eg, readv and writev). This is because the kernel combines io vectors into DMA segments when possible, but it doesn't work for our user because the vectors in the buffer cache get scrambled. This change bumps the advertised max scatter gather length to 528 to cover 2M w/ x86's 4k pages and some extra for the user checksum. It trims the size of some of the tables we don't care about and exposes all of the command slots upstream to the SCSI layer. Also reduced the PM8001_MAX_CCB to 256 as pm8001 driver has memory limit depend on machine capability. If we increase the sg length, we need to trade-off it by decreasing PM8001_MAX_CCB. PM8001_MAX_CCB = 256 does not have any influence on normal use Link: https://lore.kernel.org/r/20200316074906.9119-2-deepak.ukey@microchip.com Reported-by: kbuild test robot <lkp@intel.com> Acked-by: Jack Wang <jinpu.wang@cloud.ionos.com> Signed-off-by: Peter Chang <dpf@google.com> Signed-off-by: Deepak Ukey <deepak.ukey@microchip.com> Signed-off-by: Viswas G <Viswas.G@microchip.com> Signed-off-by: Radha Ramachandran <radha@google.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
145 lines
4.4 KiB
C
145 lines
4.4 KiB
C
/*
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* PMC-Sierra 8001/8081/8088/8089 SAS/SATA based host adapters driver
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*
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* Copyright (c) 2008-2009 USI Co., Ltd.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions, and the following disclaimer,
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* without modification.
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* 2. Redistributions in binary form must reproduce at minimum a disclaimer
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* substantially similar to the "NO WARRANTY" disclaimer below
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* ("Disclaimer") and any redistribution must be conditioned upon
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* including a substantially similar Disclaimer requirement for further
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* binary redistribution.
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* 3. Neither the names of the above-listed copyright holders nor the names
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* of any contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* Alternatively, this software may be distributed under the terms of the
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* GNU General Public License ("GPL") version 2 as published by the Free
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* Software Foundation.
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*
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* NO WARRANTY
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
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* IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGES.
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*
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*/
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#ifndef _PM8001_DEFS_H_
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#define _PM8001_DEFS_H_
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enum chip_flavors {
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chip_8001,
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chip_8008,
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chip_8009,
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chip_8018,
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chip_8019,
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chip_8074,
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chip_8076,
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chip_8077,
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chip_8006,
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chip_8070,
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chip_8072
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};
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enum phy_speed {
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PHY_SPEED_15 = 0x01,
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PHY_SPEED_30 = 0x02,
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PHY_SPEED_60 = 0x04,
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PHY_SPEED_120 = 0x08,
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};
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enum data_direction {
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DATA_DIR_NONE = 0x0, /* NO TRANSFER */
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DATA_DIR_IN = 0x01, /* INBOUND */
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DATA_DIR_OUT = 0x02, /* OUTBOUND */
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DATA_DIR_BYRECIPIENT = 0x04, /* UNSPECIFIED */
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};
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enum port_type {
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PORT_TYPE_SAS = (1L << 1),
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PORT_TYPE_SATA = (1L << 0),
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};
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/* driver compile-time configuration */
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#define PM8001_MAX_CCB 256 /* max ccbs supported */
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#define PM8001_MPI_QUEUE 1024 /* maximum mpi queue entries */
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#define PM8001_MAX_INB_NUM 1
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#define PM8001_MAX_OUTB_NUM 1
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#define PM8001_MAX_SPCV_INB_NUM 1
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#define PM8001_MAX_SPCV_OUTB_NUM 4
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#define PM8001_CAN_QUEUE 508 /* SCSI Queue depth */
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/* Inbound/Outbound queue size */
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#define IOMB_SIZE_SPC 64
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#define IOMB_SIZE_SPCV 128
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/* unchangeable hardware details */
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#define PM8001_MAX_PHYS 16 /* max. possible phys */
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#define PM8001_MAX_PORTS 16 /* max. possible ports */
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#define PM8001_MAX_DEVICES 2048 /* max supported device */
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#define PM8001_MAX_MSIX_VEC 64 /* max msi-x int for spcv/ve */
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#define USI_MAX_MEMCNT_BASE 5
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#define IB (USI_MAX_MEMCNT_BASE + 1)
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#define CI (IB + PM8001_MAX_SPCV_INB_NUM)
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#define OB (CI + PM8001_MAX_SPCV_INB_NUM)
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#define PI (OB + PM8001_MAX_SPCV_OUTB_NUM)
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#define USI_MAX_MEMCNT (PI + PM8001_MAX_SPCV_OUTB_NUM)
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#define CONFIG_SCSI_PM8001_MAX_DMA_SG 528
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#define PM8001_MAX_DMA_SG CONFIG_SCSI_PM8001_MAX_DMA_SG
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enum memory_region_num {
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AAP1 = 0x0, /* application acceleration processor */
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IOP, /* IO processor */
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NVMD, /* NVM device */
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DEV_MEM, /* memory for devices */
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CCB_MEM, /* memory for command control block */
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FW_FLASH, /* memory for fw flash update */
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FORENSIC_MEM /* memory for fw forensic data */
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};
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#define PM8001_EVENT_LOG_SIZE (128 * 1024)
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/*error code*/
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enum mpi_err {
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MPI_IO_STATUS_SUCCESS = 0x0,
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MPI_IO_STATUS_BUSY = 0x01,
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MPI_IO_STATUS_FAIL = 0x02,
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};
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/**
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* Phy Control constants
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*/
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enum phy_control_type {
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PHY_LINK_RESET = 0x01,
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PHY_HARD_RESET = 0x02,
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PHY_NOTIFY_ENABLE_SPINUP = 0x10,
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};
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enum pm8001_hba_info_flags {
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PM8001F_INIT_TIME = (1U << 0),
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PM8001F_RUN_TIME = (1U << 1),
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};
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/**
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* Phy Status
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*/
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#define PHY_LINK_DISABLE 0x00
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#define PHY_LINK_DOWN 0x01
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#define PHY_STATE_LINK_UP_SPCV 0x2
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#define PHY_STATE_LINK_UP_SPC 0x1
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#endif
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