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53bb9f80b3
If the FCoE priority is not changing do not set the RESET and APP_UPCHG bits. This causes unneeded HW resets and which can cause unneeded LLDP frames and negotiations. The current check is not sufficient because the FCoE priority can change twice during a negotiation which results in the bits being set. This occurs when the switch changes the priority or when the link is reset with switches that do not include the APP priority until after PFC has been negotiated. This results in set_app being called with the local APP priority. Then the negotiation completes and set_app is called again with the peer APP priority. The check fails so the device is reset and the above occurs again resulting in an endless loop of resets. By only resetting the device if the APP priority has really changed we short circuit the loop. Signed-off-by: John Fastabend <john.r.fastabend@intel.com> Tested-by: Ross Brattain <ross.b.brattain@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
632 lines
18 KiB
C
632 lines
18 KiB
C
/*******************************************************************************
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Intel 10 Gigabit PCI Express Linux driver
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Copyright(c) 1999 - 2010 Intel Corporation.
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This program is free software; you can redistribute it and/or modify it
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under the terms and conditions of the GNU General Public License,
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version 2, as published by the Free Software Foundation.
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This program is distributed in the hope it will be useful, but WITHOUT
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ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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more details.
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You should have received a copy of the GNU General Public License along with
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this program; if not, write to the Free Software Foundation, Inc.,
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51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
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The full GNU General Public License is included in this distribution in
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the file called "COPYING".
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Contact Information:
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Linux NICS <linux.nics@intel.com>
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e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
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Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
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*******************************************************************************/
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#include "ixgbe.h"
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#include <linux/dcbnl.h>
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#include "ixgbe_dcb_82598.h"
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#include "ixgbe_dcb_82599.h"
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/* Callbacks for DCB netlink in the kernel */
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#define BIT_DCB_MODE 0x01
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#define BIT_PFC 0x02
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#define BIT_PG_RX 0x04
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#define BIT_PG_TX 0x08
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#define BIT_APP_UPCHG 0x10
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#define BIT_RESETLINK 0x40
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#define BIT_LINKSPEED 0x80
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/* Responses for the DCB_C_SET_ALL command */
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#define DCB_HW_CHG_RST 0 /* DCB configuration changed with reset */
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#define DCB_NO_HW_CHG 1 /* DCB configuration did not change */
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#define DCB_HW_CHG 2 /* DCB configuration changed, no reset */
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int ixgbe_copy_dcb_cfg(struct ixgbe_dcb_config *src_dcb_cfg,
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struct ixgbe_dcb_config *dst_dcb_cfg, int tc_max)
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{
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struct tc_configuration *src_tc_cfg = NULL;
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struct tc_configuration *dst_tc_cfg = NULL;
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int i;
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if (!src_dcb_cfg || !dst_dcb_cfg)
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return -EINVAL;
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for (i = DCB_PG_ATTR_TC_0; i < tc_max + DCB_PG_ATTR_TC_0; i++) {
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src_tc_cfg = &src_dcb_cfg->tc_config[i - DCB_PG_ATTR_TC_0];
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dst_tc_cfg = &dst_dcb_cfg->tc_config[i - DCB_PG_ATTR_TC_0];
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dst_tc_cfg->path[DCB_TX_CONFIG].prio_type =
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src_tc_cfg->path[DCB_TX_CONFIG].prio_type;
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dst_tc_cfg->path[DCB_TX_CONFIG].bwg_id =
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src_tc_cfg->path[DCB_TX_CONFIG].bwg_id;
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dst_tc_cfg->path[DCB_TX_CONFIG].bwg_percent =
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src_tc_cfg->path[DCB_TX_CONFIG].bwg_percent;
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dst_tc_cfg->path[DCB_TX_CONFIG].up_to_tc_bitmap =
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src_tc_cfg->path[DCB_TX_CONFIG].up_to_tc_bitmap;
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dst_tc_cfg->path[DCB_RX_CONFIG].prio_type =
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src_tc_cfg->path[DCB_RX_CONFIG].prio_type;
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dst_tc_cfg->path[DCB_RX_CONFIG].bwg_id =
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src_tc_cfg->path[DCB_RX_CONFIG].bwg_id;
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dst_tc_cfg->path[DCB_RX_CONFIG].bwg_percent =
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src_tc_cfg->path[DCB_RX_CONFIG].bwg_percent;
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dst_tc_cfg->path[DCB_RX_CONFIG].up_to_tc_bitmap =
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src_tc_cfg->path[DCB_RX_CONFIG].up_to_tc_bitmap;
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}
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for (i = DCB_PG_ATTR_BW_ID_0; i < DCB_PG_ATTR_BW_ID_MAX; i++) {
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dst_dcb_cfg->bw_percentage[DCB_TX_CONFIG]
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[i-DCB_PG_ATTR_BW_ID_0] = src_dcb_cfg->bw_percentage
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[DCB_TX_CONFIG][i-DCB_PG_ATTR_BW_ID_0];
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dst_dcb_cfg->bw_percentage[DCB_RX_CONFIG]
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[i-DCB_PG_ATTR_BW_ID_0] = src_dcb_cfg->bw_percentage
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[DCB_RX_CONFIG][i-DCB_PG_ATTR_BW_ID_0];
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}
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for (i = DCB_PFC_UP_ATTR_0; i < DCB_PFC_UP_ATTR_MAX; i++) {
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dst_dcb_cfg->tc_config[i - DCB_PFC_UP_ATTR_0].dcb_pfc =
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src_dcb_cfg->tc_config[i - DCB_PFC_UP_ATTR_0].dcb_pfc;
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}
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dst_dcb_cfg->pfc_mode_enable = src_dcb_cfg->pfc_mode_enable;
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return 0;
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}
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static u8 ixgbe_dcbnl_get_state(struct net_device *netdev)
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{
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struct ixgbe_adapter *adapter = netdev_priv(netdev);
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return !!(adapter->flags & IXGBE_FLAG_DCB_ENABLED);
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}
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static u8 ixgbe_dcbnl_set_state(struct net_device *netdev, u8 state)
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{
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u8 err = 0;
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struct ixgbe_adapter *adapter = netdev_priv(netdev);
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if (state > 0) {
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/* Turn on DCB */
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if (adapter->flags & IXGBE_FLAG_DCB_ENABLED)
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goto out;
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if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) {
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e_err(drv, "Enable failed, needs MSI-X\n");
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err = 1;
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goto out;
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}
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if (netif_running(netdev))
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netdev->netdev_ops->ndo_stop(netdev);
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ixgbe_clear_interrupt_scheme(adapter);
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adapter->flags &= ~IXGBE_FLAG_RSS_ENABLED;
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switch (adapter->hw.mac.type) {
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case ixgbe_mac_82598EB:
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adapter->last_lfc_mode = adapter->hw.fc.current_mode;
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adapter->hw.fc.requested_mode = ixgbe_fc_none;
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break;
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case ixgbe_mac_82599EB:
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case ixgbe_mac_X540:
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adapter->flags &= ~IXGBE_FLAG_FDIR_HASH_CAPABLE;
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adapter->flags &= ~IXGBE_FLAG_FDIR_PERFECT_CAPABLE;
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break;
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default:
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break;
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}
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adapter->flags |= IXGBE_FLAG_DCB_ENABLED;
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ixgbe_init_interrupt_scheme(adapter);
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if (netif_running(netdev))
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netdev->netdev_ops->ndo_open(netdev);
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} else {
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/* Turn off DCB */
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if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
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if (netif_running(netdev))
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netdev->netdev_ops->ndo_stop(netdev);
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ixgbe_clear_interrupt_scheme(adapter);
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adapter->hw.fc.requested_mode = adapter->last_lfc_mode;
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adapter->temp_dcb_cfg.pfc_mode_enable = false;
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adapter->dcb_cfg.pfc_mode_enable = false;
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adapter->flags &= ~IXGBE_FLAG_DCB_ENABLED;
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adapter->flags |= IXGBE_FLAG_RSS_ENABLED;
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switch (adapter->hw.mac.type) {
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case ixgbe_mac_82599EB:
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case ixgbe_mac_X540:
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adapter->flags |= IXGBE_FLAG_FDIR_HASH_CAPABLE;
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break;
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default:
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break;
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}
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ixgbe_init_interrupt_scheme(adapter);
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if (netif_running(netdev))
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netdev->netdev_ops->ndo_open(netdev);
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}
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}
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out:
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return err;
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}
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static void ixgbe_dcbnl_get_perm_hw_addr(struct net_device *netdev,
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u8 *perm_addr)
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{
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struct ixgbe_adapter *adapter = netdev_priv(netdev);
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int i, j;
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memset(perm_addr, 0xff, MAX_ADDR_LEN);
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for (i = 0; i < netdev->addr_len; i++)
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perm_addr[i] = adapter->hw.mac.perm_addr[i];
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switch (adapter->hw.mac.type) {
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case ixgbe_mac_82599EB:
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case ixgbe_mac_X540:
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for (j = 0; j < netdev->addr_len; j++, i++)
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perm_addr[i] = adapter->hw.mac.san_addr[j];
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break;
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default:
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break;
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}
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}
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static void ixgbe_dcbnl_set_pg_tc_cfg_tx(struct net_device *netdev, int tc,
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u8 prio, u8 bwg_id, u8 bw_pct,
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u8 up_map)
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{
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struct ixgbe_adapter *adapter = netdev_priv(netdev);
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if (prio != DCB_ATTR_VALUE_UNDEFINED)
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adapter->temp_dcb_cfg.tc_config[tc].path[0].prio_type = prio;
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if (bwg_id != DCB_ATTR_VALUE_UNDEFINED)
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adapter->temp_dcb_cfg.tc_config[tc].path[0].bwg_id = bwg_id;
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if (bw_pct != DCB_ATTR_VALUE_UNDEFINED)
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adapter->temp_dcb_cfg.tc_config[tc].path[0].bwg_percent =
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bw_pct;
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if (up_map != DCB_ATTR_VALUE_UNDEFINED)
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adapter->temp_dcb_cfg.tc_config[tc].path[0].up_to_tc_bitmap =
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up_map;
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if ((adapter->temp_dcb_cfg.tc_config[tc].path[0].prio_type !=
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adapter->dcb_cfg.tc_config[tc].path[0].prio_type) ||
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(adapter->temp_dcb_cfg.tc_config[tc].path[0].bwg_id !=
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adapter->dcb_cfg.tc_config[tc].path[0].bwg_id) ||
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(adapter->temp_dcb_cfg.tc_config[tc].path[0].bwg_percent !=
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adapter->dcb_cfg.tc_config[tc].path[0].bwg_percent) ||
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(adapter->temp_dcb_cfg.tc_config[tc].path[0].up_to_tc_bitmap !=
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adapter->dcb_cfg.tc_config[tc].path[0].up_to_tc_bitmap)) {
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adapter->dcb_set_bitmap |= BIT_PG_TX;
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adapter->dcb_set_bitmap |= BIT_RESETLINK;
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}
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}
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static void ixgbe_dcbnl_set_pg_bwg_cfg_tx(struct net_device *netdev, int bwg_id,
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u8 bw_pct)
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{
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struct ixgbe_adapter *adapter = netdev_priv(netdev);
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adapter->temp_dcb_cfg.bw_percentage[0][bwg_id] = bw_pct;
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if (adapter->temp_dcb_cfg.bw_percentage[0][bwg_id] !=
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adapter->dcb_cfg.bw_percentage[0][bwg_id]) {
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adapter->dcb_set_bitmap |= BIT_PG_TX;
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adapter->dcb_set_bitmap |= BIT_RESETLINK;
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}
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}
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static void ixgbe_dcbnl_set_pg_tc_cfg_rx(struct net_device *netdev, int tc,
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u8 prio, u8 bwg_id, u8 bw_pct,
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u8 up_map)
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{
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struct ixgbe_adapter *adapter = netdev_priv(netdev);
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if (prio != DCB_ATTR_VALUE_UNDEFINED)
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adapter->temp_dcb_cfg.tc_config[tc].path[1].prio_type = prio;
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if (bwg_id != DCB_ATTR_VALUE_UNDEFINED)
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adapter->temp_dcb_cfg.tc_config[tc].path[1].bwg_id = bwg_id;
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if (bw_pct != DCB_ATTR_VALUE_UNDEFINED)
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adapter->temp_dcb_cfg.tc_config[tc].path[1].bwg_percent =
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bw_pct;
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if (up_map != DCB_ATTR_VALUE_UNDEFINED)
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adapter->temp_dcb_cfg.tc_config[tc].path[1].up_to_tc_bitmap =
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up_map;
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if ((adapter->temp_dcb_cfg.tc_config[tc].path[1].prio_type !=
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adapter->dcb_cfg.tc_config[tc].path[1].prio_type) ||
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(adapter->temp_dcb_cfg.tc_config[tc].path[1].bwg_id !=
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adapter->dcb_cfg.tc_config[tc].path[1].bwg_id) ||
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(adapter->temp_dcb_cfg.tc_config[tc].path[1].bwg_percent !=
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adapter->dcb_cfg.tc_config[tc].path[1].bwg_percent) ||
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(adapter->temp_dcb_cfg.tc_config[tc].path[1].up_to_tc_bitmap !=
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adapter->dcb_cfg.tc_config[tc].path[1].up_to_tc_bitmap)) {
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adapter->dcb_set_bitmap |= BIT_PG_RX;
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adapter->dcb_set_bitmap |= BIT_RESETLINK;
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}
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}
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static void ixgbe_dcbnl_set_pg_bwg_cfg_rx(struct net_device *netdev, int bwg_id,
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u8 bw_pct)
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{
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struct ixgbe_adapter *adapter = netdev_priv(netdev);
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adapter->temp_dcb_cfg.bw_percentage[1][bwg_id] = bw_pct;
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if (adapter->temp_dcb_cfg.bw_percentage[1][bwg_id] !=
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adapter->dcb_cfg.bw_percentage[1][bwg_id]) {
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adapter->dcb_set_bitmap |= BIT_PG_RX;
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adapter->dcb_set_bitmap |= BIT_RESETLINK;
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}
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}
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static void ixgbe_dcbnl_get_pg_tc_cfg_tx(struct net_device *netdev, int tc,
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u8 *prio, u8 *bwg_id, u8 *bw_pct,
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u8 *up_map)
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{
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struct ixgbe_adapter *adapter = netdev_priv(netdev);
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*prio = adapter->dcb_cfg.tc_config[tc].path[0].prio_type;
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*bwg_id = adapter->dcb_cfg.tc_config[tc].path[0].bwg_id;
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*bw_pct = adapter->dcb_cfg.tc_config[tc].path[0].bwg_percent;
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*up_map = adapter->dcb_cfg.tc_config[tc].path[0].up_to_tc_bitmap;
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}
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static void ixgbe_dcbnl_get_pg_bwg_cfg_tx(struct net_device *netdev, int bwg_id,
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u8 *bw_pct)
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{
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struct ixgbe_adapter *adapter = netdev_priv(netdev);
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*bw_pct = adapter->dcb_cfg.bw_percentage[0][bwg_id];
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}
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static void ixgbe_dcbnl_get_pg_tc_cfg_rx(struct net_device *netdev, int tc,
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u8 *prio, u8 *bwg_id, u8 *bw_pct,
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u8 *up_map)
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{
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struct ixgbe_adapter *adapter = netdev_priv(netdev);
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*prio = adapter->dcb_cfg.tc_config[tc].path[1].prio_type;
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*bwg_id = adapter->dcb_cfg.tc_config[tc].path[1].bwg_id;
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*bw_pct = adapter->dcb_cfg.tc_config[tc].path[1].bwg_percent;
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*up_map = adapter->dcb_cfg.tc_config[tc].path[1].up_to_tc_bitmap;
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}
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static void ixgbe_dcbnl_get_pg_bwg_cfg_rx(struct net_device *netdev, int bwg_id,
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u8 *bw_pct)
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{
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struct ixgbe_adapter *adapter = netdev_priv(netdev);
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*bw_pct = adapter->dcb_cfg.bw_percentage[1][bwg_id];
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}
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static void ixgbe_dcbnl_set_pfc_cfg(struct net_device *netdev, int priority,
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u8 setting)
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{
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struct ixgbe_adapter *adapter = netdev_priv(netdev);
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adapter->temp_dcb_cfg.tc_config[priority].dcb_pfc = setting;
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if (adapter->temp_dcb_cfg.tc_config[priority].dcb_pfc !=
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adapter->dcb_cfg.tc_config[priority].dcb_pfc) {
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adapter->dcb_set_bitmap |= BIT_PFC;
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adapter->temp_dcb_cfg.pfc_mode_enable = true;
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}
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}
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static void ixgbe_dcbnl_get_pfc_cfg(struct net_device *netdev, int priority,
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u8 *setting)
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{
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struct ixgbe_adapter *adapter = netdev_priv(netdev);
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*setting = adapter->dcb_cfg.tc_config[priority].dcb_pfc;
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}
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static u8 ixgbe_dcbnl_set_all(struct net_device *netdev)
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{
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struct ixgbe_adapter *adapter = netdev_priv(netdev);
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bool do_reset;
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int ret;
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if (!adapter->dcb_set_bitmap)
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return DCB_NO_HW_CHG;
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ret = ixgbe_copy_dcb_cfg(&adapter->temp_dcb_cfg, &adapter->dcb_cfg,
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adapter->ring_feature[RING_F_DCB].indices);
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if (ret)
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return DCB_NO_HW_CHG;
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/*
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* Only take down the adapter if the configuration change
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* requires a reset.
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*/
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do_reset = adapter->dcb_set_bitmap & (BIT_RESETLINK | BIT_APP_UPCHG);
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if (do_reset) {
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while (test_and_set_bit(__IXGBE_RESETTING, &adapter->state))
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msleep(1);
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if (adapter->dcb_set_bitmap & BIT_APP_UPCHG) {
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if (netif_running(netdev))
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netdev->netdev_ops->ndo_stop(netdev);
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ixgbe_clear_interrupt_scheme(adapter);
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} else {
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if (netif_running(netdev))
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ixgbe_down(adapter);
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}
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}
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if (adapter->dcb_cfg.pfc_mode_enable) {
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switch (adapter->hw.mac.type) {
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case ixgbe_mac_82599EB:
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case ixgbe_mac_X540:
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if (adapter->hw.fc.current_mode != ixgbe_fc_pfc)
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adapter->last_lfc_mode =
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adapter->hw.fc.current_mode;
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break;
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default:
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break;
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}
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adapter->hw.fc.requested_mode = ixgbe_fc_pfc;
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} else {
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switch (adapter->hw.mac.type) {
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case ixgbe_mac_82598EB:
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adapter->hw.fc.requested_mode = ixgbe_fc_none;
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break;
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case ixgbe_mac_82599EB:
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case ixgbe_mac_X540:
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adapter->hw.fc.requested_mode = adapter->last_lfc_mode;
|
|
break;
|
|
default:
|
|
break;
|
|
}
|
|
}
|
|
|
|
if (do_reset) {
|
|
if (adapter->dcb_set_bitmap & BIT_APP_UPCHG) {
|
|
ixgbe_init_interrupt_scheme(adapter);
|
|
if (netif_running(netdev))
|
|
netdev->netdev_ops->ndo_open(netdev);
|
|
} else {
|
|
if (netif_running(netdev))
|
|
ixgbe_up(adapter);
|
|
}
|
|
ret = DCB_HW_CHG_RST;
|
|
} else if (adapter->dcb_set_bitmap & BIT_PFC) {
|
|
if (adapter->hw.mac.type == ixgbe_mac_82598EB)
|
|
ixgbe_dcb_config_pfc_82598(&adapter->hw,
|
|
&adapter->dcb_cfg);
|
|
else if (adapter->hw.mac.type == ixgbe_mac_82599EB)
|
|
ixgbe_dcb_config_pfc_82599(&adapter->hw,
|
|
&adapter->dcb_cfg);
|
|
ret = DCB_HW_CHG;
|
|
}
|
|
if (adapter->dcb_cfg.pfc_mode_enable)
|
|
adapter->hw.fc.current_mode = ixgbe_fc_pfc;
|
|
|
|
if (do_reset)
|
|
clear_bit(__IXGBE_RESETTING, &adapter->state);
|
|
adapter->dcb_set_bitmap = 0x00;
|
|
return ret;
|
|
}
|
|
|
|
static u8 ixgbe_dcbnl_getcap(struct net_device *netdev, int capid, u8 *cap)
|
|
{
|
|
struct ixgbe_adapter *adapter = netdev_priv(netdev);
|
|
u8 rval = 0;
|
|
|
|
if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
|
|
switch (capid) {
|
|
case DCB_CAP_ATTR_PG:
|
|
*cap = true;
|
|
break;
|
|
case DCB_CAP_ATTR_PFC:
|
|
*cap = true;
|
|
break;
|
|
case DCB_CAP_ATTR_UP2TC:
|
|
*cap = false;
|
|
break;
|
|
case DCB_CAP_ATTR_PG_TCS:
|
|
*cap = 0x80;
|
|
break;
|
|
case DCB_CAP_ATTR_PFC_TCS:
|
|
*cap = 0x80;
|
|
break;
|
|
case DCB_CAP_ATTR_GSP:
|
|
*cap = true;
|
|
break;
|
|
case DCB_CAP_ATTR_BCN:
|
|
*cap = false;
|
|
break;
|
|
default:
|
|
rval = -EINVAL;
|
|
break;
|
|
}
|
|
} else {
|
|
rval = -EINVAL;
|
|
}
|
|
|
|
return rval;
|
|
}
|
|
|
|
static u8 ixgbe_dcbnl_getnumtcs(struct net_device *netdev, int tcid, u8 *num)
|
|
{
|
|
struct ixgbe_adapter *adapter = netdev_priv(netdev);
|
|
u8 rval = 0;
|
|
|
|
if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
|
|
switch (tcid) {
|
|
case DCB_NUMTCS_ATTR_PG:
|
|
*num = MAX_TRAFFIC_CLASS;
|
|
break;
|
|
case DCB_NUMTCS_ATTR_PFC:
|
|
*num = MAX_TRAFFIC_CLASS;
|
|
break;
|
|
default:
|
|
rval = -EINVAL;
|
|
break;
|
|
}
|
|
} else {
|
|
rval = -EINVAL;
|
|
}
|
|
|
|
return rval;
|
|
}
|
|
|
|
static u8 ixgbe_dcbnl_setnumtcs(struct net_device *netdev, int tcid, u8 num)
|
|
{
|
|
return -EINVAL;
|
|
}
|
|
|
|
static u8 ixgbe_dcbnl_getpfcstate(struct net_device *netdev)
|
|
{
|
|
struct ixgbe_adapter *adapter = netdev_priv(netdev);
|
|
|
|
return adapter->dcb_cfg.pfc_mode_enable;
|
|
}
|
|
|
|
static void ixgbe_dcbnl_setpfcstate(struct net_device *netdev, u8 state)
|
|
{
|
|
struct ixgbe_adapter *adapter = netdev_priv(netdev);
|
|
|
|
adapter->temp_dcb_cfg.pfc_mode_enable = state;
|
|
if (adapter->temp_dcb_cfg.pfc_mode_enable !=
|
|
adapter->dcb_cfg.pfc_mode_enable)
|
|
adapter->dcb_set_bitmap |= BIT_PFC;
|
|
}
|
|
|
|
/**
|
|
* ixgbe_dcbnl_getapp - retrieve the DCBX application user priority
|
|
* @netdev : the corresponding netdev
|
|
* @idtype : identifies the id as ether type or TCP/UDP port number
|
|
* @id: id is either ether type or TCP/UDP port number
|
|
*
|
|
* Returns : on success, returns a non-zero 802.1p user priority bitmap
|
|
* otherwise returns 0 as the invalid user priority bitmap to indicate an
|
|
* error.
|
|
*/
|
|
static u8 ixgbe_dcbnl_getapp(struct net_device *netdev, u8 idtype, u16 id)
|
|
{
|
|
u8 rval = 0;
|
|
|
|
switch (idtype) {
|
|
case DCB_APP_IDTYPE_ETHTYPE:
|
|
#ifdef IXGBE_FCOE
|
|
if (id == ETH_P_FCOE)
|
|
rval = ixgbe_fcoe_getapp(netdev_priv(netdev));
|
|
#endif
|
|
break;
|
|
case DCB_APP_IDTYPE_PORTNUM:
|
|
break;
|
|
default:
|
|
break;
|
|
}
|
|
return rval;
|
|
}
|
|
|
|
/**
|
|
* ixgbe_dcbnl_setapp - set the DCBX application user priority
|
|
* @netdev : the corresponding netdev
|
|
* @idtype : identifies the id as ether type or TCP/UDP port number
|
|
* @id: id is either ether type or TCP/UDP port number
|
|
* @up: the 802.1p user priority bitmap
|
|
*
|
|
* Returns : 0 on success or 1 on error
|
|
*/
|
|
static u8 ixgbe_dcbnl_setapp(struct net_device *netdev,
|
|
u8 idtype, u16 id, u8 up)
|
|
{
|
|
u8 rval = 1;
|
|
|
|
switch (idtype) {
|
|
case DCB_APP_IDTYPE_ETHTYPE:
|
|
#ifdef IXGBE_FCOE
|
|
if (id == ETH_P_FCOE) {
|
|
u8 old_tc;
|
|
struct ixgbe_adapter *adapter = netdev_priv(netdev);
|
|
|
|
/* Get current programmed tc */
|
|
old_tc = adapter->fcoe.tc;
|
|
rval = ixgbe_fcoe_setapp(adapter, up);
|
|
|
|
if (rval ||
|
|
!(adapter->flags & IXGBE_FLAG_DCB_ENABLED) ||
|
|
!(adapter->flags & IXGBE_FLAG_FCOE_ENABLED))
|
|
break;
|
|
|
|
/* The FCoE application priority may be changed multiple
|
|
* times in quick sucession with switches that build up
|
|
* TLVs. To avoid creating uneeded device resets this
|
|
* checks the actual HW configuration and clears
|
|
* BIT_APP_UPCHG if a HW configuration change is not
|
|
* need
|
|
*/
|
|
if (old_tc == adapter->fcoe.tc)
|
|
adapter->dcb_set_bitmap &= ~BIT_APP_UPCHG;
|
|
else
|
|
adapter->dcb_set_bitmap |= BIT_APP_UPCHG;
|
|
}
|
|
#endif
|
|
break;
|
|
case DCB_APP_IDTYPE_PORTNUM:
|
|
break;
|
|
default:
|
|
break;
|
|
}
|
|
return rval;
|
|
}
|
|
|
|
const struct dcbnl_rtnl_ops dcbnl_ops = {
|
|
.getstate = ixgbe_dcbnl_get_state,
|
|
.setstate = ixgbe_dcbnl_set_state,
|
|
.getpermhwaddr = ixgbe_dcbnl_get_perm_hw_addr,
|
|
.setpgtccfgtx = ixgbe_dcbnl_set_pg_tc_cfg_tx,
|
|
.setpgbwgcfgtx = ixgbe_dcbnl_set_pg_bwg_cfg_tx,
|
|
.setpgtccfgrx = ixgbe_dcbnl_set_pg_tc_cfg_rx,
|
|
.setpgbwgcfgrx = ixgbe_dcbnl_set_pg_bwg_cfg_rx,
|
|
.getpgtccfgtx = ixgbe_dcbnl_get_pg_tc_cfg_tx,
|
|
.getpgbwgcfgtx = ixgbe_dcbnl_get_pg_bwg_cfg_tx,
|
|
.getpgtccfgrx = ixgbe_dcbnl_get_pg_tc_cfg_rx,
|
|
.getpgbwgcfgrx = ixgbe_dcbnl_get_pg_bwg_cfg_rx,
|
|
.setpfccfg = ixgbe_dcbnl_set_pfc_cfg,
|
|
.getpfccfg = ixgbe_dcbnl_get_pfc_cfg,
|
|
.setall = ixgbe_dcbnl_set_all,
|
|
.getcap = ixgbe_dcbnl_getcap,
|
|
.getnumtcs = ixgbe_dcbnl_getnumtcs,
|
|
.setnumtcs = ixgbe_dcbnl_setnumtcs,
|
|
.getpfcstate = ixgbe_dcbnl_getpfcstate,
|
|
.setpfcstate = ixgbe_dcbnl_setpfcstate,
|
|
.getapp = ixgbe_dcbnl_getapp,
|
|
.setapp = ixgbe_dcbnl_setapp,
|
|
};
|
|
|