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d41418c0c0
Add the required code to properly handle race free platform coherency exit to the DCSCB power down method. The power_up_setup callback is used to enable the CCI interface for the cluster being brought up. This must be done in assembly before the kernel environment is entered. Thanks to Achin Gupta and Nicolas Pitre for their help and contributions. Signed-off-by: Dave Martin <dave.martin@linaro.org> Signed-off-by: Nicolas Pitre <nico@linaro.org> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Pawel Moll <pawel.moll@arm.com>
254 lines
6.6 KiB
C
254 lines
6.6 KiB
C
/*
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* arch/arm/mach-vexpress/dcscb.c - Dual Cluster System Configuration Block
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*
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* Created by: Nicolas Pitre, May 2012
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* Copyright: (C) 2012-2013 Linaro Limited
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/init.h>
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#include <linux/kernel.h>
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#include <linux/io.h>
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#include <linux/spinlock.h>
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#include <linux/errno.h>
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#include <linux/of_address.h>
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#include <linux/vexpress.h>
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#include <linux/arm-cci.h>
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#include <asm/mcpm.h>
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#include <asm/proc-fns.h>
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#include <asm/cacheflush.h>
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#include <asm/cputype.h>
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#include <asm/cp15.h>
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#define RST_HOLD0 0x0
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#define RST_HOLD1 0x4
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#define SYS_SWRESET 0x8
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#define RST_STAT0 0xc
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#define RST_STAT1 0x10
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#define EAG_CFG_R 0x20
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#define EAG_CFG_W 0x24
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#define KFC_CFG_R 0x28
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#define KFC_CFG_W 0x2c
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#define DCS_CFG_R 0x30
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/*
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* We can't use regular spinlocks. In the switcher case, it is possible
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* for an outbound CPU to call power_down() while its inbound counterpart
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* is already live using the same logical CPU number which trips lockdep
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* debugging.
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*/
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static arch_spinlock_t dcscb_lock = __ARCH_SPIN_LOCK_UNLOCKED;
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static void __iomem *dcscb_base;
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static int dcscb_use_count[4][2];
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static int dcscb_allcpus_mask[2];
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static int dcscb_power_up(unsigned int cpu, unsigned int cluster)
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{
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unsigned int rst_hold, cpumask = (1 << cpu);
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unsigned int all_mask = dcscb_allcpus_mask[cluster];
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pr_debug("%s: cpu %u cluster %u\n", __func__, cpu, cluster);
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if (cpu >= 4 || cluster >= 2)
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return -EINVAL;
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/*
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* Since this is called with IRQs enabled, and no arch_spin_lock_irq
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* variant exists, we need to disable IRQs manually here.
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*/
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local_irq_disable();
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arch_spin_lock(&dcscb_lock);
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dcscb_use_count[cpu][cluster]++;
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if (dcscb_use_count[cpu][cluster] == 1) {
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rst_hold = readl_relaxed(dcscb_base + RST_HOLD0 + cluster * 4);
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if (rst_hold & (1 << 8)) {
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/* remove cluster reset and add individual CPU's reset */
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rst_hold &= ~(1 << 8);
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rst_hold |= all_mask;
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}
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rst_hold &= ~(cpumask | (cpumask << 4));
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writel_relaxed(rst_hold, dcscb_base + RST_HOLD0 + cluster * 4);
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} else if (dcscb_use_count[cpu][cluster] != 2) {
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/*
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* The only possible values are:
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* 0 = CPU down
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* 1 = CPU (still) up
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* 2 = CPU requested to be up before it had a chance
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* to actually make itself down.
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* Any other value is a bug.
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*/
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BUG();
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}
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arch_spin_unlock(&dcscb_lock);
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local_irq_enable();
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return 0;
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}
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static void dcscb_power_down(void)
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{
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unsigned int mpidr, cpu, cluster, rst_hold, cpumask, all_mask;
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bool last_man = false, skip_wfi = false;
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mpidr = read_cpuid_mpidr();
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cpu = MPIDR_AFFINITY_LEVEL(mpidr, 0);
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cluster = MPIDR_AFFINITY_LEVEL(mpidr, 1);
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cpumask = (1 << cpu);
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all_mask = dcscb_allcpus_mask[cluster];
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pr_debug("%s: cpu %u cluster %u\n", __func__, cpu, cluster);
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BUG_ON(cpu >= 4 || cluster >= 2);
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__mcpm_cpu_going_down(cpu, cluster);
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arch_spin_lock(&dcscb_lock);
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BUG_ON(__mcpm_cluster_state(cluster) != CLUSTER_UP);
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dcscb_use_count[cpu][cluster]--;
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if (dcscb_use_count[cpu][cluster] == 0) {
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rst_hold = readl_relaxed(dcscb_base + RST_HOLD0 + cluster * 4);
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rst_hold |= cpumask;
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if (((rst_hold | (rst_hold >> 4)) & all_mask) == all_mask) {
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rst_hold |= (1 << 8);
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last_man = true;
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}
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writel_relaxed(rst_hold, dcscb_base + RST_HOLD0 + cluster * 4);
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} else if (dcscb_use_count[cpu][cluster] == 1) {
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/*
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* A power_up request went ahead of us.
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* Even if we do not want to shut this CPU down,
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* the caller expects a certain state as if the WFI
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* was aborted. So let's continue with cache cleaning.
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*/
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skip_wfi = true;
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} else
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BUG();
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if (last_man && __mcpm_outbound_enter_critical(cpu, cluster)) {
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arch_spin_unlock(&dcscb_lock);
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/*
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* Flush all cache levels for this cluster.
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*
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* A15/A7 can hit in the cache with SCTLR.C=0, so we don't need
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* a preliminary flush here for those CPUs. At least, that's
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* the theory -- without the extra flush, Linux explodes on
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* RTSM (to be investigated).
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*/
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flush_cache_all();
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set_cr(get_cr() & ~CR_C);
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flush_cache_all();
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/*
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* This is a harmless no-op. On platforms with a real
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* outer cache this might either be needed or not,
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* depending on where the outer cache sits.
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*/
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outer_flush_all();
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/* Disable local coherency by clearing the ACTLR "SMP" bit: */
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set_auxcr(get_auxcr() & ~(1 << 6));
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/*
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* Disable cluster-level coherency by masking
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* incoming snoops and DVM messages:
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*/
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cci_disable_port_by_cpu(mpidr);
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__mcpm_outbound_leave_critical(cluster, CLUSTER_DOWN);
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} else {
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arch_spin_unlock(&dcscb_lock);
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/*
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* Flush the local CPU cache.
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*
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* A15/A7 can hit in the cache with SCTLR.C=0, so we don't need
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* a preliminary flush here for those CPUs. At least, that's
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* the theory -- without the extra flush, Linux explodes on
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* RTSM (to be investigated).
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*/
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flush_cache_louis();
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set_cr(get_cr() & ~CR_C);
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flush_cache_louis();
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/* Disable local coherency by clearing the ACTLR "SMP" bit: */
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set_auxcr(get_auxcr() & ~(1 << 6));
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}
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__mcpm_cpu_down(cpu, cluster);
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/* Now we are prepared for power-down, do it: */
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dsb();
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if (!skip_wfi)
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wfi();
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/* Not dead at this point? Let our caller cope. */
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}
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static const struct mcpm_platform_ops dcscb_power_ops = {
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.power_up = dcscb_power_up,
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.power_down = dcscb_power_down,
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};
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static void __init dcscb_usage_count_init(void)
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{
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unsigned int mpidr, cpu, cluster;
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mpidr = read_cpuid_mpidr();
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cpu = MPIDR_AFFINITY_LEVEL(mpidr, 0);
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cluster = MPIDR_AFFINITY_LEVEL(mpidr, 1);
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pr_debug("%s: cpu %u cluster %u\n", __func__, cpu, cluster);
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BUG_ON(cpu >= 4 || cluster >= 2);
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dcscb_use_count[cpu][cluster] = 1;
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}
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extern void dcscb_power_up_setup(unsigned int affinity_level);
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static int __init dcscb_init(void)
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{
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struct device_node *node;
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unsigned int cfg;
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int ret;
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if (!cci_probed())
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return -ENODEV;
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node = of_find_compatible_node(NULL, NULL, "arm,rtsm,dcscb");
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if (!node)
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return -ENODEV;
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dcscb_base = of_iomap(node, 0);
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if (!dcscb_base)
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return -EADDRNOTAVAIL;
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cfg = readl_relaxed(dcscb_base + DCS_CFG_R);
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dcscb_allcpus_mask[0] = (1 << (((cfg >> 16) >> (0 << 2)) & 0xf)) - 1;
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dcscb_allcpus_mask[1] = (1 << (((cfg >> 16) >> (1 << 2)) & 0xf)) - 1;
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dcscb_usage_count_init();
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ret = mcpm_platform_register(&dcscb_power_ops);
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if (!ret)
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ret = mcpm_sync_init(dcscb_power_up_setup);
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if (ret) {
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iounmap(dcscb_base);
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return ret;
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}
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pr_info("VExpress DCSCB support installed\n");
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/*
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* Future entries into the kernel can now go
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* through the cluster entry vectors.
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*/
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vexpress_flags_set(virt_to_phys(mcpm_entry_point));
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return 0;
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}
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early_initcall(dcscb_init);
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